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JPH0446412A - Variable impedance load - Google Patents

Variable impedance load

Info

Publication number
JPH0446412A
JPH0446412A JP15410490A JP15410490A JPH0446412A JP H0446412 A JPH0446412 A JP H0446412A JP 15410490 A JP15410490 A JP 15410490A JP 15410490 A JP15410490 A JP 15410490A JP H0446412 A JPH0446412 A JP H0446412A
Authority
JP
Japan
Prior art keywords
converter
operational amplifier
input
impedance
variable impedance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15410490A
Other languages
Japanese (ja)
Inventor
Masao Kanekura
金倉 正雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KOKUSAI SYST KK
Original Assignee
KOKUSAI SYST KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KOKUSAI SYST KK filed Critical KOKUSAI SYST KK
Priority to JP15410490A priority Critical patent/JPH0446412A/en
Publication of JPH0446412A publication Critical patent/JPH0446412A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To miniaturize a variable impedance load and to reduce the cost by using a multiplication type D/A converter and an operational amplifier in combination, and connecting a fixed impedance between an input point and the output terminal of the operational amplifier. CONSTITUTION:A fixed impedance Z is connected between an input point IN and the output terminal of an operational amplifier OA3. a current output resulting from the product between a voltage input Vi and a digital control input CS is outputted from an Io terminal of a D/A converter DAC, which incorporates a feedback resistor Rf of an operational amplifier OA2. The input CS is an n-bit digital signal, normalized by taking a full scale as '1', and assuming the normalized value as K, an output voltage Vd of the D/A converter is expressed as Vd=K.Vi. Thus, the output voltage Vo of the amplifier OA3 is expressed as Vo=(2L-1)-Vi and an equivalent ground impedance is Z/(2-2K) according to a prescribed equation. Since the small sized D/A converter and the operational amplifiers integrated in an IC are inexpensive, the variable impedance load by digital control is manufactured small in size and inexpensively.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電話回線に於ける2線−4線変換回路の平衡回
1&Mなどに使われる可変インピーダンス負荷に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a variable impedance load used in a balanced circuit 1&M of a 2-wire to 4-wire conversion circuit in a telephone line.

〔従来の技術〕[Conventional technology]

これまでの平衡回路網などの可変インピーダンス負荷は
、値の異るコンデンサや抵抗な機械的または電子的スイ
ッチによって切り替え組み合わせるものであった。
Traditionally, variable impedance loads such as balanced networks have been switched and combined using mechanical or electronic switches such as capacitors or resistors of different values.

l。l.

2゜ 〔発明が解決しようとする課題〕 従来の可変インピーダンス負荷にあっては、可変範囲を
大きく、または可変ステップ輻を小さくするには、たく
さんの回路素子を用意しなければならないという問題点
があった。
2゜ [Problem to be solved by the invention] Conventional variable impedance loads have the problem that in order to widen the variable range or reduce the variable step amplitude, a large number of circuit elements must be prepared. there were.

本発明は回路素子を切り替えるという方法ではなく、同
一回路素子と電子的回路手段を組み合せることにより、
等測的に可変インピーダンスをもつ片端接地の負荷を提
供することを目的としている。
The present invention does not involve switching circuit elements, but by combining the same circuit element and electronic circuit means.
The purpose is to provide a single-end grounded load with isometrically variable impedance.

raysを解決するための手段〕 上記目的を達成するために1本発明では、乗算1j2D
−A変換器とaiIyt増幅器を組み合せて、ディジタ
ル制御信号により入力点電圧が正または負に増幅される
点と入力点との間に固定インピーダンスを接続して1片
端接#!!形式の可変インピーダンス負荷を得ている。
rays] In order to achieve the above object, in the present invention, multiplication 1j2D
-A converter and aiIyt amplifier are combined, and a fixed impedance is connected between the input point and the point where the input point voltage is amplified positively or negatively by a digital control signal, and one end is connected. ! We have obtained a type of variable impedance load.

〔作泪〕[Saku tears]

上記のように構成された負荷において、固定インピーダ
ンスの1端接続点が接地に対して、入力点電圧のに倍で
あり、かつ出力インピーダンスが零ならば、入力点にお
ける等価対接地インピーダンスは固定インピーダンスの
(1−K)分の1となる。
In a load configured as above, if one terminal connection point of the fixed impedance is twice as high as the input point voltage with respect to ground, and the output impedance is zero, the equivalent impedance to ground at the input point is the fixed impedance. It is 1/(1-K) of

〔実施例〕〔Example〕

実施例について図面を参照して説明すると、第1図にお
いて、固定インピーダンスZは入力点INと、演算増幅
!10A3の出力端子間に接続される。D−A変換器D
ACは電圧入力Viとディジタル制御入力C8との積が
、工o@子から電流出力として出る最も一般的な乗算型
な使用しており、演算増幅器OA2のフィードバック抵
抗Rfを内蔵している。制御入力C8はnビットのディ
ジタル値であるが、フルスケールを1として規格化し、
これをKで表せばD−A変換器としての出力電圧は次の
(1)式で表される。
An example will be described with reference to the drawings. In FIG. 1, a fixed impedance Z is connected to an input point IN and an operational amplification! Connected between the output terminals of 10A3. D-A converter D
AC uses the most common multiplication type in which the product of the voltage input Vi and the digital control input C8 is output as a current output from the output, and has a built-in feedback resistor Rf of the operational amplifier OA2. The control input C8 is an n-bit digital value, but it is normalized with the full scale as 1.
If this is expressed as K, the output voltage as a DA converter is expressed by the following equation (1).

Vd =−K・Vi           (1)従っ
て演算増幅器○A3の出力電圧Voは次の(2)式で表
される。
Vd = -K.Vi (1) Therefore, the output voltage Vo of the operational amplifier A3 is expressed by the following equation (2).

Vo= (2に−1)  ・Vi       (2)
ここで固定インピーダンス2に流れる電流tIzとすれ
ば、これは次の(3)式で表される。
Vo= (2 to 1) ・Vi (2)
Here, if the current flowing through the fixed impedance 2 is tIz, this is expressed by the following equation (3).

(3)式は入力点INから見た等価対接地インピーダン
スがZ/ (2−2K)になっている事を示している。
Equation (3) shows that the equivalent ground impedance seen from the input point IN is Z/(2-2K).

〔発明の効果〕〔Effect of the invention〕

本発明は、以上説明したように構成されて4%るので、
以下に記載されるような効果を奏する。
Since the present invention is configured as described above,
This produces the effects described below.

IC化された小形のD−A変換器や演算増幅器が、安価
に入手できるようになっているので、ディジタル制御に
よる可変インピーダンス負荷を小形で安価に製作するこ
とができる。
Since small IC-based DA converters and operational amplifiers are available at low cost, it is possible to manufacture a digitally controlled variable impedance load in a small size and at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第一図は本発明の1実施例を示す図である。 IN  ・・・・・・・・・・・・−・ 入力点Z ・
・・・・・・・・・固定インピーダンスOAI、OA2
.OA3  ・・・ 演算増幅器DAC・・・・・・・
・・・ D−A変換器R,R/2  ・−・・・・・・
・・・ 抵抗器図面
FIG. 1 is a diagram showing one embodiment of the present invention. IN ・・・・・・・・・・・・−・ Input point Z ・
・・・・・・Fixed impedance OAI, OA2
.. OA3... Operational amplifier DAC...
... D-A converter R, R/2 ...
・・・ Resistor drawing

Claims (1)

【特許請求の範囲】[Claims] 乗算型D−A変換器と演算増幅器を組み合せて、ディジ
タル制御信号により入力点電圧が正または負に増幅され
る点と入力点との間に固定インピーダンスを接続した片
端接地形式の可変インピーダンス負荷。
A variable impedance load with one end grounded, which combines a multiplier type DA converter and an operational amplifier, and connects a fixed impedance between the input point and the point where the input point voltage is amplified positively or negatively by a digital control signal.
JP15410490A 1990-06-14 1990-06-14 Variable impedance load Pending JPH0446412A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15410490A JPH0446412A (en) 1990-06-14 1990-06-14 Variable impedance load

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15410490A JPH0446412A (en) 1990-06-14 1990-06-14 Variable impedance load

Publications (1)

Publication Number Publication Date
JPH0446412A true JPH0446412A (en) 1992-02-17

Family

ID=15577011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15410490A Pending JPH0446412A (en) 1990-06-14 1990-06-14 Variable impedance load

Country Status (1)

Country Link
JP (1) JPH0446412A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3435542A1 (en) * 2017-07-26 2019-01-30 ASML Netherlands B.V. Electrical circuit for emulating variable electrical characteristics

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3435542A1 (en) * 2017-07-26 2019-01-30 ASML Netherlands B.V. Electrical circuit for emulating variable electrical characteristics
NL2021237A (en) * 2017-07-26 2019-01-30 Asml Netherlands Bv Electrical circuit for emulating variable electrical characteristics

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