JPH0445620A - Radio selective call receiver - Google Patents

Abstract

PURPOSE:To prevent the deterioration in the reception sensitivity of a reception section by inserting a resistor in series with one of signal lines between at least two integrated circuits so as to reduce radiation of high frequency noise from the signal line. CONSTITUTION:A program to control a CPU 6 is written in a ROM 7. A RAM 8 is used as a tentative storage location for a data or various variables in the processing of the CPU 6. A clock oscillator 11 generates various timing signals and a processing clock signal for the CPU 6. A resistor 14 is inserted in series with a signal line reaching an LCD driver 12 wired long as the mount to interrupt the flowing of the high frequency noise current. Thus, only the current representing the substantial data is sent by selecting the resistance of the resistor 14 properly and the high frequency noise current is reduced in the signal line.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a radio selective call receiver, and more particularly to a radio selective call receiver having an IC that performs logic operations such as data processing.

[Conventional technology]

Conventionally, the logic circuit of this type of radio selective call receiver is I
Consisting of one C, this IC operates on battery voltage, and the clock for data processing is several 100 KHz, so noise radiation from the logic signal line did not pose any particular problem to the characteristics of the radio section. However, as wireless selective calling receivers have become more sophisticated in recent years, logic circuits have also become more sophisticated.
pu.

It has come to be composed of multiple ICs such as ROM, RAM, peripheral ICs, and LCD drivers.

[Problem to be solved by the invention]

In the conventional radio selective calling receiver described above, signal lines between a plurality of ICs constituting a logic circuit are connected in a common line structure (bus system), and are wired in a complicated manner on a printed circuit board. Furthermore, almost none of these ICs operate on battery voltage, but instead operate on the boosted voltage by boosting the battery voltage using a DC-DC converter or the like.

Furthermore, clock frequencies are also becoming higher. Therefore, the level of the signal flowing through the signal line increases and the frequency also increases.

Furthermore, since a signal line is connected to each IC using the bus method, the signal line has to be routed for a long time, which further increases the amount of noise radiation, which significantly deteriorates the reception sensitivity of the radio section.

[Means to solve the problem]

The radio selective call receiver of the present invention has at least two integrated circuits and inputs and outputs digital signals between these integrated circuits, in which at least one of the signal lines between the integrated circuits It consists of a resistor in series with the

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

A radio signal received by antenna 1 is amplified and demodulated by radio section 2 . The demodulated signal is converted by the waveform shaping circuit 3 into a waveform that can be read by the decoder 4.

In the decoder 4, PROM (Prograllable
It compares its own calling number written in advance in Read 0nly Memory) 5 with the calling number in the signal from the waveform shaping circuit 3, and when the two match, it outputs a message signal following the calling number to the CPU 6. do.

The CPU 6 performs processing such as error checking and error correction on the message signal, outputs the message data to the LCD driver 12, and outputs a notification command to notify the decoder 4 that there is a call. The decoder 4 outputs a sound signal to the amplifier 9 and drives the speaker 10 according to a notification command from the CPU 6 . At the same time, L.C.
The D driver 12 causes the LCD display section 13 to display message data.

A program for controlling CPtJ6 is written in ROM7. The RAM 8 is utilized as a temporary storage location for data or various variables during the processing of the CPtJ6. The clock oscillator 11 generates various timings and a processing clock for the CPU 6.

The resistor 14 is inserted in series with the signal line to the LCD driver 12, which is long and thin due to mounting, and blocks the flow of high-frequency noise current.

FIG. 2 is an equivalent circuit of a CMOS logic IC for explaining the signal current flowing from the output port of the CPIJ 6 to the input port of the LCD driver 12.

The output port of a CMOS logic IC is equivalent to power supply 2.
1, a current source (P) 22, a current source (n) 25, a switch (P) 23, and a switch (n) 24. In Fig. 2, the switch (P) 23 is turned on and the high level This shows the state in which . Further, the input port is equivalently represented by a capacitor 27. Therefore, the current source (P)
22 charges the capacitor 27, so that the input port becomes high level. The time constant for charging this capacitor 27 is expressed as RC, where the capacitance value of the capacitor 27 is C1 and the resistance value of the resistor 26 is R. By appropriately selecting this resistance value R, the original data can be expressed. A signal line that transmits current and reduces high-frequency noise current can be realized.

〔Effect of the invention〕

As explained above, the present invention can reduce high frequency noise flowing in the signal line by inserting a resistor in series in the signal line between ICs used in the logic system of a radio selective calling receiver. Since noise radiation can be reduced, there is an effect of preventing deterioration of the receiving sensitivity of the receiving section.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 2 is an equivalent circuit diagram for explaining a signal current flowing from the CPU 6 to the LCD driver 12 in the figure. DESCRIPTION OF SYMBOLS 1... Antenna, 2... Radio part, 3... Waveform shaping circuit, 4... Decoder, 5... PROM, 6...
cpu, 7... ROM, 8... RAM, 9... amplifier, 10... speaker, 11... clock oscillator, 12... LCD driver, 13... LCD display section, 14... ··resistance.

Claims (1)

[Claims] In a radio selective calling receiver that has at least two integrated circuits and inputs and outputs digital signals between these integrated circuits, a resistor is inserted in series with at least one of the signal lines between the integrated circuits. Features: Wireless selective calling receiver.