JPH0440861B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a plastic pin grid array in an IC package or the like.

[Background technology] In semiconductor packages such as ICs, in response to the increase in the number of I/Os due to higher functionality and higher density of elements, it is necessary to connect external electricity to the back side of the substrate on which the semiconductor chip is mounted. Pin grid arrays (PGA), which have protruding terminal pins that serve as connection terminals, have been put into practical use. In a pin grid array, a large number of terminal pins can be provided using almost the entire back surface of the board. Then, a semiconductor chip such as an IC chip is mounted in the center of the front side of the board, and the bases of the terminal pins are inserted into the many through holes provided in the board so that each terminal pin protrudes to the back side of the board. Circuits are formed radially on the front surface of the board and each circuit is electrically connected to the terminal pins, and wire bonding is performed between the semiconductor chip and each circuit to connect the semiconductor chip to each terminal pin via the circuit. It is designed to be electrically connected to.

However, in this way, the central part of the front side of the board becomes the part where the semiconductor chip is mounted, and the circuit wiring density is high near this semiconductor chip mounting part, so it is necessary to provide through holes in the semiconductor chip mounting part and its vicinity. Therefore, it is not possible to install terminal pins by inserting them into the through holes in this part of the board, and there is a limit to the number of terminal pins that can be installed, so to increase the number, the board must be made larger. This has become a problem when downsizing the package.

[Object of the Invention] The present invention has been made in view of the above points, and an object of the present invention is to provide a pin grid array that can increase the number of terminal pins without increasing the size of the board. It is something to do.

[Disclosure of the Invention] However, the pin grid array according to the present invention has the following features:
A semiconductor chip mounting portion 2 is formed on one side of a substrate 1 made of a resin material, and through holes 3, 3, . Non-through holes 4, 4... are formed on the other side of the substrate 1 at the portion where the
... is provided in the through hole 3 and the non-through hole 4, and the terminal pin 5,
The terminal pins 5 are made to protrude from the other side surface of the board 1 by inserting the base of the board 1, and the non-through holes 4 are formed in the semiconductor chip mounting section 2. is provided so that the terminal pin 5 can be attached also in this part, and the board 1
The present invention will be described in detail below using examples.

The substrate 1 is formed of a resin material such as a resin laminate, and as shown in FIG. 1, a recess is formed in the center of one side (upper surface) and a semiconductor chip mounting portion 2 is provided. . In addition, a large number of through holes 3, 3, etc. are bored in the substrate 1 in the portion where the semiconductor chip mounting portion 2 is removed, and in the portion corresponding to the semiconductor chip mounting portion 2 and in the vicinity thereof, other than the substrate 1 are formed. A non-penetrating hole 4 is provided on one side (lower surface) of the plate. Each through hole 3 is plated with a metal coating 8 on its inner peripheral surface.
is formed thereon, and a metal film 8 is similarly formed on the inner peripheral surface of the non-penetrating hole 4. Lands 9 are formed on the upper and lower surfaces of the substrate 1 at both the upper and lower opening edges of the through hole 3, and the lands 9 are formed on the upper and lower surfaces of the substrate 1 at both upper and lower opening edges of the through hole 3.
A land 9 is also formed on the lower surface of the substrate 1 at the lower edge of the opening. On the upper surface of the board 1, a large number of circuits (not shown) are provided radially around the semiconductor chip mounting area 2 by etching metal foil such as copper foil, and a portion of each circuit has a through hole. A land 9 is formed on the upper surface side of the through hole 4 so that the circuit and the metal film 8 of the through hole 3 are electrically connected via the land 9. Further, the electrical connection between the circuit and the metal film 8 of the non-penetrating hole 4 is achieved by, for example, extending a part of the circuit from the side surface of the substrate 1 to the bottom surface to reach the land 9 at the lower edge of the non-penetrating hole 4. This can be done by doing the following. In the non-penetrating hole 4, the metal coating 8 only needs to be electrically connected to the circuit via the land 9 at the lower edge, so it is not necessary to provide the metal coating 8 over the entirety of the non-penetrating hole 4.

By press-fitting the base of the terminal pin 5 into the through hole 3 or the non-through hole 4, it is possible to attach a large number of terminal pins 5, 5, . At this time, it is preferable that the terminal pin 5 inserted into the non-penetrating hole 4 is provided with a collar 10 to prevent the terminal pin 5 from breaking through the upper bottom surface of the non-penetrating hole 4 when the terminal pin 5 is press-fitted. . moreover,
A semiconductor chip 11 such as an IC chip is mounted and mounted on the semiconductor chip mounting part 2, and wire bonding is performed between the semiconductor chip 11 and the circuit to electrically connect the semiconductor chip 11 to the circuit. In this way, a pin grid array in which the semiconductor chip 11 is connected to each terminal pin 5 via the circuit, land 9, and metal film 8 can be obtained.
In this pin grid array, the unpierced holes 4
Therefore, the terminal pins 5 are attached to the lower surface side of the board 1 in the semiconductor chip mounting part 2 and the vicinity thereof, and the number of terminal pins 5 can be secured in this part, and the terminal pins 5 can be attached. The pin grid array can be miniaturized without the need to enlarge the substrate 1 in order to secure the area for the pin grid array.

Note that the substrate 1 is formed of a resin laminate, for example, a resin laminate obtained by laminating prepreg prepared by impregnating and drying a thermosetting resin such as an epoxy resin on a base material such as glass cloth, and then hot-pressing the same. In this case, the through holes 3 can be easily formed by drilling, but the non-through holes 4 must be formed by counterboring, etc., and it is difficult to form the non-through holes 4 in a thin resin laminate. extremely difficult. In this case, a pin grid array can be created as shown in FIG. That is, the substrate 1 of the pin grid array is formed of two resin laminates 12 and 13, and first, the lower resin laminate 13 is penetrated at a portion corresponding to the semiconductor chip mounting portion 2 and its vicinity. Holes 4a are formed by drilling, and then another resin laminate 12 is bonded to the upper surface of this resin laminate 13 with an adhesive layer 14, and the resin laminate 1
A through hole 3 is formed by drilling in a substrate 1 formed by stacking semiconductor chips 2 and 13 in a portion other than the semiconductor chip mounting portion 2 and its vicinity. In this way, the holes 4a formed through the resin laminate 13 are closed by the resin laminate 12, so that the non-penetrating holes 4 are closed.
The non-through hole 4 can be easily formed by drilling similarly to the through hole 3. After that, it is recommended to process the printed wiring board in the same way as shown in Figure 1 to form metal coatings 8 and lands 9 in the through holes 3 and non-through holes 4, as well as to form circuits and insert terminal pins 5. It can be combined to create a pin grid array.

[Effects of the Invention] As described above, in the present invention, a semiconductor chip mounting portion is formed on one side of a substrate formed of a resin material, and a through hole is provided in the substrate in a portion other than the semiconductor chip mounting portion. A non-through hole is provided on the other side of the board in a portion corresponding to the semiconductor chip mounting area, and the base of the terminal pin is inserted into the through hole or the non-through hole, and each terminal pin is attached to the other side of the board. Since the terminal pins are made to protrude, the terminal pins can be inserted into through holes in areas other than the semiconductor chip mounting area, and in addition, the terminal pins can be inserted into non-through holes on the back side of the semiconductor chip mounting area. Terminal pins can also be attached to the semiconductor chip mounting area, and there is no need to make the board large to secure the area for attaching the terminal pins, making the pin grid array more compact. It is something that can be done.

[Brief explanation of drawings]

FIG. 1 is a sectional view of one embodiment of the present invention, and FIG. 2 is a sectional view of another embodiment of the same. 1 is a board, 2 is a semiconductor chip mounting part, 3 is a through hole, 4 is a non-through hole, 4a is a hole, 5 is a terminal pin, 1
2 and 13 are resin laminates.

Claims (1)

[Claims] 1. A semiconductor chip mounting portion is formed on one side of a substrate made of a resin material, a through hole is provided in the substrate in a portion other than the semiconductor chip mounting portion, and a through hole is provided in a portion corresponding to the semiconductor chip mounting portion. A pin characterized in that a non-through hole is provided on the other side of the board, and the base of the terminal pin is inserted into the through hole or the non-through hole so that each terminal pin projects from the other side of the board. Ritsudo Array. 2. The board is formed by laminating and bonding two resin laminates, and a non-through hole is one of the openings of a hole made through one resin laminate that is closed by the other resin laminate. The pin grid array according to claim 1, characterized in that it is formed by.