JPH04364496A - Preamplifier for semicopnductor detector - Google Patents

Abstract

PURPOSE:To obtain a preamplifier for a semiconductor detector which enables execution of measurement with high resolution and a high counting rate by mutual supplementation of a pulse reset type discharging intermittently a charge accumulated in a feedback capacity and of a drain feedback type for feeding it back to a drain of FET. CONSTITUTION:An amplifier 3 connected to a semiconductor detector, a feedback capacity 4 connected in parallel to this amplifier 3, a comparator 6 connected to the amplifier 3, and a power source switch 12 switching a plurality of voltages and a current limiting resistor 13 which are connected in series between an output terminal of the comparator 6 and a drain of FET 2 provided in the initial stage of the amplifier, are provided.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor detector preamplifier for measuring radiation energy with a good S/N ratio using a semiconductor detector crystal.

0002

2. Description of the Related Art A semiconductor detector crystal is a sensor capable of measuring the energy of radiation such as alpha rays, beta rays, gamma rays, etc. with very high energy resolution. When radiation is incident on the semiconductor detector crystal, a pulse-like charge proportional to the energy is collected on the semiconductor detector crystal electrode each time and is extracted as a charge signal. Generally, this charge signal is converted into a voltage signal (S) by a preamplifier equipped with an integrator function such as a feedback capacitor. After this, the main amplifier amplifies the signal and shapes the waveform. At this time, the energy resolution of this system is determined by the ratio (S/N ratio) to the noise (N) generated at each stage. Particularly in measurements used at liquid nitrogen temperatures for the purpose of high energy resolution, the noise generated from the semiconductor detector becomes very small, so that the noise from the preamplifier comes to dominate. Therefore, a low noise preamplifier is required.

Conventional charge amplification type preamplifiers aimed at high resolution include the following types. First, the block circuit diagram shown in Fig. 3 is called a resistive feedback type, in which a feedback capacitor 4 and a feedback resistor 5 are connected in parallel to an amplifier 3 which is connected in series to a semiconductor detector 1 and has an FET 2 in its first stage. configuration, and is usually the most widely used.

The block circuit diagram shown in FIG. 4 below is called an optical reset type, in which a feedback capacitor 4 is connected in parallel to an amplifier 3 connected in series to a semiconductor detector 1, and a comparator 6 is connected in series. Then, furthermore, this comparator 6
This is a pulse reset type in which a reset pulse generator 7 and a light emitting diode 8 are connected in series between the output terminal of the amplifier 3 and the ground.
It is a method in which the charge accumulated in the feedback capacitor 4 is intermittently discharged by increasing the gate current of 2, and the input is not equipped with circuit elements such as a feedback resistor that reduce resolution, so it is expensive. Resolution can be obtained. Note that the high count rate characteristic is determined by the time response of the reset light pulse of the light emitting diode 8.

The block circuit diagram shown in FIG. 5 is a resistance reset type, and has the same configuration as the optical reset type shown in FIG.
A reset transistor 9 and a reset resistor 10 are provided in place of the light emitting diode 8, and it is possible to reset the charges accumulated in the feedback capacitor 4, which has a faster response than the optical reset type. In addition, the so-called drain feedback type shown in the block circuit diagram of FIG. It has a configuration in which an integrating circuit 11 is connected between the drain of FET 2, and this method takes advantage of the fact that the gate current increases significantly even with a slight increase in drain voltage.The input is equipped with a feedback resistor, etc., which is a factor that reduces resolution. Since it is not connected, it has the characteristic of obtaining high resolution.

[0006]

[Problems to be Solved by the Invention] Among the various charge amplification type preamplifiers described above, in the resistor feedback type shown in FIG. 3, since the feedback resistor 5 is connected to the input, the semiconductor detector 1
This method has the problem of lowering the parallel noise resistance by equivalent to the leakage current of In addition, the optical reset type and resistance reset type shown in FIGS. 4 and 5 do not require pole-zero cancellation during waveform shaping in the amplifier 3, but the optical reset type has a high counting rate due to the afterglow time in the light emitting diode 8. There is a limit to the measurement possible, and in the resistance reset type, the reset resistor 10 is connected to the input, so there is a problem that it is difficult to obtain high resolution like the resistance feedback type.

Furthermore, in the drain feedback type shown in FIG.
Since charges are continuously discharged, when the counting rate is high, the gate current naturally increases, parallel noise increases, and energy resolution decreases. Furthermore, since the time constant during discharge changes, pole-zero cancellation is not sufficient.
There is a problem that causes a decrease in resolution. As mentioned above, each type of conventional preamplifier has its advantages and disadvantages in terms of high resolution measurement and high count rate measurement.
There was also a demand for a preamplifier capable of high count rate measurement.

An object of the present invention is to achieve mutual compensation between a pulse reset type in which the charge accumulated in the feedback capacitance is discharged intermittently and a drain feedback type in which the charge is fed back to the drain of the FET.
An object of the present invention is to provide a preamplifier for a semiconductor detector capable of high resolution and high count rate measurement.

[0009]

[Means for Solving the Problem] An amplifier connected to a semiconductor detector, a feedback capacitor connected in parallel with the amplifier, a comparator connected to the amplifier, an output terminal of the comparator, and a drain of an FET in the first stage of the amplifier. It is equipped with a power supply switching device that switches a plurality of voltages connected in series between them, and a current limiting resistor.

0010

[Operation] Negative charges collected in the semiconductor detector in response to radiation energy are accumulated in the feedback capacitance, and a step-like sawtooth voltage waveform proportional to the energy of the incident radiation is obtained at the output end of the amplifier. . When the output of the amplifier reaches a preset reference voltage, a pulse voltage is generated at the output of the comparator. The power supply switch is switched at the timing of the rise of this pulse voltage, and a high voltage is applied to the drain of the FET in the first stage of the amplifier. This increase in drain voltage causes the gate current of the FET to rapidly increase, thereby resetting the charge accumulated in the feedback capacitance. The response time of this reset is short, and the S/N ratio is high and the counting rate is high.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. Note that the same components as those in the prior art described above are designated by the same reference numerals, and detailed description thereof will be omitted. Figure 1 is a block circuit diagram of a preamplifier for a semiconductor detector, in which a feedback capacitor 4 is connected in parallel to an amplifier 3 which is connected in series to a semiconductor detector 1 and has an FET 2 in the first stage, and a comparator 6 is connected in series. do. Further, a power supply switch 12 and a current limiting resistor 13 are inserted and connected between the output end 6a of the comparator 6 and the drain 2b of the FET 2 of the amplifier 3. Note that this is called a drain reset type. Further, the power supply switch 12 switches the voltage applied to the drain 2b of the FET 2 to the power supply E1 or the power supply E2 via the current limiting resistor 13, but here the voltages of the power supplies E1 and E2 satisfy E1 < E2.

Next, the operation of the above structure will be explained with reference to the operation timing characteristic diagram shown in FIG. In general, when radiation enters the crystal of the PN junction type semiconductor detector 1 to which a high reverse bias voltage is applied, ionization occurs due to depletion of the crystal, and the electrodes at both ends of the crystal have charges with the opposite polarity to the applied high voltage. collected. In FIG. 1, since a negative high voltage -Hv is applied, negative charges are collected in the crystal of the PN junction type semiconductor detector 1. Therefore, FET2 of amplifier 3
The electrodes on the input side of the gate 2a and the feedback capacitor 4 are as shown in FIG.
Negative charges are accumulated as shown by the characteristic line 20, and a sawtooth voltage waveform is obtained at the output terminal 3a of the amplifier 3, which rises in steps every time radiation is incident, as shown by the characteristic line 21. Furthermore, each step voltage value is proportional to the energy of the incident radiation.

When the output of the amplifier 3 reaches the reference voltage Vref as shown by the characteristic line 21, the output terminal 6 of the comparator 6
A step (pulse) voltage as shown by the characteristic line 22 is generated at a. At the timing of this voltage rise, power switch 1
2 is switched, and at this time, a higher voltage from the power source E2 is applied to the drain 2b of the FET 2 than a low voltage from the power source E1, as shown by a characteristic line 23. As a result of this increase in the drain voltage at the drain 2b, the gate current flowing through the gate 2a of the FET 2 also increases rapidly. The charge accumulated on the input side of the feedback capacitor 4 due to this increase in gate current is expressed by the characteristic line 20.
It will be reset and return to the initial state.

As described above, in the present invention, it is possible to significantly increase the gate current with a slight increase in the drain voltage, the response time of this reset is short, and the operation can be performed at a high counting rate. In addition, in measurements using liquid nitrogen temperatures for high energy resolution, the increase in gate current due to an increase in drain voltage is small, so although it is necessary to increase the width of increase in drain voltage, this significantly increases the gate current. It is easy to increase. In addition, the current limiting resistor 13 limits the increase in drain current and gate current that increase due to this large increase in drain voltage, sets the current value to an optimum value, and also controls the current value of FET 2 in the breakdown region. provide protection.

Furthermore, in the preamplifier of the present invention, while the gate current is large, the noise becomes large as in the conventional optical reset type and resistance reset type, but since this reset period is not used as a dead period, the amplification system S/ as
No deterioration of the N ratio occurs.

[0016]

[Effects of the Invention] According to the present invention, highly accurate radiation energy measurement can be performed by employing a preamplifier capable of high resolution and high counting rate, and the reliability of measurement results and various measurements and controls based on this can be improved. It has an improving effect.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram of a drain reset type preamplifier according to the present invention.

FIG. 2 is an operation timing characteristic diagram for explaining the operation of the preamplifier of the present invention.

FIG. 3 is a block circuit diagram of a conventional resistive feedback type preamplifier.

FIG. 4 is a block circuit diagram of a conventional optical reset type preamplifier.

FIG. 5 is a block circuit diagram of a conventional resistance reset type preamplifier.

FIG. 6 is a block circuit diagram of a conventional drain feedback preamplifier.

[Explanation of symbols]

1... Semiconductor detector, 2... FET, 2a... Gate of FET, 2b... Drain of FET, 3... Amplifier, 3a... Output end of amplifier, 4... Feedback capacitor, 6... Comparator, 6a... Output end of comparator, 12 ...Power supply switch, 13...Current limiting resistor.

Claims (1)

[Claims] 1. An amplifier connected to a semiconductor detector, a feedback capacitor connected in parallel with the amplifier, a comparator connected to the amplifier, and a plurality of capacitors connected in series between the output terminal of the comparator and the drain of the FET of the amplifier. 1. A preamplifier for a semiconductor detector, characterized in that a power supply switch that switches and introduces a voltage and a current limiting resistor are connected.