JPH04356967A - Semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate a negative resistance generated in a MOSFET of a thin film SOI device and to improve integration of a device configuration. CONSTITUTION:A thin film SOI device composed by disposing a semiconductor layer 12 on a main surface of an insulating film 11a at its front surface side and forming MOSFETs 14, 21, 22 on a surface of a semiconductor layer 12, a metal film 2 having high thermal conductivity is provided on a rear surface side of the insulating film 11 reduced in thickness by polishing.

Description

[Detailed description of the invention]

0001

[Industrial Field of Application] This invention relates to semiconductor devices, particularly
SOI (Silicon On Insulator)
The present invention relates to devices, and more particularly to an improved structure of a transistor device in an SOI device.

0002

2. Description of the Related Art Generally, an SOI layer (semiconductor layer) is formed on a semiconductor substrate, for example a silicon substrate, through a relatively thick oxide film, and circuit elements such as transistors are formed on the SOI layer. Among the SOI devices that are used in this field, in particular, thin-film SOI devices in which the SOI layer is thinned to about 1000 angstroms, for example, are expected to have high-speed circuit operation by improving the driving force of transistors and reducing parasitic capacitance. This is where I am.

[0003] Here, this kind of thin film SOI according to the conventional example
FIG. 7 schematically shows the general configuration of the device.

That is, in the device configuration of the thin film SOI device shown in FIG. 7, a silicon oxide film 11a is disposed on a silicon substrate 1, and the silicon oxide film 1
An SOI layer 12 thinned to about 1000 angstroms is provided on 1a, and this SOI layer 12 is
Source/drain diffusion layers 15 are selectively formed in predetermined island-like regions of the I layer 12 separated by the isolation oxide film 13, and each of these source/drain diffusion layers 15 is selectively formed.
A gate electrode 21 is formed on the insulating film 14 between the drain diffusion layers 15.
are selectively formed, and each wiring electrode 22 is taken out by opening holes in each corresponding part of the insulating film 14, and each of these source/drain diffusion layers 15, gate electrode 21, and each wiring The electrode 22 constitutes a MOSFET (MOS type field effect transistor) here.

[0005] Then, the thin film SO constructed as described above
In I-devices, when the MOSFET is operating, approximately 1
SOI film thinned to around 1,000 angstroms
Since the layer 12 is completely depleted and movable charges are effectively induced by the gate electric field, its current driving ability can be improved. Since the junction area of each source and drain can be reduced, the parasitic capacitance can be reduced.

[0006]

[Problems to be Solved by the Invention] However, in the case of the conventional thin film SOI device with the above configuration, the MOS
The SOI layer 12 corresponding to the channel in the FET is a silicon oxide film 1 having poor thermal conductivity compared to the silicon substrate 1.
1a, and when the MOSFET is driven in a high bias state, the carrier mobility decreases due to the temperature rise in the SOI layer 12 corresponding to the channel, the current drive ability is reduced, and there is a tendency to exhibit negative resistance. have.

[0007] This tendency is particularly caused by the thickness of the SOI layer 12 where the channel-corresponding portion of the SOI layer 12 on the silicon oxide film 11a is completely depleted during the operation of the MOSFET as described above. This is noticeable in thin-film SOI devices with a thickness of about 1000 angstroms or less, and further miniaturization of the device configuration causes a rapid rise in temperature in the channel-corresponding portion.As a result, miniaturization of thin-film SOI devices, Furthermore, there is an undesirable problem in that it becomes increasingly difficult to achieve high integration.

The present invention was made to solve these conventional problems, and its purpose is to eliminate the negative resistance that occurs in the circuit elements of thin film SOI devices, especially MOSFETs, and to Therefore, it is an object of the present invention to provide a semiconductor device of this type that can improve the degree of integration of the device configuration.

[0009]

[Means for Solving the Problems] In order to achieve the above object, a semiconductor device according to the present invention polishes an insulating film from the back side to make it thinner, and also provides thermal conductivity to the back side of the insulating film. A metal film with good quality is provided.

That is, the present invention provides a semiconductor device in which a semiconductor layer is disposed on the main surface on the front side of an insulating film, and a circuit element such as a transistor is formed on the surface portion of the semiconductor layer. This semiconductor device is characterized in that a metal film with high thermal conductivity is provided on the back side that has been made thinner by polishing.

[0011]

[Function] Therefore, in this semiconductor device, a metal film with good thermal conductivity is provided on the back side of the insulating film thinned by polishing. The heat dissipation from the metal film on the back side through which it is passed is suppressed, and as a result, the negative resistance that occurs in circuit elements, especially MOSFETs, can be eliminated.

0012

Embodiments Hereinafter, embodiments of a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1 and 2.

FIG. 1 is a sectional view schematically showing the general structure of a thin film SOI device to which an embodiment of the semiconductor device according to the present invention is applied, and FIGS. 2 to 5 show the main manufacturing steps of the thin film SOI device. They are each a sectional view schematically shown in sequence. Further, FIG. 6 is a cross-sectional view schematically showing the general structure of a thin film SOI device to which the same and other embodiments are applied. In the configurations of the embodiments shown in FIGS. 1 to 6, the same reference numerals as in the conventional configuration shown in FIG. 7 represent the same or corresponding parts.

First, the structure of a thin film SOI device according to an embodiment shown in FIG. 1 will be described.

That is, in the device configuration of the thin film SOI device shown in FIG. 1, the silicon oxide film 11 is thinned by polishing from the back side in the final stage as described later, and is thinned with respect to the back side. The silicon oxide film 11 provided with the metal film 2 having good thermal conductivity, such as gold (Au), is covered with an SO film thinned to about 1000 angstroms, as in the conventional case described above.
An I layer (semiconductor layer) 12 is provided, and this SOI layer 1
A source/drain diffusion layer 15 is formed in each predetermined region separated into islands by the isolation oxide film 13 of No. 2, and an insulating film 14 is formed between each of these source/drain diffusion layers 15. The gate electrodes 21 are selectively formed, and the wiring electrodes 22 are taken out through the openings in the corresponding portions of the insulating film 14, and the source/drain diffusion layers 15 and gate electrodes 21 are taken out. , and each wiring electrode 22, the MOSFET
(MOS type field effect transistor) is configured, and furthermore, on the surface side from which each wiring electrode 22 is taken out,
A support substrate 41 such as a silicon substrate is firmly bonded via an insulating adhesive 31.

Next, the manufacturing process of the thin film SOI device according to this embodiment will be described with reference to FIGS. 2 to 5.

FIG. 2 shows the configuration of a basic thin film SOI device manufactured by a conventional process well known, and is different from the conventional configuration shown in FIG. At this point, the silicon oxide film 11a before polishing is still provided on the silicon substrate 1 on the back side.
The support substrate 41 and the like are not provided on the front side either, and this is the state before this embodiment is applied.

In the state shown in FIG. 2, first, as shown in FIG. 3, the insulation is By using the adhesive 31, a support substrate 41 such as a silicon substrate, for example, is firmly bonded.

Next, as shown in FIG. 4, a part of the silicon oxide film 11a is removed from the entire silicon substrate 1 on the side opposite to the support substrate 41 provided on the front side in the previous step, that is, on the back side. (up to the extent shown by the broken line in FIG. 3), the silicon substrate 1 is removed by mechanically or chemically polishing as appropriate, and the silicon oxide film 1 is removed.
1a is thinned to form a silicon oxide film 11. Note that when polishing from the back side, since the front side of the device itself is reinforced by adhesive fixing of the support substrate 41, there is no fear that the device itself will be mechanically destroyed.

Furthermore, as shown in FIG. 5, a film having good thermal conductivity, for example, is applied to the back side of the silicon oxide film 11, which has been thinned by polishing in the previous step, that is, to the polished surface side. A metal film 2 such as gold (Au) is deposited by sputtering, vapor deposition, etc., and in this way a thin film SOI device configured as desired is obtained.

Therefore, in the thin film SOI device of this embodiment having the above structure, the SOI layer 12, which has been thinned to about 1000 angstroms, is completely depleted during operation of the MOSFET, and mobile charges due to the gate electric field are completely depleted. is effectively induced, so that the current driving ability can be improved. Also, since each source/drain diffusion layer 15 reaches as far as the silicon oxide film 11a, each source/drain The junction area can be reduced, and its parasitic capacitance can be reduced.

In the case of this embodiment, since the metal film 2 with good thermal conductivity is formed on the back side of the silicon insulating film 11 which has been thinned by polishing, the temperature increase in the SOI layer 12 is There is no risk that the current drive capability will be reduced due to heat dissipation from the metal film 2 on the back side through the silicon insulating film 11, and at the same time, the negative resistance occurring in the MOSFET can be eliminated.

In the embodiment shown in FIG. 1, the back side of the silicon insulating film 11a is polished evenly over the entire surface, but as in the other embodiment shown in FIG. After polishing by a predetermined amount to form a thin silicon insulating film 11, only the portion 3 corresponding to the SOI layer 12 is selectively polished more deeply, and the metal film 2 is formed including the portion 3. In addition to further enhancing the heat dissipation effect, other silicon insulating films 1 can be added as necessary.
By making the portion 1 thicker, the mechanical strength of the device itself can also be increased.

[0024]

Effects of the Invention As described above in detail in each embodiment, according to the present invention, a semiconductor layer is disposed on the main surface on the front side of an insulating film, and a circuit such as a transistor is formed on the surface of the semiconductor layer. In the semiconductor device in which the element is formed, a metal film with high thermal conductivity is provided on the back side of the insulating film, which has been made thinner by polishing, so that the temperature rise of the semiconductor layer during operation is reduced through the thin insulating film. This will be suppressed by heat radiation from the metal film on the back side, and as a result, M
This can easily eliminate the risk of reducing the current drive capability of the OSFET and the occurrence of negative resistance.
As a result, it is possible to provide a semiconductor device with stable characteristics, and it also has excellent features such as being useful for increasing the degree of integration of the device configuration.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view schematically showing the general configuration of a thin film SOI device to which an embodiment of a semiconductor device according to the present invention is applied.

FIG. 2 is a cross-sectional view schematically showing a state before application of one embodiment of the thin film SOI device.

FIG. 3 is a cross-sectional view schematically showing the steps up to adhesion of a support substrate to the front surface using an insulating adhesive in manufacturing the thin film SOI device.

FIG. 4 is a cross-sectional view schematically showing the steps of removing the silicon substrate by polishing from the back side and thinning the silicon oxide film in manufacturing the thin film SOI device.

FIG. 5 is a cross-sectional view schematically showing the steps up to the formation of a metal film on the back surface side in manufacturing the thin film SOI device.

FIG. 6 is a cross-sectional view schematically showing the general configuration of a thin film SOI device to which another embodiment of the present invention is applied.

FIG. 7 is a cross-sectional view schematically showing the general configuration of a conventional thin film SOI device.

[Explanation of symbols]

1 Silicon substrate 2 Metal film with good thermal conductivity 11a Silicon oxide film 11 Thinned silicon oxide film 12 SOI layer (semiconductor layer) 13 Isolation oxide film 14 Source/drain diffusion layer 15 Insulating film 21 Gate electrode 22 Wiring electrode 31 Insulating adhesive 41 Support board

Claims (1)

[Claims] 1. A semiconductor device configured by disposing a semiconductor layer on the main surface of an insulating film and forming a circuit element such as a transistor on the surface of the semiconductor layer, wherein the insulating film is thinned by polishing. A semiconductor device characterized in that a metal film with high thermal conductivity is provided on the back side of the semiconductor device.