JPH04342397A - Picture signal processing device - Google Patents

Abstract

PURPOSE:To provide the picture signal processing device capable of maintaining the continuity of a subcarrier phase even when a skew correction is performed after a picture signal based on a PAL television system is color-encoded. CONSTITUTION:When the skew correction processing is performed after the picture signal based on the PAL television system is color-encoded at its output, the color encoding processing is performed according to a phase-shifted subcarrier signal during the picture signal delayed by 0.5H (H means -horizontal scanning period) in the skew correction processing.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal processing apparatus for processing image signals.

0002

2. Description of the Related Art Conventionally, as an image signal processing apparatus for processing image signals, there is, for example, an electronic still camera system that records still image signals on a magnetic disk and reproduces the still image signals from the magnetic disk.

FIG. 5 shows a block diagram of an image signal processing circuit in a playback device for an electronic still video system based on the conventional PAL television system.

In FIG. 5, a reproduced image signal obtained by reproducing a still image signal recorded in a frame or field on a magnetic disk by a recording device (not shown) from the magnetic disk with a magnetic head (not shown) is a composite synchronous signal. A luminance signal (hereinafter referred to as Y+S) and a color difference line sequential signal (hereinafter referred to as R-Y/B-Y) are supplied separately.

The supplied R-Y/B-Y is synchronized in the synchronization circuit 2, and then encoded into original signals in the B-Y color encoder 3 and R-Y color encoder 4 shown in the figure. After that, it is added to the Y+S signal supplied to the adder circuit 5.

By the way, in an electronic still video system, information indicating whether an image signal is a frame-recorded signal or a field-recorded signal is recorded on a magnetic disk together with the image signal as a well-known ID signal.
An ID signal detection circuit (not shown) determines whether the image signal reproduced from the magnetic disk is frame-recorded or field-recorded, and generates a frame/field discrimination signal (hereinafter referred to as FRAME) according to the determination result. /FIE
LD signal) is supplied to a timing signal generator 7, and the timing signal generator 7 is connected to the FRAME/FI
A switch switching control signal (hereinafter referred to as SG) that controls the switching operation of the switch 13 (described later) according to the ELD signal.
ATE signal) is generated.

If the reproduced image signal input by the FRAME/FIELD signal is a signal recorded in a field during recording, 0.5H in the figure (H is one horizontal scan) is applied in order to perform skew compensation processing. period) The delay circuit 6 converts the signal output from the adder circuit 5 by 0.5H and the signal not passed through the 0.5H delay circuit 6 into the switch switching control signal generated from the timing signal generator 7. (hereinafter referred to as the SGATE signal), the switching operation is controlled by a switch 13 for every one field period, and the signal is outputted from the output terminal indicated by VIDEO OUT in the figure.

[0008] Furthermore, in the case of a frame recording signal, SG
Due to the ATE signal, only the signal that does not pass through the 0.5H delay circuit 5 is outputted from the output terminal indicated by VIDEO OUT.

The image signal processing circuit shown in FIG. 5 also includes a subcarrier SC1 (frequency: 4.43361875 MHz, phase : A 0° signal (hereinafter referred to as FSC signal) is supplied, and the FSC signal is supplied to a 90° phase shift circuit (hereinafter referred to as FSC signal).
P. S. ) 9 and 270°P. S. In 10,
The signal is converted into a 90° subcarrier signal whose phase is shifted by 90° and a 270° subcarrier signal whose phase is shifted by 270°, and these signals are supplied to the switch 12 .

A composite synchronization signal (hereinafter referred to as SYNC) is separated from the input Y+S signal by the synchronization separation circuit 1.
The switching operation of the switch is controlled by a signal whose polarity is inverted every 1H (hereinafter referred to as PALP) generated by the timing generator 7 in synchronization with the 90° subcarrier signal and the 270° subcarrier signal. By alternately switching and outputting the subcarrier signal every 1H, the subcarrier SC2 (unlike the subcarrier SC1, the phase is 90°) is used for color encoding the R-Y signal in the R-Y color encoder 4. A signal that alternately switches at 270° every 1H is formed and supplied to the RY color encoder 4.

[0011]

[Problems to be Solved by the Invention] By the way, in a video signal compliant with the PAL television system, if the phase of the subcarrier SC1 that encodes the B-Y signal is 0°, the phase of the subcarrier SC1 that encodes the R-Y signal
The phase of the encoded subcarrier must be switched between 90° and 270° every 1H, and the encoded subcarrier phase must be a continuously circulating signal without interruption.

FIG. 6 shows the phase state of the subcarrier signal used for encoding in the conventional image signal processing circuit shown in FIG. 5 described above.

[0013] When performing field playback to play back image signals field-recorded during recording, the SGATE signal is encoded every field (every 1V) using the vertical synchronization signal (VD in the figure) as a reference. 0.5H
It must alternately switch between delayed and non-delayed signals.

However, since the phase of the subcarrier SC1 used for encoding is continuous at 0°, the phase of the subcarrier output from VIDEO OUT is 0°, assuming that the phase of the signal that is not delayed by 0.5H is 0°. , the phase of the signal delayed by 0.5H becomes -45°.

That is, according to the relational expression of the PAL television standard, FSC=(284-1/4)FH+FH/625FSC
: Subcarrier frequency FH: Horizontal synchronization frequency (FH=1/1H) 0.5H=1
/2 x FH = 141.875/FSC, 360° x (0.875-1) = -45° (phase delay)
becomes.

[0016] Therefore, when performing frame playback to play back image signals recorded in frames during recording, there is no need to delay the encoded signal by 0.5H, so the subcarrier phases are continuous. In the case of field playback, the subcarrier phase of the signal output from VIDEO OUT is delayed by 45° for every 1V, so
, there was a drawback that phase discontinuity points occurred.

The conventional image signal processing circuit shown in FIG.
A circuit that performs skew compensation before color encoding (0
．． However, in the case of field playback, the signal output from VIDEO OUT has a subcarrier phase of 45° for every 1V. There is a drawback that phase discontinuity points occur because the VIDEO OU
In a monitor device, a vectorscope, etc. to which the image signal outputted from the T is supplied, color synchronization may be lost and the display may be distorted.

[0018] An object of the present invention is to provide an image signal processing device that can maintain phase continuity of subcarriers even if skew compensation is performed after color encoding an image signal conforming to the PAL television system. do.

[0019]

[Means for Solving the Problems] The image signal processing device of the present invention includes a color encoding means for color encoding and outputting an image signal conforming to the PAL television system, and a color encoding means for color encoding and outputting an image signal conforming to the PAL television system, and for the signal outputted from the color encoding means. A skew compensation processing means for performing skew compensation processing and outputting the skew compensation processing means, and color encoding in the color encoding means during a period in which a signal delayed by 0.5H (H is one horizontal scanning period) is output from the skew compensation processing means. and a phase shift means for shifting the phase of a subcarrier signal used for processing and supplying it to the color encoding means.

[0020]

[Operation] According to the above-described configuration, skew compensation is performed after color encoding an image signal conforming to the PAL television system, thereby making it possible to maintain phase continuity of subcarriers.

[0021]

EXAMPLES The present invention will be explained below using examples of the present invention.

FIG. 1 is a block diagram of an image signal processing circuit as a first embodiment of the present invention.

Note that the image signal processing circuit shown in FIG.
This is a case in which the present invention is applied to an image signal processing circuit in a playback device of an electronic still video system based on the L television system, and the same components as in FIG. 5 are given the same reference numerals.

In FIG. 1, a reproduced image signal obtained by reproducing a still image signal recorded in a frame or field on a magnetic disk by a recording device (not shown) from the magnetic disk with a magnetic head (not shown) is a Y+S signal. and the R-Y/B-Y signal.

The supplied R-Y/B-Y signals are synchronized in the synchronization circuit 2, and then encoded into original signals in the B-Y color encoder 3 and R-Y color encoder 4 in the figure, respectively. After that, in the adder circuit 5, Y+
It is added to the S signal.

Note that the image signal processing circuit shown in FIG. 1 has an ID (not shown) similar to the image signal processing circuit shown in FIG.
A signal detection circuit detects whether the image signal to be reproduced from the magnetic disk is frame recorded or field recorded.
Discrimination is made using the D signal, and FRAM according to the discrimination result.
The E/FIELD signal is supplied to a timing signal generator 7, which is connected to the FRAME/FIELD signal.
In accordance with the FIELD signal, an SGATE signal is generated to control the switching operation of a switch 13, which will be described later.

If the reproduced image signal input by the FRAME/FIELD signal is a signal recorded in the field during recording, the 0.5H delay circuit 6 shown in the figure is used to perform skew compensation processing on the adder circuit. The signal output from 5 is delayed by 0.5H and the 0.5H
The signal that does not pass through the delay circuit 6 is switched every one field period by a switch 13 whose switching operation is controlled by the SGATE signal generated from the timing signal generator 7, and is output from the output terminal indicated by VIDEO OUT in the figure. do.

[0028] In addition, if it is a frame recording signal, SG
Due to the ATE signal, only the signal that does not pass through the 0.5H delay circuit 5 is outputted from the output terminal indicated by VIDEO OUT.

Further, as shown in the figure, the image signal processing circuit shown in FIG. 1 includes an FSC signal (
A signal with a frequency of 4.43361875 MHZ and a phase of 0° is supplied.

In this embodiment, the supplied FSC signal is transferred to a +45° phase shift circuit (hereinafter referred to as +45° P.S.
A signal whose phase is shifted by +45° by 8 (denoted as . , by switching and outputting both signals, the above B-Y
The color encoder 3 is configured to output the B-Y signal as a reference subcarrier (ie, subcarrier SC1) for color encoding.

[0031] By configuring as described above, SGATE
According to the signal, the signal output from the adder circuit 5 is
The signal delayed by 0.5H by the H delay circuit 6 is output to VIDEO.
When outputting from OUT (i.e. phase is 45°)
), the phase of the reference subcarrier is +4
By setting the angle to 5°, the phase delay is canceled.

[0032] The subcarrier SC1 formed as described above has a temperature of 90°P. S. 9 and 270°P. S. 10, the signal is converted into a 90° subcarrier signal whose phase is shifted by 90° and a 270° subcarrier signal whose phase is shifted by 270°, and the signals are supplied to the switch 12,
The switching operation of the switch 12 is controlled by the PALP signal generated by the timing generator 7 in synchronization with the SYNC which is synchronously separated by the synchronous separator 1 from the input Y+S signal, thereby converting the 90° subcarrier signal and 27
By alternately switching and outputting the 0° subcarrier signal every 1H, a subcarrier SC2 for color encoding the R-Y signal is formed in the R-Y color encoder 4, and the R-Y color encoder 4 is supplied to.

[0033] Therefore, since the subcarrier SC2 is also formed based on the subcarrier SC1, the phase delay is canceled in the same way as the subcarrier SC1.

Note that since the timing signal generator 7 that generates the SGATE signal is controlled by the FRAME/FIELD signal, there is no need to delay the encoded signal by 0.5H when performing frame reproduction. ,
In addition, since the phase of the subcarrier SC1 output from the switch 11 is continuously 0°, VIDEOO
The subcarrier phase of the signal output from the UT is always 0° continuously.

FIG. 2 shows a first time chart showing the phase state of the subcarrier signal used during encoding in the image signal processing circuit shown in FIG. 1 described above.

When performing field playback to play back image signals field-recorded during recording, the SGATE signal is encoded every field (every 1V) using the vertical synchronization signal (VD in the figure) as a reference. 0.5H
The delayed signal and the non-delayed signal are alternately switched.

Further, the phase of the subcarrier SC1 used for encoding is set to 0° when the signal output from the adder circuit 5 is not delayed by 0.5H, and is set to +45° when the signal is delayed by 0.5H. For VIDEO
The subcarrier phase of the signal output from OUT is 0.5
If the phase of the signal that is not delayed by H is 0°, then 0.5
The phase of the signal delayed by H also becomes 0° because the 45° phase delay is canceled.

Next, FIG. 3 shows a second time chart showing the phase state of the subcarrier signal used when encoding in the image signal processing circuit shown in FIG.
Shown below.

Note that the time chart shown in FIG.
12 is a time chart showing an enlarged view of the subcarrier phase state during a period in which a signal not delayed by 0.5H is outputted to a period in which a signal delayed by 0.5H is outputted in accordance with the ATE signal; .

As shown in FIG. 3, an FSC signal with a phase of 0° (FSC0° in the figure) and an FSC signal with a phase of +45° (
FSC+45° in the figure), the period during which a signal that is not delayed by 0.5H is output according to the SGATE signal is 0.5°, assuming the phase of subcarrier SC1 is 0°.
The period during which the H-delayed signal is output is subcarrier SC.
1 is +45°, and in the conventional image signal processing circuit, the signal output from VIDEO OUT is 0.5H.
The 45° phase delay of the subcarrier that would have occurred in the case of a delayed signal is canceled, and a signal with a subcarrier phase of 0° is continuously output.

However, according to the SGATE signal, 0.5
0.H from the period in which the non-delayed signal is output.
During the period in which the 5H delayed signal is output, the subcarrier phase is delayed by 45° during the 0.5H period immediately after switching to the 0.5H delayed signal, but this period is normally Since this is a vertical blanking period, there is no fear that color synchronization will be lost in a monitor device, vector scope, etc., causing display disturbances.

FIG. 4 shows a block diagram of an image signal processing circuit as a second embodiment of the present invention.

Note that the image signal processing circuit shown in FIG.
When the present invention is applied to an image signal processing circuit configured to output luminance signals and color signals separately in component states, rather than outputting image signals in a composite state from IDEO OUT. In this case, as shown in the figure, the input Y+S signal is configured to be subjected to skew compensation processing by a dedicated skew compensation circuit and output, instead of being supplied to the adder circuit as in Figure 1. Since the other parts are the same as those of the first embodiment shown in FIG. 1, detailed explanation will be omitted.

As explained above, the standards for performing color encoding in an image signal processing circuit that performs skew compensation processing on an image signal after color encoding during field reproduction as shown in this embodiment are as follows. The phase of the subcarrier SC1, which is a signal, is set to 0° when an image signal that is not delayed by 0.5H is output according to the SGATE signal generated by the timing signal generator 7;
．． When an image signal delayed by 5H is output, by setting it to +45°, the 45° phase delay that conventionally occurred in the subcarrier of an image signal delayed by 0.5H due to skew compensation processing is eliminated. can be canceled out, and the subcarrier phase in the output image signal can be continuously set to 0°.

Therefore, during either field playback or frame playback, no discontinuous points occur in the subcarrier phase of the output image signal, so that color synchronization may be lost on monitors, vector scopes, etc., and the display may be distorted. This makes it possible to prevent disturbances from occurring.

[0046]

[Effects of the Invention] As explained above, according to the present invention, P
It is now possible to provide an image signal processing device that can maintain phase continuity of subcarriers even if skew compensation is performed after color encoding an image signal compliant with the AL television system.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an image signal processing circuit as a first embodiment of the present invention.

FIG. 2 is a first time chart showing the phase state of a subcarrier signal used when encoding in the image signal processing circuit shown in FIG. 1;

FIG. 3 is a second time chart showing the phase state of a subcarrier signal used when performing encoding in the image signal processing circuit shown in FIG. 1;

FIG. 4 is a block diagram of an image signal processing circuit as a second embodiment of the present invention.

FIG. 5 is a block diagram of an image signal processing circuit in a playback device for an electronic still video system based on the conventional PAL television system.

FIG. 6 is a time chart showing the phase state of a subcarrier signal used when encoding in the conventional image signal processing circuit shown in FIG. 5;

[Explanation of symbols]

1 Synchronous separation circuit 2 Simultaneous circuit 3 B-Y encoder 4 RY encoder 5 Adder circuit 6 0.5H delay circuit 7 Timing signal generator 8 Phase shift circuit 9 Phase shift circuit 10 Phase shift circuit 11 Switch 12 Switch 13 Switch

Claims (1)

[Claims] 1. Color encoding means for color encoding and outputting an image signal compliant with the PAL television system, and skew compensation processing means for performing skew compensation processing on the signal output from the color encoding means and outputting the resultant image signal. and 0.5 from the skew compensation processing means.
H (H is one horizontal scanning period) During the period when the delayed signal is output, the phase of the subcarrier signal used for color encoding processing in the color encoding means is shifted, and the phase shift is supplied to the color encoding means. An image signal processing device characterized by comprising means.