JPH0433120B2 - - Google Patents
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- Publication number
- JPH0433120B2 JPH0433120B2 JP58243565A JP24356583A JPH0433120B2 JP H0433120 B2 JPH0433120 B2 JP H0433120B2 JP 58243565 A JP58243565 A JP 58243565A JP 24356583 A JP24356583 A JP 24356583A JP H0433120 B2 JPH0433120 B2 JP H0433120B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- semiconductor compound
- type
- diffused
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- 239000004065 semiconductor Substances 0.000 claims description 24
- 150000001875 compounds Chemical class 0.000 claims description 22
- 239000012535 impurity Substances 0.000 claims description 18
- 239000010410 layer Substances 0.000 description 83
- 238000004544 sputter deposition Methods 0.000 description 13
- 239000002184 metal Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000012190 activator Substances 0.000 description 8
- 239000000758 substrate Substances 0.000 description 8
- 230000003081 coactivator Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 1
- 229910021193 La 2 O 3 Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010893 electron trap Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- -1 oxygen ions Chemical class 0.000 description 1
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
【発明の詳細な説明】
(発明の利用分野)
本発明は、EL表示装置に関するものであり、
詳しくは、超格子構造を利用して発光特性を改良
したEL表示装置に関するものである。[Detailed Description of the Invention] (Field of Application of the Invention) The present invention relates to an EL display device,
More specifically, the present invention relates to an EL display device that utilizes a superlattice structure to improve light emitting characteristics.
(従来技術)
第1図は、従来のEL表示装置の一例を示す構
成説明図であつて、ガラス基板1上に透明電極2
を形成し、その上に発光中心となるMn、Tbなど
の不活剤(アクチベータ;activator)不純物お
よびCl-、Al+などの共付活剤(コアクチベー
タ;coactivator)が拡散されたZnSなどのEL半
導体化合物層(S)3を形成し、このEL半導体化合
物層3の外周を絶縁層(I)4で覆い、絶縁層4の頂
面に金属電極(M)5を形成したものであり、上から
金属電極(M)、絶縁層(I)およびEL半導体化合物層
(S)が積層されていることから、MIS構造とよばれ
ている。第2図は、従来のEL表示装置の他の例
を示す構成説明図であつて、ガラス基板1上に透
明電極2を形成し、その上に透明の絶縁層(I)6を
形成し、この絶縁層6の上にMn、Tbなどの発光
中心となる不純物が拡散されたZnSなどのEL半
導体化合物層(S)3を形成し、このEL半導体化合
物層3の外周を絶縁層(I)4で覆い、絶縁層4の頂
面に金属電極(M)5を形成したものであり、上から
金属電極(M)、絶縁層(I)、EL半導体化合物層(S)お
よび絶縁層(I)が積層されていることから、MISI
構造とよばれている。(Prior Art) FIG. 1 is a configuration explanatory diagram showing an example of a conventional EL display device, in which transparent electrodes 2 are placed on a glass substrate 1.
ZnS, etc., on which deactivator impurities such as Mn and Tb and coactivators such as Cl - and Al + are diffused. An EL semiconductor compound layer (S) 3 is formed, the outer periphery of this EL semiconductor compound layer 3 is covered with an insulating layer (I) 4, and a metal electrode (M) 5 is formed on the top surface of the insulating layer 4, From the top: metal electrode (M), insulating layer (I), and EL semiconductor compound layer
It is called MIS structure because (S) is stacked. FIG. 2 is a configuration explanatory diagram showing another example of a conventional EL display device, in which a transparent electrode 2 is formed on a glass substrate 1, a transparent insulating layer (I) 6 is formed thereon, On this insulating layer 6, an EL semiconductor compound layer (S) 3 such as ZnS in which impurities such as Mn and Tb as a light emission center are diffused is formed, and the outer periphery of this EL semiconductor compound layer 3 is formed as an insulating layer (I). 4, and a metal electrode (M) 5 is formed on the top surface of the insulating layer 4. From above, the metal electrode (M), the insulating layer (I), the EL semiconductor compound layer (S), and the insulating layer (I ) are stacked, so MISI
It is called structure.
しかし、これら第1図および第2図に示した
EL表示装置では、金属電極5が外部雰囲気中に
露出しているために、水蒸気を含む雰囲気中で使
用すると機能が非常に早く劣化してしまう。ま
た、EL半導体化合物層3内にアクチベータとコ
アクチベータが混合拡散されているために、アク
チベータとコアクチベータが最近接状態で対を作
つて発光中心として機能しなくなることが多い。
また、MIS構造では比較的低電圧(数10〜100V)
で駆動できるものの、透明電極2側からEL半導
体化合物層3に酸素イオンが移動侵入することに
より深い電子捕獲準位が形成されて特性が劣化す
る恐れがある。一方、MISI構造では、十分な発
光を得るためには比較的高い電圧(200〜数
100V)で駆動しなければならず、駆動回路が複
雑になつてしまう。このようなMISI構造の欠点
を解決するために、絶縁層4,6として強誘電体
を用いてEL半導体化合物層3に加わる電界の効
率を高めることが試みられてはいるが、十分な効
果を得るようになつていない。 However, as shown in Figures 1 and 2,
In the EL display device, since the metal electrodes 5 are exposed to the external atmosphere, the function deteriorates very quickly when used in an atmosphere containing water vapor. Further, since the activator and coactivator are mixed and diffused in the EL semiconductor compound layer 3, the activator and coactivator often form a pair in the closest proximity and do not function as a luminescent center.
In addition, the MIS structure has a relatively low voltage (several 10s to 100V)
However, when oxygen ions move and enter the EL semiconductor compound layer 3 from the transparent electrode 2 side, a deep electron trapping level is formed and the characteristics may be deteriorated. On the other hand, in the MISI structure, a relatively high voltage (200 to several
100V), which makes the drive circuit complicated. In order to solve these drawbacks of the MISI structure, attempts have been made to increase the efficiency of the electric field applied to the EL semiconductor compound layer 3 by using ferroelectric materials as the insulating layers 4 and 6, but they have not been sufficiently effective. I'm not used to getting it.
(発明の目的)
本発明は、このような点に着目したものであつ
て、その目的は、比較的低電圧で駆動でき、長寿
命のEL表示装置を提供することにある。(Object of the Invention) The present invention has focused on such points, and its object is to provide an EL display device that can be driven at a relatively low voltage and has a long life.
(発明の概要)
このような目的を達成する本発明は、P型不純
物が拡散された複数のEL半導体化合物層とN型
不純物が拡散された複数のEL半導体化合物層と
をこれら不純物が拡散されない純粋EL半導体化
合物層を挟むようにして順次積層したことを特徴
とする。(Summary of the Invention) The present invention achieves the above object by forming a plurality of EL semiconductor compound layers in which P-type impurities are diffused and a plurality of EL semiconductor compound layers in which N-type impurities are diffused, in which these impurities are not diffused. It is characterized by being sequentially stacked with pure EL semiconductor compound layers sandwiched therebetween.
(実施例) 以下、図面を用いて詳細に説明する。(Example) Hereinafter, it will be explained in detail using the drawings.
第3図は本発明の一実施例を示す構成説明図、
第4図はその要部拡大断面図であり、第1図およ
び第2図と同等部分には同一符号を付けている。
第3図において、7はP型不純物が拡散された
EL半導体化合物層(以下P型層という)、8はN
型不純物部が拡散されたEL半導体化合物層(以
下N型層という)、9はこれら不純物が拡散され
ない純粋EL半導体化合物層(以下純粋層という)
であり、これらP型層7およびN型層8は純粋層
9を挟むようにして順次積層されている。 FIG. 3 is a configuration explanatory diagram showing an embodiment of the present invention;
FIG. 4 is an enlarged sectional view of the main part thereof, and the same parts as in FIGS. 1 and 2 are given the same reference numerals.
In Figure 3, 7 is a region in which P-type impurities are diffused.
EL semiconductor compound layer (hereinafter referred to as P-type layer), 8 is N
9 is a pure EL semiconductor compound layer in which these impurities are not diffused (hereinafter referred to as a pure layer).
The P-type layer 7 and the N-type layer 8 are sequentially laminated with a pure layer 9 in between.
このような装置は次のようにして作ることがで
きる。 Such a device can be made as follows.
まず、ガラス基板1上にスパツタにより50nm
〜60nmの厚さの透明電極2を形成する。次に、
透明電極2の上に絶縁層6をスパツタにより
100nm程度の厚さで形成する。この絶縁層6と
しては、La2O3、Al2O3、SiO2、Y2O3、Sm2O3な
どを用いる。なお、絶縁層6の形成にあたつて
は、基板1を数100度に加熱しながらHe雰囲気で
スパツタを行うようにする。HeはArに比べてス
パツタ膜に入り込む割合が極めて小さく、Ar雰
囲気でスパツタを行う場合に比べてより完全な絶
縁層が得られる。続いて、絶縁層6の上にP型層
7をスパツタにより数nm〜数10nmの厚さで形
成する。このP型層7の形成にあたつては、例え
ばZnSにアクチベータとして作用するMn、Tb、
Cuなどの不純物が硫化物として添加されたター
ゲツトを用い、絶縁層6と同様に基板1を数100
度に加熱しながらHe雰囲気でスパツタを行うよ
うにする。このとき、アクチベータとして作用す
る不純物をP型半導体として性格づけできるよう
に従来のEL表示装置に比べて多く拡散するよう
にし、コアクチベータとして作用する不純物が入
らないようにする。このようにしてP型層7に拡
散されるアクチベータはZn++サイトに入り、ア
クセプタになる。続いて、P型層7の上に純粋層
9をスパツタにより数nm〜15nmの厚さで形成
する。この純粋層9の形成にあたつては、不純物
が添加されない純粋のZnSをターゲツトとして用
い、絶縁層6、P型層7と同様に基板1を数100
度に加熱しながらHe雰囲気でスパツタを行うよ
うにする。この純粋層9によりアクチベータとコ
アクチベータが最近接状態で対を作つて発光中心
として機能しなくなることが防止され、電子を加
速する場が形成されることになる。続いて、純粋
層9の上にN型層8をスパツタにより数nm〜数
10nmの厚さで形成する。このN型層8の形成に
あたつては、例えばZnSにコアクチベータとして
作用するTeやClなどの不純物が硫化物や塩化物
として添加されたターゲツトを用い、前記各層と
同様に基板1を数100度に加熱しながらHe雰囲気
でスパツタを行うようにする。このとき、コアク
チベータとして作用する不純物をN型半導体とし
て性格づけできるように従来のEL表示装置に比
べて多く拡散するように形成する。以下同様に、
純粋層9をP型層7およびN型層8で挟むように
して複数層順次積層する。これにより、結晶構造
の連続した超格子構造のEL半導体化合物層が得
られる。このようにしてEL半導体化合物層を複
数層積層した後、これらEL半導体化合物層を覆
うようにして絶縁層6と同様な絶縁層10をスパ
ツタにより数10nm〜数100nmの厚さに形成す
る。そして、この絶縁層10の上に金属電極5を
形成し、さらに、その上に保護層11として例え
ばSiO2をスパツタにより数μm形成する。 First, a 50 nm film was deposited on the glass substrate 1 by sputtering.
A transparent electrode 2 with a thickness of ~60 nm is formed. next,
An insulating layer 6 is formed on the transparent electrode 2 by sputtering.
Form with a thickness of about 100 nm. As this insulating layer 6, La 2 O 3 , Al 2 O 3 , SiO 2 , Y 2 O 3 , Sm 2 O 3 or the like is used. Note that when forming the insulating layer 6, sputtering is performed in a He atmosphere while heating the substrate 1 to several hundred degrees. Compared to Ar, He enters the sputtered film at a much lower rate, and a more complete insulating layer can be obtained than when sputtering is performed in an Ar atmosphere. Subsequently, a P-type layer 7 is formed on the insulating layer 6 by sputtering to a thickness of several nm to several tens of nm. In forming this P-type layer 7, for example, Mn, Tb, which acts as an activator on ZnS,
Using a target to which impurities such as Cu are added as sulfide, the substrate 1 is coated several hundred times in the same manner as the insulating layer 6.
Sputtering should be performed in a He atmosphere while heating to a certain degree. At this time, the impurity acting as an activator is diffused more than in conventional EL display devices so that it can be characterized as a P-type semiconductor, and the impurity acting as a coactivator is prevented from entering. The activator thus diffused into the P-type layer 7 enters the Zn ++ site and becomes an acceptor. Subsequently, a pure layer 9 with a thickness of several nm to 15 nm is formed on the P-type layer 7 by sputtering. In forming this pure layer 9, pure ZnS to which no impurities are added is used as a target, and like the insulating layer 6 and the P-type layer 7, the substrate 1 is
Sputtering should be performed in a He atmosphere while heating to a certain degree. This pure layer 9 prevents the activator and coactivator from forming a pair in their closest proximity and failing to function as a luminescent center, thereby forming a field that accelerates electrons. Next, an N-type layer 8 is formed on the pure layer 9 by sputtering to a thickness of several nanometers to several nanometers.
Form with a thickness of 10 nm. In forming this N-type layer 8, for example, a target in which impurities such as Te and Cl, which act as coactivators, are added to ZnS in the form of sulfide or chloride is used, and the substrate 1 is coated several times in the same manner as in the above-mentioned layers. Sputtering is performed in a He atmosphere while heating to 100 degrees. At this time, the impurity acting as a coactivator is formed to diffuse more than in conventional EL display devices so that it can be characterized as an N-type semiconductor. Similarly below,
A plurality of layers are sequentially stacked such that the pure layer 9 is sandwiched between the P-type layer 7 and the N-type layer 8. As a result, an EL semiconductor compound layer having a superlattice structure with a continuous crystal structure is obtained. After laminating a plurality of EL semiconductor compound layers in this manner, an insulating layer 10 similar to the insulating layer 6 is formed by sputtering to a thickness of several tens of nanometers to several hundreds of nanometers so as to cover these EL semiconductor compound layers. Then, a metal electrode 5 is formed on this insulating layer 10, and a protective layer 11 of, for example, SiO 2 is formed thereon to a thickness of several μm by sputtering.
このような構成において、各純粋層9はPN接
合における空乏層と同様に作用し、電圧印加時に
電子を加速する。そして、加速された電子は各P
型層7のアクチベータを励起し、発光に必要な準
位を形成する。これにより、数10Vの比較的低い
駆動電圧であつても純粋層9を含む領域に高い電
界が発生し、電子の加速が効率良く行われ、極め
て高い発光効率が得られる。また、空乏層はアク
チベータとコアクチベータが最近接状態で対を作
ることを阻止するので、長寿命化が図れる。ま
た、各EL半導体化合物層7,8,9を形成する
のにあたつて、基板1を数100度に加熱しながら
He雰囲気でスパツタを行うので、結晶欠陥の少
ない超格子構造が実現でき、結晶中の各イオンの
移動を抑えることができる。さらに、金属電極5
上に保護層11を設けているので金属電極5側の
耐水性や耐環境性を高めることができ、長寿命が
実現できる。 In such a configuration, each pure layer 9 acts similarly to a depletion layer in a PN junction and accelerates electrons when a voltage is applied. And the accelerated electron is each P
The activator in the mold layer 7 is excited to form a level necessary for light emission. As a result, even at a relatively low driving voltage of several tens of volts, a high electric field is generated in the region including the pure layer 9, electrons are efficiently accelerated, and extremely high luminous efficiency can be obtained. Furthermore, since the depletion layer prevents the activator and coactivator from forming a pair in their closest proximity, a longer life can be achieved. In addition, when forming each EL semiconductor compound layer 7, 8, 9, the substrate 1 is heated to several hundred degrees.
Since sputtering is performed in a He atmosphere, a superlattice structure with few crystal defects can be realized, and the movement of each ion in the crystal can be suppressed. Furthermore, metal electrode 5
Since the protective layer 11 is provided thereon, the water resistance and environmental resistance of the metal electrode 5 side can be improved, and a long life can be achieved.
なお、上記実施例では、EL半導体化合物層を
P型層、N型層および純粋層の3層を積層する例
を説明したが、P型層をさらに2層にしてより発
光効率を高めることができる。すなわち、P型層
を、発光中心になるMnのようなP型不純物が拡
散された第1層と直接的には発光中心にはならな
いCsのようなP型不純物が大量に拡散された第
2層とで構成する。このように構成することによ
り、P型層第2層で発生した正孔がP型層第1層
に入つて発光中心の電子と結合し、発光中心の電
子が空になる。ここにN型層の電子が純粋層を通
して注入されて発光することになり、より発光効
率を高めることができる。 In the above example, an example was explained in which the EL semiconductor compound layer is made up of three layers: a P-type layer, an N-type layer, and a pure layer. However, it is also possible to further increase the luminous efficiency by adding two more P-type layers. can. In other words, the P-type layer is divided into a first layer in which a P-type impurity such as Mn, which becomes a luminescent center, is diffused, and a second layer, in which a large amount of P-type impurity such as Cs, which does not directly become a luminescent center, is diffused. It consists of layers. With this configuration, holes generated in the second P-type layer enter the first P-type layer and combine with electrons at the luminescence center, thereby emptying the electrons at the luminescence center. Here, electrons from the N-type layer are injected through the pure layer and light is emitted, making it possible to further increase the luminous efficiency.
また、これらの積層数に応じて発光しきい値や
発光強度を任意の値に設定することができる。 Furthermore, the emission threshold and emission intensity can be set to arbitrary values depending on the number of these layers.
(発明の効果)
以上説明したように、本発明によれば、比較的
低電圧で駆動でき、長寿命のEL表示装置が実現
できる。(Effects of the Invention) As described above, according to the present invention, an EL display device that can be driven at a relatively low voltage and has a long life can be realized.
第1図および第2図は従来のEL表示装置の一
例を示す構成説明図、第3図は本発明の一実施例
を示す構成説明図、第4図はその要部拡大断面図
である。
1……ガキ、2……透明電極、4,6,10…
…絶縁層、5……金属電極、7……P型層、8…
…N型層、9……純粋層。
1 and 2 are structural explanatory diagrams showing an example of a conventional EL display device, FIG. 3 is a structural explanatory diagram showing an embodiment of the present invention, and FIG. 4 is an enlarged sectional view of the main part thereof. 1... Gaki, 2... Transparent electrode, 4, 6, 10...
...Insulating layer, 5...Metal electrode, 7...P-type layer, 8...
...N-type layer, 9...pure layer.
Claims (1)
合物層とN型不純物が拡散された複数のEL半導
体化合物層とをこれら不純物が拡散されない純粋
EL半導体化合物層を挟むようにして順次積層し
たことを特徴とするEL表示装置。1 A plurality of EL semiconductor compound layers in which P-type impurities are diffused and a plurality of EL semiconductor compound layers in which N-type impurities are diffused are separated into pure layers in which these impurities are not diffused.
An EL display device characterized in that EL semiconductor compound layers are sequentially laminated with sandwiching them.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58243565A JPS60134278A (en) | 1983-12-23 | 1983-12-23 | El display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58243565A JPS60134278A (en) | 1983-12-23 | 1983-12-23 | El display |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60134278A JPS60134278A (en) | 1985-07-17 |
JPH0433120B2 true JPH0433120B2 (en) | 1992-06-02 |
Family
ID=17105728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58243565A Granted JPS60134278A (en) | 1983-12-23 | 1983-12-23 | El display |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60134278A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2547340B2 (en) * | 1988-03-22 | 1996-10-23 | 株式会社小松製作所 | Thin film EL device |
WO2011158368A1 (en) * | 2010-06-18 | 2011-12-22 | 光文堂印刷有限会社 | Direct-current-driven inorganic electroluminescent element and light emitting method |
JP5103513B2 (en) * | 2010-10-08 | 2012-12-19 | シャープ株式会社 | Light emitting device |
-
1983
- 1983-12-23 JP JP58243565A patent/JPS60134278A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60134278A (en) | 1985-07-17 |
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