JPH04322129A - Power supply unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] The present invention relates to a system for parallel operation of power supply units, and in particular, in parallel operation and parallel redundant operation of a plurality of power supply units, it facilitates adjustment of the output voltage of each power supply unit, and also facilitates adjustment of the output voltage of each power supply unit. The present invention relates to a parallel operation method that can maintain a normal current balance function even when a failure occurs.

0002

[Background Art] Recently, the amount of power required for electronic equipment such as information processing equipment has increased due to the increase in the amount of data to be processed.As a result, parallel operation of power supply units for the purpose of large capacity and high reliability has increased. are doing. There are two types of parallel operation of power supply units: one with redundancy and one without. FIG. 5 shows parallel operation without redundancy, and FIG. 6 shows parallel operation with redundancy. In Figure 5, each capacity is 5
0A power supply units PWR1 and PWR2 to 100A
connected in parallel to load LD1 of 50A to each power supply unit.
Control is carried out so that the current is applied to each unit.

On the other hand, in FIG. 6, power supply units PWR1 and PWR2, both of which have a capacity of 50A, are connected in parallel to a 50A load LD2, and each power supply unit carries a current of 25A. Through such redundant operation,
Even when one power supply unit becomes inoperable due to a failure or the like, the load current (50A) can be covered by the other power supply unit, improving the reliability of the power supply system. It is also possible to connect another 50A power supply unit in parallel to the parallel system of FIG. 5 to form a redundant operation system.

In any parallel operation system, in order to further improve reliability, it is important to adjust the output voltage of each power supply unit and to perform current balance (CB) to balance the output current. Various circuit systems have been devised.

FIG. 7 shows the basic configuration of a parallel operation system for power supply units that has been widely used in the past. Power supply units PWR11, PWR12, and PWR13 have the same internal configuration, and each has an input terminal IN, output terminals +OUT and -OUT, and a CB (current balance) terminal. Each input terminal IN is connected to an input voltage,
Each output terminal +OUT is commonly connected to one terminal of the load R, and each output terminal -OUT is commonly connected to the other terminal of the load R.

[0006] Power supply units PWR11, PWR12, P
The output currents of WR13 are Io1, Io2, and Io, respectively.
Set it to 3. Power supply unit PWR11, PWR12, PW
The CB terminals of R13 are interconnected by a common line LN. Each output current Io1, Io2, Io3
When the lines are balanced, no current flows through the line LN, resulting in a state similar to that where the line LN does not exist. However, as will be described later, when an unbalance occurs in the output current, current flows in either direction in the line LN, which activates the current balance adjustment circuit in the power supply unit to maintain the output current in balance. It looks like this.

FIG. 8 shows, in order to explain current balance,
An example of a power supply unit is shown. FIG. 9 is an equivalent circuit of the circuit of FIG. In FIG. 8, the DC input voltage is
is applied to the primary side of The secondary side of transformer T generates an output voltage between output terminals +OUT and -OUT via a rectifier circuit (diodes D21 and D22, coil L, capacitor C1). The output voltages of power supply units PWR11 and PWR12 are set to Vo1 and Vo1, respectively.
Set it to 2. The output voltage (Vo1, Vo2) is
It is input to the (-) terminal of the operational amplifier 11 as output voltages (Vs1, Vs2) detected through. A reference voltage E is connected to the (+) terminal of the operational amplifier 11.

The operational amplifier 11 outputs a voltage proportional to the difference between the voltages at the (-) and (+) terminals to the PWM control circuit 12. The PWM control circuit 12 performs PWM/FM control of the input current by controlling the transistor Tr based on the value of the output voltage from the operational amplifier 11. This controls the output current. The output voltage is determined by resistor R2
It is also applied to the series circuit of 1, R22, and R23. A connection point between resistors R22 and R23 is connected to one end of a capacitor C2, which will be described later. The other end of capacitor C2 is current balance terminal (CB1, CB2), current transformer CT, diode D23, resistor R24, capacitor C
2 detects a voltage proportional to the input current and generates it across capacitor C2. This voltage, PWR11
and PWR12, Vi 1 and Vi
Set it to 2.

By interconnecting the CB1 and CB2 terminals, the relationship between the voltages in the circuit of FIG. 8 can be shown as shown in FIG. The voltage across each resistor R23 of power supply units PWR11 and PWR12 is set to V.
If R 1 and VR 2, VR 1 and VR
2 varies according to the output voltage of each power supply unit. Through the CB1 and CB2 terminals and point P, V
i 1 , Vi 2 , VR 1 , and VR 2 form a loop, and Vi 1 and Vi 2 and VR 1 and VR 2 are voltages in opposite directions, respectively.

The current balance operation of the circuits shown in FIGS. 8 and 9 will be explained. First, the output voltage of the two power supply units PWR11 and PWR12 is Vo1=Vo
2 and the current is balanced, VR 1=VR
2, Vi 1=Vi 2, terminals CB1, CB2
The current between them becomes Ii=0. Therefore, the two power supply units perform the same operation as when the respective terminals CB1 and CB2 are not connected. Next, when Vo1>Vo2, Io1>I
o2, so Vi 1 > Vi 2, and current Ii flows from CB2 to CB1. Also, VR 1>
It will be VR 2.

As a result, the operational amplifier 11 and the PWM control circuit 12 of the power supply unit PWR11 output voltage Vo.
The operational amplifier 11 and PWM control circuit 12 of the power supply unit PWR12 operate to lower the output voltage V
It works to increase o2. And Vo1=Vo2
, Io1=Io2, the above control operation stops. When Vo1<Vo2, the operation is opposite to the above. As described above, parallel operation with well-balanced output currents is achieved.

FIGS. 10 and 11 show a block diagram and detailed circuit diagram of an example of a conventional power supply unit. Figure 10
And in FIG. 11, the current detection circuit 1 has an output current I
Outputs a voltage Va proportional to out. The matching circuit 2' consists of a resistor RB, and has one end connected to the output current detection circuit 1 and the other end connected to the CB terminal. resistor RB
One end of is connected to the (-) terminal of the operational amplifier A3 of the comparator circuit 3 via a resistor R5. The other end (CB terminal) of resistor RB is connected to operational amplifier A via resistor R6.
It is connected to the (+) terminal of 3.

The comparator circuit 3 uses an operational amplifier A3 to
Compare voltages Va and VCB, amplify the difference, and obtain voltage V
Output c. Vc is at a high level (
This is the voltage that becomes “H”). Voltage Vc is applied to the (+) terminal of operational amplifier 11 via diode D4 of synthesis circuit 4. The reference voltage generation circuit 7 is a circuit that generates a voltage VG that serves as a reference for the output voltage, and is connected to the power supply VC.
C, resistors R11, R12, R13, operational amplifier SR with built-in power supply, and variable resistor V. Consists of ADJ. The value of the output voltage VG is determined by the resistance V. It is set by adjusting ADJ.

The output of the reference voltage generating circuit 7 is connected to the (+) terminal of the operational amplifier 11 through a resistor R9 of the combining circuit 4. The synthesis circuit 4 generates a reference voltage Vref based on the output voltage Vc of the comparator circuit 3 and the output voltage VG of the reference voltage generation circuit 7, and outputs it to the (+) terminal of the operational amplifier 11.
Supply to the terminal. Reference voltage Vr generated by synthesis circuit 4
When the output voltage Vc of the comparison circuit 3 is 0V, the diode D4 is off, so ef becomes equal to the output voltage VG of the reference voltage generation circuit 7. However, Vc is “H”
”, diode D4 turns on and Vref
has a value larger than VG. Operational amplifier 11 (-)
The output voltage detection circuit 10 is connected to the terminal by resistors R1 and R.
A voltage divided by 2 is applied. This voltage and Vre
The difference in f is amplified and sent to the PWM/FM control circuit.

The operation of each power supply unit when the power supply units shown in FIGS. 7, 10, and 11 are operated in parallel will be explained below. (1) Adjustment of output voltage The conventional method for adjusting the output voltage of power supply units operating in parallel is to monitor the voltage Vo at the load end and the output currents Io1, Io2, and Io3 of each power supply Unit output voltage adjustment resistor V. Adjust ADJ and set each reference voltage Vref.

(2) Adjustment of output current balance When the output currents Io1, Io2, and Io3 of each power supply unit PWR11, PWR12, and PWR13 are balanced, the output voltage VC of the comparison circuit 3 of each power supply unit becomes 0V. . This means that the CB terminal of each power supply unit is connected to the C terminal of the other power supply unit.
This is the same as not being connected to the B terminal. Now, for example, if Io1<Io2, Io3, the power supply unit P
In WR11, VCB>Va, and Vc is “H”.
”. When Vc becomes “H”, the operational amplifier 11 and the PWM control circuit 12 operate to increase the current Io1. In this way, the output currents Io1 and Io2
, Io3 balance is obtained.

[0017]

[Problems to be Solved by the Invention] The conventional parallel operation system of power supply units as described above has the following problems. The output voltage is adjusted by adjusting the V. of the reference voltage generation circuit 7 of each power supply unit as described above. It is necessary to adjust the ADJ resistance, but in this case, the V. A
If DJ is increased all at once, the output current will be biased toward one unit beyond the capability range of the current balance function, resulting in overcurrent droop. Therefore, the V. of each power supply unit. I had to make adjustments many times by alternating the ADJ resistance in small increments. Therefore, adjustment requires skill and a large number of measuring instruments, and takes a lot of time. Furthermore, as the number of parallel power supply units increases, the monitoring points, adjustment locations, and adjustment time during adjustment increase, making the task extremely difficult. Therefore, there has been a need for a circuit system that can easily adjust the output voltage in a short time.

Furthermore, the conventional current balance circuit has the following drawbacks. Power supply unit PWR11, PWR
12. For example, if PWR 12 goes down while PWR 13 is operating in parallel, Io2 = 0, Va of PWR 12 = 0
It becomes V. Therefore, PWR11 and PWR13 are Va
>VCB, Vc would become 0V, and the current balance function would be lost. Additionally, if an overvoltage condition occurs in one power supply unit, the current balance circuit described above will cause the other power supply units to increase their output voltages, resulting in a voltage drop even for normal power supply units. Ta. In particular, if the above phenomenon occurs during parallel redundant operation, the redundant function may be lost due to the addition of the current balance function. The present invention eliminates the drawbacks of the above-mentioned prior art, makes it possible to adjust the output voltage easily and in a short time, and does not lose the current balance function even if the power supply unit goes down due to a failure etc. In redundant operation,
The purpose of this invention is to provide a parallel operation method for power supply units that does not impair redundant functions.

[0019]

[Means for Solving the Problems] The parallel operation method of power supply units according to the present invention is such that each of the reference voltages of a plurality of power supply units that are connected in parallel to a load and each of which determines the output voltage based on the reference voltage is , and is configured to include means for supplying from one location. Each of the plurality of power supply units includes a circuit that generates an adjustable reference voltage, a circuit that transmits the output voltage of the reference voltage generation circuit to itself and all other power supply units, and a circuit that generates an adjustable reference voltage. and a circuit that determines an output voltage based on the received reference voltage. Each of the power supply units described above also includes an output current detection circuit that detects a first voltage representing the output current value, and a terminal that detects a second voltage representing the output current of other power supply units operating in parallel. , compares the first and second voltages with an ideal diode connected between the output current detection circuit and the above-mentioned terminals, and when the first voltage is smaller than the second voltage, the received reference voltage is applied to the first and second voltages. The output current is increased so that the difference between the two voltages disappears, thereby balancing the output current. Further, each power supply unit is configured to include an upper limit value circuit and a lower limit value circuit that respectively set an upper limit and a lower limit of the reference voltage.

[0020]

[Operation] With the above configuration, one of the plurality of power supply units is set as a master, and the others are set as slaves, and the master receives the reference voltage from its own reference voltage generation circuit, and each slave receives the reference voltage from the master's reference voltage generation circuit. Connect like this. By connecting in this way, the reference voltages of all power supply units can be raised or lowered to the same level simultaneously by adjusting one part of the master reference voltage generation circuit, making it easy to adjust the output voltage. Become. In addition, by matching the output current of a power supply unit with the output current of other power supply units using an ideal diode, even if one of the power supply units goes down, the remaining power supply units will not be affected. Normal current balance function can be demonstrated without any interference. Furthermore,
The above upper limit value circuit and lower limit value circuit can suppress the rise or fall of the reference voltage to below the specified value.
Safe operation is possible even when the reference voltage rises or falls abnormally due to a failure in the reference voltage generation circuit.

[0021]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. 1 to 3 show the configuration of an embodiment of the present invention. Figure 1 is a diagram showing parallel operation of three power supply units PWR1, PWR2, and PWR3 having the same internal configuration, Figure 2 is a block diagram showing the internal configuration of each power supply unit, and Figure 3 is a detailed circuit of each power supply unit. It is a diagram. In FIG. 1, each power supply unit has output terminals +OUT and -OUT, a current balance terminal CB, a reference voltage output terminal VBO, and a reference voltage input terminal VBI. Each +O
The UT terminal is connected to one end of the load R, and each -OUT terminal is connected to the other end of the load R. Each CB terminal has a common line LN
Connected with Three power supply units PWR1 to PWR3
One of them, for example, PWR1, is set as a master unit, and the others (PWR2, PWR3) are set as slave units. In the master unit (PWR1), VBI and V
Connect the BO terminal directly. VBI of each slave unit
Connect the terminal to the VBO terminal of the master unit, and
Leave the terminal open.

In FIGS. 2 and 3, output current detection circuit 1 outputs a voltage Va proportional to output current Iout. Matching circuit 2 includes operational amplifier A2 and diode D3.
It is an ideal diode consisting of Operational amplifier A2 (
The output voltage Va of the output current detection circuit 1 is applied to the +) terminal. A diode D3 is connected between the output terminal of the operational amplifier A2 and the CB terminal with the forward direction being from the operational amplifier A2 to the CB terminal. Also, the operational amplifier A2 (
-) terminal is connected to the CB terminal. As the voltage VCB generated at the CB terminal, the largest Va among the three units is output. The ideal diode configured in this way has Va
<In the case of VCB, it is completely off and the power supply unit is not affected by external voltage.

Both ends (voltages Va and VCB) of the ideal diode 2 are connected to the (-) and (+) terminals of the operational amplifier A3 of the comparator circuit 3 via resistors R5 and R6, respectively. The operational amplifier A3 amplifies the difference between the voltages Va and VCB and supplies it to the (+) terminal of the operational amplifier A4 through the diode D4 of the synthesis circuit 4. The synthesis circuit 4 is
A resistor R9 connected between the (+) terminal of the operational amplifier A4 and the ground combines the output voltage Vc of the comparator circuit 3 and the input voltage of the VBI terminal, which will be described later, to create a reference voltage Vref.
generate.

The reference voltage generation circuit 7 includes a power supply VCC, resistors R11, R12, R13, an operational amplifier SR with a built-in reference voltage, and a voltage adjustment variable resistor V. ADJ, variable resistor V. Reference voltage VG adjustable by ADJ
occurs. The output VG of the reference voltage generation circuit 7 is sent to the outside from the VBO terminal by the drive circuit 9. As mentioned above, in the master unit (PWR1), VB
The O terminal and the VBI terminal are directly connected, and the VBO terminals of the slave units (PWR2, PWR3) are open. Therefore, the output VG of the reference voltage generation circuit 7 of PWR1
is input to the VBI terminals of PWR1 itself, PWR2, and PWR3.

In each power supply unit, the VBI terminal is connected to the (+) terminal of the operational amplifier A4 of the combining circuit 4 via the receiving circuit 8 and resistor R10. That is, the synthesis circuit 4 of all power supply units PWR1, PWR2, and PWR3 is the reference voltage generation circuit 7 of the master unit PWR1.
The reference voltage VG generated in is received as a common reference voltage.

The output voltage Vref of the synthesis circuit 4 is input to the (+) terminal of the operational amplifier 11. The operational amplifier 11 outputs the output voltage detected by the output voltage detection circuit 10 and V
ref and supplies the difference to the PWM/FM control circuit 12. The PWM/FM control circuit 12 controls the output voltage using this voltage. An upper limiter 5 and a lower limiter 6, which will be described in detail later, are connected to the output terminal of the synthesis circuit 4 to clamp the upper and lower limits of the voltage Vref.

The operation will be explained below. (1) Adjustment of output voltage Each power supply unit has its own adjustable reference voltage VG. One of them, PWR1, is designated as a master, and the reference voltage VG of this master is supplied to the reference voltage input terminal VBI of the master itself and other slave power supply units, so that the output voltage of each power supply unit is set to the master's reference voltage. Controlled by voltage VG. In other words, the adjustment resistor V. of the master power supply unit PWR1. By adjusting the ADJ, the output voltages of multiple power supplies can be adjusted simultaneously and
It can be raised or lowered to the same level. Therefore, adjustment can be performed very easily and in a short time.

(2) Balance of output currents First, when the output currents of the power supply units PWR1 to PWR3 are balanced, the output VC of the comparator circuit 3 becomes 0V. Therefore, each power supply unit performs the same operation as when the CB terminal is not connected. Next, if the output current of one power supply unit becomes larger than that of other power supply units, for example, Io
1. When Io2<Io3, Va of PWR3 is applied to the CB terminal of each power supply unit. Therefore, in PWR1 and PWR2, VCB>Va, and as a result, Vc becomes "H" and Vref rises. Therefore, PWR1 and PWR2 are controlled to increase the output voltage. As a result, Io1=Io2=
The output voltage is controlled to be Io3. thus,
Parallel operation with balanced output current is realized.

Next, when one of the power supply units, for example PWR2, goes down during operation, Io2=0 and Va of PWR2 becomes 0V. However, the larger value of Va is applied to the CB terminals of PWR1 and PWR3, and therefore a current balance function works between power supply units PWR1 and PWR3. (3) If the upper limiter operation reference voltage generation circuit 7 fails and VG rises abnormally, each power supply unit performs control to increase the output voltage based on this VG. Furthermore, when an overvoltage condition occurs in one power supply unit, there is a possibility that other power supply units may also become overvoltage due to the function of the current balance circuit described in item (2) above. The upper limiter 5 is a circuit whose purpose is to stop the increase in the output voltage to a certain level. If the output voltage of the power supply is 5V and R1=R2, then Vref =
It becomes 2.5V. Here, the upper limit of the output voltage is 5.2V.
Then, set E5 = 2.6V and apply it to the (+) of the operational amplifier 11 through the ideal diode circuit (A5, D5).
) is supplied to the terminal. If Vref is 2.6V or less,
The ideal diode circuit is turned off. Vref >2.6
Vre, the ideal diode circuit turns on and Vre
f is clamped to 2.6V. Therefore, the output voltage can be suppressed to 5.2V or less.

(4) If the operating reference voltage generation circuit 7 of the lower limit limiter fails and VG drops abnormally, each power supply unit can perform control to lower the output voltage based on this VG and stop the operation of the load. There was sex. The lower limiter 6 is a circuit whose purpose is to stop this decrease in output voltage to a certain level. Lower limit of output voltage is 4.8
V, set E6 = 2.4V, and pass this through the ideal diode circuit (A6, D6) to the operational amplifier 11 (
+) terminal (Vref). Under normal control, the ideal diode circuit is off. Vr
When ef <2.4V, the ideal diode circuit turns on and clamps Vref to 2.4V. Therefore, the output voltage can be prevented from dropping below 4.8V.

As described above, according to this embodiment, the output voltages of a plurality of power supply units can be adjusted easily and in a short time by adjusting them at one location. Furthermore, even if a power supply unit stops due to a failure during parallel operation, normal current balance control can be performed between the remaining power supply units. Furthermore,
The upper and lower limits of the reference voltage are suppressed by preset values, and there is no abnormal rise or fall.

FIG. 4 shows another embodiment of the invention. Figure 4
, each power supply unit PWR1, PWR2, PW
The VBI terminal of R3 is connected to the power supply control device 15. In this way, the reference voltage VG for all power supply units can be distributed from a device other than the power supply units. Of course, this case is not limited to the power supply control device 15.

[0033]

According to the present invention, in a system of parallel operation of a plurality of power supply units, the output voltages of all power supply units can be adjusted by adjusting one location. Therefore, the output voltage can be adjusted easily and in a short time, contributing to more efficient operation of the power supply system. Furthermore, even if a power supply unit fails during parallel operation, normal current balance operation is performed between the remaining power supply units. Therefore, it contributes to improving the reliability of the parallel-operated power supply system.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram of each power supply unit in FIG. 1;

FIG. 3 is a circuit diagram of each power supply unit in FIG. 1;

FIG. 4 is a diagram showing another embodiment of the present invention.

FIG. 5 is a diagram showing parallel operation of power supply units.

FIG. 6 is a diagram showing parallel redundant operation of power supply units.

FIG. 7 is a diagram showing an example of conventional technology.

FIG. 8 is a diagram for explaining current balance.

FIG. 9 is a diagram showing an equivalent circuit of the circuit in FIG. 8;

10 is a block diagram of each power supply unit in FIG. 7. FIG.

11 is a circuit diagram of each power supply unit in FIG. 7. FIG.

[Explanation of symbols]

1 Output current detection circuit 2 Matching circuit (ideal diode) 2'
Matching resistor 3 Comparison circuit 4 Synthesizing circuit 5 Upper limiter 6 Lower limiter 7 Reference voltage generation circuit 8 Receiving circuit 9 Drive circuit 10 Output voltage detection circuit 11 Operational amplifier 12 PWM control circuit 13, 14 Operational amplifier 15 Power supply control device A1 to A9 Operational amplifier CB, CB1, CB2 Current balance terminal C1,
C2 Capacitor CT Transformer D1~D6, D21~D24 Diode L
Coil LN Connection wire +OUT, -OUT Output terminal Io1, Io2, Io3, IR, Iout, Ii
Current PWR1, PWR2, PWR3, PWR1
1, PWR12, PWR13 power supply unit R, LD1, LD2 Load R0 to R13, R24 to R30, RB Resistor SR Operational amplifier T Transformer VBI Reference voltage input terminal VBO Reference voltage output terminal V. ADJ Adjustable variable resistor Vo1, Vo2, Vo3 Output voltage Vi 1, V
i2, Va Detection input voltage VCB CB
Terminal voltage VR 1, VR 2, VS 1, VS 2, VS 3,
VS 4, VCC voltage Vref, VG reference voltage

Claims (5)

[Claims] 1. The power supply unit is characterized by comprising means for supplying each reference voltage of a plurality of power supply units connected in parallel to a load and determining each output voltage based on the reference voltage from one place. Parallel operation method for power supply units. 2. Each of the plurality of power supply units includes a circuit that generates an adjustable reference voltage, and a circuit that transmits the output voltage of the reference voltage generation circuit to itself and all other power supply units; 2. The parallel operation system for power supply units according to claim 1, further comprising a circuit for receiving a reference voltage transmitted from another power supply unit, and a circuit for determining an output voltage based on the received reference voltage. 3. Each of the plurality of power supply units includes an output current detection circuit that detects a first voltage representing an output current value, and a second voltage detection circuit that represents the output current of another power supply unit operating in parallel. A terminal for detecting voltage, an ideal diode connecting between the output current detection circuit and the terminal, and first and second voltages are compared, and when the first voltage is smaller than the second voltage, the received The reference voltage is set to the first and second
increase the voltage so that the difference in voltage disappears, thereby
3. The parallel operation system for power supply units according to claim 2, further comprising a circuit for controlling output currents to balance them. 4. The parallel operation method of power supply units according to claim 3, wherein each of the plurality of power supply units has an upper limit circuit for suppressing an increase in the reference voltage to a preset value. . 5. The parallel operation method of power supply units according to claim 3, wherein each of the plurality of power supply units has a lower limit circuit for suppressing a decrease in the reference voltage to a preset value. .