JPH04312920A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent dielectric strength from decreasing, by forming s cutout space in a lower wiring layer in a region where upper and lower wirings overlap each other with an interlayer insulating layer in between. CONSTITUTION:A strip of a cutout space 11a formed in an aluminum wiring 11 is about 3mum in width and 10mum in length. In this case, the aluminum wiring 11 is about 50mum in width, so an effective width is about 10mum for each separated wiring. Since a generation rate of a hillock depends on the thickness of an aluminum wiring, the generation rate of the hillock can be lowered in an area on the aluminum wiring 11, where the cutout space 11a has been formed. In this way, dielectric strength can be prevented from decreasing and the reliability can be improved.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a multilayer wiring structure, and more particularly to a wiring structure that prevents the occurrence of hillocks that cause stress on interlayer insulating films.

0002

2. Description of the Related Art FIGS. 4 and 5 are a plan view and a cross-sectional view showing a multilayer wiring pattern of a conventional semiconductor device of this kind. In the figure, 1 is a first aluminum wiring formed on a substrate 2, 3 is a second aluminum wiring formed overlying the first aluminum wiring 1 with an interlayer insulating film 4 in between, and 5 is a first aluminum wiring formed on a substrate 2. This is a hillock generated on the upper surface of the first aluminum wiring 1.

In a semiconductor device having a conventional multilayer structure constructed as described above, in a two-layer aluminum wiring structure as shown in the figure, the first aluminum wiring 1 and the second aluminum wiring 2 cross or cross each other. Many parallel overlapping parts occur. Additionally, when using aluminum wiring, in order to prevent electromigration caused by current flowing through the wiring, wiring that carries a large amount of current, such as power lines and grounding lines, must have a current density below a certain level. The wiring width is formed to be wide.

On the other hand, aluminum wiring has the property of generating hillock 5 due to heat treatment during wafer processing.
The frequency of occurrence of hillocks depends on the area of the aluminum wiring, that is, the wiring width. Therefore, as shown in the figure, hillocks 5 are generated in large numbers and at a high level even on the first aluminum wiring 1, which is formed with a wide wiring width in order to suppress the current density.

[0005]

[Problems to be Solved by the Invention] Since the conventional semiconductor device is constructed as described above, it is difficult to avoid the problem in the area where the wide first aluminum wiring 1 and the second aluminum wiring 3 intersect, that is, in the overlapping area. In this case, the hillock 5 generated on the first aluminum wiring 1 protrudes into the interlayer insulating film 4 and comes abnormally close to the second aluminum wiring 3, or in the worst case, it breaks through the interlayer insulating film 4 and damages the second aluminum wiring. There was a problem in that the contact with the aluminum wiring caused a decrease in dielectric strength and impaired reliability.

[0006] This invention was made to solve the above-mentioned problems, and suppresses the occurrence of hillocks in the wiring on the lower layer side between the wirings in the area where adjacent wirings overlap, thereby increasing the dielectric strength. It is an object of the present invention to provide a semiconductor device whose reliability can be improved by preventing a decrease in .

[0007]

SUMMARY OF THE INVENTION In a semiconductor device according to the present invention, a cutout is formed in a lower wiring layer in a region where adjacent wiring lines overlap with each other with an interlayer insulating film interposed therebetween.

[0008]

[Operation] The cutout formed in the wiring on the lower layer side of the semiconductor device according to the present invention suppresses the occurrence of hillocks on the wiring and prevents a decrease in dielectric strength.

[0009]

[Example] Example 1. 1 and 2 are a plan view and a cross-sectional view showing a pattern of multilayer wiring of a semiconductor device in Example 1 of the present invention. In the figure, 11 is a substrate 12
A plurality of strip-shaped cutouts 11a are formed in a region of the first aluminum wiring formed above that overlaps with a second aluminum wiring, which will be described later. 13 is above the first aluminum wiring 1,
A second aluminum wiring 15 formed overlappingly with an interlayer insulating layer 14 in between is a hillock generated on the upper surface of the first aluminum wiring 11.

In the semiconductor device according to the first embodiment configured as described above, the strip-shaped cutout 11a formed in the first aluminum wiring 11 has dimensions of approximately 3 μm in width and 10 μm in length; This means that the effective line width of the 50 μm line width of the first aluminum wiring 11 is divided into about 10 μm. Therefore, since the frequency of hillock occurrence depends on the line width of the aluminum wiring as described above, the occurrence of hillocks in the area where the cutout 11a on the first aluminum wiring 11 is formed is suppressed. be done.

Example 2. FIG. 3 is a plan view showing a multilayer wiring pattern of a semiconductor device in Example 2 of the present invention. As is clear from the figure, the difference from Example 1 is that the cutout 11b formed in the area of the first aluminum wiring 11 overlapping with the second aluminum wiring 13 is formed in a square shape of about 3 μm. Similarly to the cutout 11a in the first embodiment, this cutout 11b also limits the effective line width to suppress the occurrence of hillocks 15.

0012

As described above, according to the present invention, by forming a cutout in the wiring on the lower layer side of the wirings in a region where adjacent wirings overlap with each other through an interlayer insulating film, It is possible to provide a semiconductor device that can suppress the occurrence of hillocks in wiring, prevent a decrease in dielectric strength, and improve reliability.

[Brief explanation of drawings]

FIG. 1 is a plan view showing a multilayer wiring pattern of a semiconductor device in Example 1 of the present invention.

FIG. 2 is a cross-sectional view showing a multilayer wiring pattern of a semiconductor device in Example 1 of the present invention.

FIG. 3 is a plan view showing a multilayer line pattern of a semiconductor device in Example 2 of the present invention.

FIG. 4 is a front view showing a multilayer wiring pattern of a conventional semiconductor device.

FIG. 5 is a cross-sectional view showing a multilayer wiring pattern of a conventional semiconductor device.

[Explanation of symbols]

11 First aluminum wiring 11a Cutout 12 Board 13 Second aluminum wiring 14 Interlayer insulation film 15 Hillrock

Claims (1)

[Claims] 1. A semiconductor device having a plurality of wiring layers, characterized in that in a region where adjacent wirings overlap with each other with an interlayer insulating film interposed therebetween, a cutout is formed in the wiring on the lower layer side of the wirings. Device.