JPH04305894A - Static memory cell - Google Patents

Abstract

PURPOSE:To attain a RAM capable of setting initial values freely like a ROM by an IC mask at the time of turning-on of a power supply. CONSTITUTION:A first contact 103 is added to the output of a first inverter 100 and a second contact 113 is added to the output of a second inverter 110. Then a capacitance element 130 grounded at one end and the capacitance contact 133 are added. Either the second contact 103 or the second contact 113 is electrically connected to the capacitance contact 133 based on the selection of IC mask.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to static memory cells, and more particularly to an initial value setting circuit when power is turned on.

0002

2. Description of the Related Art Conventional static memory cells of this type have been constructed of a bistable flip-flop circuit and a selection circuit for reading and writing to the flip-flop circuit. An example of the circuit is shown in Figure 2.
Shown below.

In FIG. 2, this circuit constitutes a bistable flip-flop by interconnecting a first inverter 100 and a second inverter 110. A first selection circuit 10 consisting of a transistor
1 is the output of the first inverter 100, and the second selection circuit 111 consisting of a transistor is the output of the second inverter 110.
The outputs of the first inverter 100 and the second inverter 110 are connected to the first input/output section 102 and the second input/output section, respectively, by the signal of the memory cell selection signal terminal 120.
Connect or disconnect from the input/output section 112 of. The first and second input/output sections 102, 112 are connected to other memory cells having the same configuration and serve as data input/output signals for the memory.

In selecting a memory cell, a specific memory cell is selected by a signal from a memory cell selection signal terminal 120, and during reading, signals from the first and second input/output sections 102 and 112 are compared externally and extracted. . At the time of writing, data is written by forcibly giving data values to the first and second input/output units 102 and 112 from the outside. The first and second inverters 100 and 110 are designed to have as weak an electrical driving capacity as possible, so that it is possible to change the data value forcibly provided.

[0005]

Since the conventional static memory cell described above has a symmetrical circuit structure, its state immediately after power is turned on is undefined. Therefore, conventionally, read-only memory (hereinafter referred to as RO) was used for applications requiring non-volatility.
For applications that require rewriting of memory cells (referred to as M), static memory cells and dynamic memory cells (referred to as
(generally referred to as RAM), and used them differently. However, with this method, in fields where the data has an initial value when the power is turned on and needs to be rewritten thereafter, it is necessary to transfer data from the ROM to the RAM when the power is turned on.

[0006] The purpose of the present invention is to solve the above problems and to
An object of the present invention is to provide a static memory cell that eliminates the need to transfer data from OM to RAM.

[0007]

Means for Solving the Problems The present invention has a configuration in which the output of a first inverter is connected to the input of a second inverter, and the output of the second inverter is connected to the input of the first inverter. In a static memory cell equipped with a bistable flip-flop, a capacitive element is provided, a third contact is provided at one end of the capacitive element, and a third contact is provided at one end of the capacitive element;
A first contact is provided at the output of the inverter corresponding to the third contact, and a second contact is provided at the output of the second inverter corresponding to the third contact. .

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit diagram showing a static memory cell according to an embodiment of the present invention.

In FIG. 1, in the static memory cell of this embodiment, a first contact 103 is added to the output of the first inverter 100, a second contact 113 is added to the output of the second inverter 110, and one end is grounded. A capacitive element 130 and a capacitive contact 133 are added to one of the capacitive elements 130.

In this embodiment, the first contact 103 and the capacitive contact 133 are connected using an IC mask at the time of manufacture.
A case in which they are electrically connected will be explained with reference to FIG. Before the power is turned on, since no potential is applied to each signal line, the capacitive element 130 is in a discharge state due to leakage current or the like. When the power is turned on, voltage is simultaneously applied to the first inverter 100 and the second inverter 110 from the power source. At this time, since the output of the first inverter 100 is connected to the capacitive element 130, the output of the second inverter 100 is connected to the capacitive element 130.
Compared to the output of 10, the voltage rise is slower.

Generally, in the case of bistable flip-flops as shown in FIG. 1, since their outputs are applied to each other's inputs, the flip-flops are stabilized in the direction of increasing the level difference due to the level difference between the inputs. In this case, the output of the first inverter 100 acts in the direction of 0V, the output of the second inverter 110 acts in the direction of becoming the power supply voltage, and the stored value is determined when the output voltage becomes stable. In FIG. 1, a first inverter 1
If the output of 00 is defined as 0V as information "0" and the power supply voltage as information "1", it is assumed that this static memory cell is initialized to "0" when the power is turned on.

Similarly, if the second contact 113 and the capacitive contact 130 are connected at the time of manufacture, the static memory cell is assumed to be initialized to "1" when the power is turned on, contrary to the case described above. It will be done.

[0013] Also, the first and second input/output sections 102, 1
A certain data value is given from 12, and the first and second selection circuits 101,
When 111 is opened, a specified voltage is forcibly applied from the outside to the first and second inverters 100, 110 and the capacitive element 130, and the input data value is correctly written by charging and discharging the charges.

The static memory cell of this embodiment includes a capacitive element that is grounded on one side and has a contact on the other side, and a contact that can be electrically connected to the contact using an IC mask that can be selected at the time of manufacture. By providing each of the two outputs of the bistable flip-flop circuit, it is possible to provide a memory that has a user-specific initial value when the power is turned on and can be written to arbitrarily thereafter.

[0015]

As described above, the present invention has the advantage that by adding a capacitor to one side of the bistable flip-flop circuit of a static memory cell, an initial value at power-on can be specified.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a static memory cell according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a conventional static memory cell.

FIG. 3 is a circuit diagram showing an example of how the memory cell of FIG. 1 is used.

[Explanation of symbols]

100 First inverter 101 First selection circuit 102 First input/output section 103 First contact 110 Second inverter 111 Second selection circuit 112 Second input/output section 113 Second contact 120 Memory cell selection signal 130 Capacitive element 133 Capacitive contact

Claims (1)

[Claims] 1. A static flip-flop comprising a bistable flip-flop, the output of a first inverter being connected to the input of a second inverter, and the output of the second inverter being connected to the input of the first inverter. In the memory cell, a capacitor is provided, a third contact is provided at one end of the capacitor, and the third contact is connected to the output of the first inverter.
A static memory cell characterized in that a first contact is provided corresponding to the contact, and a second contact is provided at the output of the second inverter corresponding to the third contact.