JPH04304627A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PURPOSE:To improve step coverage of metal wiring in contact hole without allowing increase of contact resistance by providing a spacer consisting of a conductor film at a side wall of the contact hole. CONSTITUTION:The N-type diffused layers 102, 106 are laid on the surface of a P-type silicon substrate 101 and a contact hole 110 extending to the N-type diffused layer 106 is bored to an insulating layer 103 laid on the P-type silicon substrate 101. At the side wall of contact hole 110, a spacer polycrystalline silicon layer 105 is provided to give inclination to the side wall. A high melting point metal silicide layer 108 is formed on the surface of spacer polycrystalline silicon layer 105 and N-type diffused layer 106 in the contact hole 110. A high melting point metal film 107 is laid just under aluminium wiring 109. Thereby, the top coverage of the metal wiring in the contact hole can be improved.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, the present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to an insulating film on a semiconductor substrate for electrically connecting an active region provided on the surface of the semiconductor substrate and metal wiring in the semiconductor device. The present invention relates to a structure of a provided contact hole and a method of manufacturing the same.

0002

[Prior Art] As a conventional semiconductor device, for example, FIG.
There are some things shown below. This semiconductor device has an N-type diffusion layer 202 on the surface of a P-type silicon substrate 201, and an N-type diffusion layer 202 on an insulating film 203 provided on the P-type silicon substrate 201.
A contact hole 210 reaching 02 is formed. The sidewalls of contact hole 210 are generally vertical. moreover,
It has an aluminum wiring 209 electrically connected to the N-type diffusion layer 202 through a contact hole 210.

In the above configuration, the contact hole 210
is formed by removing only a predetermined portion of the insulating film 203 by anisotropic etching using a photoresist method. The aluminum wiring 209 is obtained by etching an aluminum film deposited by sputtering.

0004

However, in the conventional semiconductor device, as shown in FIG. 8, the contact hole is formed by anisotropic etching, so the sidewall thereof is formed approximately vertically. For this reason, it is difficult to deposit a metal film such as an aluminum film by sputtering, and breaks in the metal wiring often occur at this portion. This tendency becomes particularly noticeable when the diameter of the contact hole becomes submicron. There is also a taper etching method that widens the contact hole by sloping the sidewall of the contact hole, but if the contact area between the metal wiring and the active region in the contact hole is not reduced, the area occupied by the contact hole will increase. With the miniaturization of semiconductor devices, the width and spacing of metal wiring also need to be miniaturized, making it difficult to employ such technology.

[0005]

[Means for Solving the Problems] The present invention has been made in view of the above-mentioned problems, and includes providing a spacer made of a conductive film on the side wall of a contact hole so that the side wall has an inclination.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

A P-type silicon substrate 101 has N-type diffusion layers 102 and 106 on its surface, and a contact hole 110 reaching the N-type diffusion layer 106 is formed in an insulating film 103 provided on the P-type silicon substrate 101. There is. contact hole 11
A spacer polycrystalline silicon layer 105 is provided on the sidewall of 0, so that the sidewall portion has a slope. Spacer polycrystalline silicon layer 1 in contact hole 110
05 and the N-type diffusion layer 106, a high melting point metal silicide layer 108 is formed. contact hole 11
The aluminum wiring 109 is electrically connected to the N-type diffusion layer 102 through the aluminum wire 109 . A high melting point metal film 107 is provided directly below the aluminum wiring 109.

FIGS. 2 to 6 are cross-sectional views showing step-by-step process steps for explaining a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

First, arsenic is applied to a predetermined region of the surface of the P-type silicon substrate 101 at an energy of 70 keV and a dose of 5×1.
Ion implantation is performed at a concentration of 0.015 cm -2 to form an N-type diffusion layer 102 . Thereafter, an insulating film 10 with a thickness of about 700 nm is formed on the entire surface of the silicon substrate 101 by a vapor phase growth (CVD) method.
form 3. Subsequently, anisotropic etching is performed using a photoresist method to form a contact hole 110a at a predetermined position in the insulating film 103 (FIG. 2). The side wall of the contact hole 110a at this stage is approximately vertical.

Next, a film with a thickness of 30 mm was deposited on the entire surface by low pressure CVD.
A polycrystalline silicon film 104 of about 0 nm is deposited [FIG.
]. The contact hole 110a uses the low pressure CVD method.
This is because the coverage of the stepped portion is good.

Next, polycrystalline silicon film 104 is anisotropically etched to form spacer polycrystalline silicon layer 105 only on the sidewall of contact hole 110a. As a result, a contact hole 110b having a spacer made of a conductive film on the side wall is formed. During this etching, the silicon substrate on the surface of the N-type diffusion layer 102 is also slightly etched. In order to prevent the increase in junction leakage current caused by this, phosphorus was added at an energy of 100 keV and a dose of 1.
×1015cm-2 ion implantation, N type diffusion layer 106
(Figure 4). By this ion implantation, the spacer polycrystalline silicon layer 105 is also changed to N type at the same time, thereby avoiding a reduction in the effective contact area in the contact hole.

Next, for example, a film made of titanium with a thickness of 10
A high melting point metal film 107 of about 0 nm is deposited over the entire surface by sputtering [FIG. 5]. Subsequently, 60 minutes in a nitrogen atmosphere
Heat treatment is performed at 0° C. for 40 minutes, and the high melting point metal film 107, the spacer polycrystalline silicon layer 105 and the N-type diffusion layer 10 are
A silicidation reaction is caused at the interface with 6, and the film thickness is 7.
A high melting point metal silicide layer 108 of about 0 nm is formed [FIG. 6]. Since this reaction proceeds isotropically, the contact hole 1 of the high melting point metal film 107 formed by sputtering is
Even if step coverage in step 10b is somewhat poor, a substantially uniform refractory metal silicide layer 108 is formed on the surface of spacer polycrystalline silicon layer 105. The high melting point metal silicide layer 108 formed on the N-type diffusion layer 106 functions as a barrier metal between the N-type diffusion layer 106 and a metal wiring formed in a later process.

Next, a film with a thickness of 0.8 was deposited on the entire surface by sputtering.
By depositing an aluminum film with a thickness of approximately μm and patterning the aluminum film and the high melting point metal film 107, an aluminum wiring 109 having a high melting point metal film 107 directly below it is formed.
A semiconductor device having the structure shown in FIG. 1 is obtained. The high melting point metal film 107 directly under the aluminum wiring 109 helps improve migration resistance.

Although titanium is used as the high melting point metal in this embodiment, other high melting point metals such as molybdenum and tungsten can also be used. In addition, in this example, a polycrystalline silicon film was used as a spacer provided on the side wall of the contact hole, but low pressure CVD film with good step coverage was used.
A conductive film that can be formed by a method can be used. For example, a reduction reaction between a halogenated high melting point metal gas and hydrogen using a low pressure CVD method, a silicidation reaction between a halogenated high melting point metal gas and a silane gas using a low pressure CVD method, etc. can be used.

FIG. 7 is a sectional view for explaining a second embodiment of the present invention. After forming the refractory metal silicide layer 108 in the same manner as in the first embodiment, NH4 OH and H2
The unreacted high melting point metal film is selectively removed using an aqueous solution containing O2, and then aluminum wiring 109 is formed. In this embodiment, the process of forming the metal wiring is simpler than in the first embodiment, and the same method as the conventional method can be adopted.

[0016]

As explained above, the present invention reduces the effective contact area between the metal wiring and the active region (contact resistance is reduced) by providing a spacer made of a conductive film on the side wall of the contact hole. The step coverage of the metal wiring in the contact hole can be improved without increasing the contact hole.

[Brief explanation of drawings]

FIG. 1 is a sectional view for explaining a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the process order for explaining the first embodiment of the present invention.

FIG. 3 is a cross-sectional view of the process order for explaining the first embodiment of the present invention.

FIG. 4 is a cross-sectional view of the process order for explaining the first embodiment of the present invention.

FIG. 5 is a cross-sectional view of the process order for explaining the first embodiment of the present invention.

FIG. 6 is a cross-sectional view of the process order for explaining the first embodiment of the present invention.

FIG. 7 is a sectional view for explaining a second embodiment of the present invention.

FIG. 8 is a cross-sectional view for explaining a conventional semiconductor device and its manufacturing method.

[Explanation of symbols]

101, 201 P-type silicon substrate 102, 10
6,202 N-type diffusion layer 103,203
Insulating film 104 Polycrystalline silicon film 105 Spacer polycrystalline silicon layer 107
High melting point metal film 108 High melting point metal silicide layer 109, 209
aluminum wiring

Claims (7)

[Claims] Claim 1: An insulating film formed on a semiconductor substrate;
an active region formed on the surface of the semiconductor substrate; a contact hole provided in the insulating film having substantially vertical sidewalls and reaching the active region; and electrically connected to the active region through the contact hole. 1. A semiconductor device comprising: a metal wiring formed of a conductive film having a higher resistance than a metal forming the metal wiring on the side wall of the contact hole; 2. The semiconductor device according to claim 1, wherein the conductor film is made of at least one of a high melting point metal film, a polycrystalline silicon film, and a high melting point metal silicide film. 3. Forming an active region on the surface of the semiconductor substrate,
forming an insulating film on the semiconductor substrate; forming a contact hole in the insulating film having a substantially vertical sidewall reaching the active region; and forming a conductive film on the entire surface by low pressure vapor phase growth. a step of etching back the conductor film to form a spacer made of the conductor film on the side wall of the contact hole; using a metal having a lower resistance than the conductor constituting the conductor film; A method of manufacturing a semiconductor device, comprising the step of forming a metal wiring electrically connected to the active region through the contact hole. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the conductive film is a polycrystalline silicon film. 5. After forming the spacer, the method further comprises the steps of: forming a high melting point metal film on the entire surface; and siliciding a part of the high melting point metal film by heat treatment. 4. The method for manufacturing a semiconductor device according to 4. 6. The method for manufacturing a semiconductor device according to claim 5, further comprising the steps of: siliciding a part of the high melting point metal film by heat treatment; and removing the high melting point metal film. . 7. The method of manufacturing a semiconductor device according to claim 3, wherein the conductor film is a high melting point metal film or a high melting point metal silicide film.