JPH0430060B2 - - Google Patents

Description

[Detailed Description of the Invention] This invention requires a permanent main program memory in which a main unit control program is written, and an optional program memory in which a control program for an optional device that can be selectively connected to the main unit is written. The present invention relates to a method for determining the presence/absence of an optional program memory in a control device that is expanded in accordance with the demand.

For example, some copying machines are designed to allow optional devices (peripheral devices) such as automatic document feeder (ADF), semi-automatic document feeder (SADF), and sorter to be selectively connected at any time. .

Incidentally, in such a copying machine, as shown in FIG. The input port _I0 pulled up by the resistor _R1 in the input/output interface 6a in the control device 6 of the copying machine 1 is
Since the ground circuit 2a on the ADF 2 side drops to the low level "0", the central processing unit (CPU) in the control device 6 performs copying by checking the level of the input port _I0 . Machine 1
It can be determined whether ADF2 is connected to.

When the control device 6 confirms that the ADF 2 is connected, it starts controlling the ADF 2 as well as the control related to the copying machine 1.

However, in the control device 6 of the copying machine 1, although the main program memory (ROM) in which the copying machine control program is written is permanently installed, the ADF
The ADF program memory (ROM) in which the control program described in 2 is written can be expanded later as needed, so if the control device 6 itself cannot determine whether there is an ADF program memory, the following will occur. problems occur.

In other words, when the CPU in the control device 6 starts program processing after only confirming that the ADF 2 is connected as described above, it attempts to execute the program regardless of whether there is program memory for the ADF. If the ADF program memory is forgotten to be added, the control device 6 will run out of control when attempting to execute the ADF program.

This invention was made in view of the above points, and it is possible to selectively connect multiple optional devices such as an ADF or a sorter to a main device such as a copying machine, and the control device is a central processing unit. (CPU)
A main program memory containing a program for controlling the main unit by the CPU is permanently installed.
The optional program memory in which control programs for each of the plurality of optional devices are written can be expanded as needed, and when any of the optional devices is connected to the main device, Enable the CPU to reliably determine whether or not the optional program memory of the optional device has been expanded;
The purpose is to prevent the control device from running out of control.

In order to achieve the above object, the present invention provides the following method for determining the presence or absence of an optional program memory in the above-described control device.

Predetermined data different for each option is written in a predetermined address of the option program memory of each of the plurality of option devices.

It also pulls up or pulls down the data bus line of the CPU in the control device to identify the data content that is input to the CPU when the data bus line is open.

Then, when any one of a plurality of optional devices is connected to the main device, the CPU specifies a predetermined address from among the address group allocated to the optional program memory of the connected optional device, and Whether or not the content of the data input to the CPU via the data bus line by specifying the predetermined address matches the content of the data that should be written to the predetermined address of the program memory for the option. By checking , it is determined whether the optional program memory of the optional device connected to the main device has been expanded.

Embodiments of the present invention will be described below with reference to FIG. 2 and subsequent drawings.

FIG. 2 is a block diagram showing an embodiment of the present invention, and parts corresponding to those in FIG. 1 are given the same reference numerals.

In the figure, a control device 6 of a copying machine 1 includes a central processing unit (CPU) 7 and an address/input unit for this CPU 7.
A data memory (RMA) 9, first to third program memories (ROM) 10 to 12, an input/output interface (I/O) 13, etc. connected via a data bus line 8 and a control bus line (not shown). It is composed of.

The first ROM 10 is a main program memory in which a copying machine control program is written and is permanently installed in the control device 6, and the second ROM
11 is the control program for ADF2, and the third
The ROM 12 is an optional program memory in which control programs for the sorter 14 are written, and is added to each control device 6 as necessary.

In addition, the input ports I ₀ and I ₁ of the I/O 13 are pulled up by resistors R ₁ and R ₂ respectively, and the input port I ₀ is connected to the ADF 2 through the connectors 3 and 4 and the connection cable 5 to the copying machine 1. Only when connected
The ground circuit 2a of the ADF 2 drops to low level "0", and the input port _I1 is connected to the ground of the sorter 14 only when the sorter 14 is connected to the copying machine 1 via the connectors 15, 16 and the connection cable 17. It falls to a low level "0" by the circuit 14a.

Note that signals from various sensors and operation input means in the copying machine 1 are input to other input ports (not shown) of the I/O 13, and driver circuits for various drive units in the copying machine 1 are connected to the output port. has been done.

Then, as shown in FIG.
The data bus line 8a in the address/data bus line 8 of the CPU 7 is pulled up by resistors _R3 to _R10 , and the data bus line 8a of the control device 6 is pulled up when the data bus line 8a becomes open for reasons described later. The data content input to the CPU 7 is specified as _FFH .

FIG. 4 is a memory map diagram showing address groups allocated to the first to third ROMs 10 to 12.

As shown in the figure, the first ROM 10 has 000H to
The address of _3FFH is 400H~ in the second ROM11.
The address of _7FFH is 800H in the third ROM12.
~ BFF _H addresses are assigned respectively, and the second
For example, data “00000000” is written in the first address 400H of the third ROM 11, and data “01111000”, for example, is written in the first address 800H of the third ROM 12.

In this way, predetermined data that differs for each option is written at a predetermined address (in the above example, the start address) of the program memory for each option.

In addition, if CPU 7 is of the Intel 8080 series,
“00000000” (00H) is a NOP instruction, “01111000”
(78H) NOV A, B command.

Next, the processing contents of the CPU 7 in the control device 6 will be explained with reference to the flowchart shown in FIG.

The program shown in the flowchart in Figure 5 is as follows:
It is assumed that the program is nested in the copying machine control program written in the first ROM 10 in FIG.

First, in STEP 1, it is checked whether the level of the input port _I0 in the I/O 13 in FIG. 2 is "1", and if it is "1", the process goes to STEP 2, and if it is "0", the process goes to STEP 3.

That is, as shown in FIG.
If ADF2 is connected, input port I ₀ is
In this case, the second
Execute the program for ADF2 in ROM11
First, proceed to STEP 3 to proceed to STEP 5. Conversely, if the ADF 2 is not connected to the copying machine 1, the input port _I0 remains at the high level "1" state pulled up by the resistor _R1 . , in this case, proceed directly to STEP 2 without proceeding to STEPs 3 to 5.

In STEP 2, it is checked whether the level of the input port _I1 in the I/O 13 is "1" as shown in FIG. If so, STEP 6
Proceed to.

That is, if the sorter 14 is connected to the copying machine ₁ as shown in FIG. is the third
First, proceed to STEP 6 to execute the program for the sorter 14 in the ROM 12. Conversely, if the sorter 14 is not connected to the copying machine 1, input port I ₁
is still at high level “1” pulled up by resistor _R2 , so in this case,
The program does not proceed to STEPs 6 to 8, but proceeds to the next step in the copying machine control program in the first ROM 10.

In STEP 3, since it was checked in STEP 1 that ADF 2 is connected to copier 1, the second
Chip select only the second ROM11 in the figure, specify the address as 400H, and select the second ROM11.
Read the contents written at address 400H of No. 11.

By doing this, the second
If ROM11 is added, the second ROM1
00H written in the first address 400H of 1
is input to the CPU 7, and if the second ROM 11 is not added, the data bus line 8a will be in an open state because no chips other than the second ROM 11 are selected or enabled. As shown in FIG. 3, data _FFH is input to the CPU 7 because it is pulled up by resistors R ₃ to R ₁₀ .

Next, in STEP 4, check whether the content input to the CPU 7 in STEP 3 is 00H.
If it is 00H, proceed to STEP 5, if it is not 00H
Proceed to STEP 2.

In other words, in this STEP 4, the CPU in STEP 3
The presence or absence of the second ROM 11 is determined by checking whether the contents input to 7 match the contents of address 400H of the second ROM 11, and if they match, the second ROM 11 is checked. ROM11 has been added, so proceed to STEP 5 and install the second ROM11.
After sequentially executing the program for ADF2 written in ROM11 from the first address 400H
Proceed to STEP 2, and if they do not match, the second ROM 11 has not been added even though the ADF 2 is connected, so proceed directly to STEP 2.

Similarly, in STEP 6 to 8, address 800H
The contents input to the CPU 7 by specifying the contents 78H of the address 800H of the third ROM 12
The presence or absence of the third ROM 12 is determined by comparing with If there is no expansion, proceed directly to the next step.

And by doing this, the ADF
2 or sorter 14 are connected to the copying machine 1, the second ROM 11 or the third ROM 1
Even if CPU 2 is not added, the CPU 7 will not run out of control and will operate normally.

In addition, in STEP 1 and 2 of Figure 5, the input port
Although the criterion for I ₀ and I ₁ is set to "1", it may be set to "0".

However, in this case, it is necessary to reverse the destination based on the determination result from that shown in FIG.

Furthermore, in FIG. 5, when it is determined that the second ROM 11 or the third ROM 12 has not been added, the determination result may be displayed.

Furthermore, in the above embodiment, the second and third ROM1
Although we have described an example in which the data at the start addresses of the second and third ROMs 11 and 12 are used as the data used to determine the presence or absence of ROMs 1 and 12, data at any address may be used. Of course.

However, if there is an address where the operation code _FFH (RST7, which is one of the eight restart instructions for Intel 8080 series) is written in the data in the second and third ROMs 11 and 12, then Address data is not available.

Furthermore, in the above embodiment, an example was described in which the data bus line was pulled up, but when the data bus line is pulled down and the data bus line is in an open state,
The data content input to the CPU 7 may be specified as 00H.

In the above embodiment, the ADF 2 and the sorter 14 were used as examples of optional devices connectable to the copying machine 1, but the same applies to the semi-automatic document feeder (SADF), collator, coin rack, etc. Can be implemented.

Furthermore, this invention is not limited to control devices for copying machines;
Any control device can be similarly applied as long as it is capable of selectively connecting a plurality of optional devices to the main device and can add program memory for a plurality of options as necessary.

As explained above, according to the present invention, when an optional device is connected to the main device, the CPU in the control device of the main device determines whether the connected optional device has an optional program memory or not. Since it can be determined whether the program is running or not, the control device will not run out of control as in the conventional case.

In addition, since the check data at the predetermined address of each option program memory is made different for each option, it is possible to check the wrong entries when a plurality of option program memories are added at the same time.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining a control device to which the present invention is applied, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a data bus line of the control device shown in FIG. The circuit diagram shown in Figure 4 shows how the
The ROM memory map diagram, Figure 5, is the same as Figure 2.
FIG. 3 is a flow diagram showing part of a program executed by the CPU. 1... Copying machine (main device), 2... Automatic document feeder (ADF) [optional device], 3, 4, 15,
16... Connector, 5, 17... Connection cable,
6...Control device, 7...Central processing unit (CPU), 8...Address/data bus line,
8a...Data bus line, 10...First program memory (main program memory), 11...
a second program memory (option program memory), 12... third program memory (option program memory);

Claims (1)

[Claims] 1. A central processing unit and a main program memory in which a main unit control program written by the central processing unit is permanently installed, and each of a plurality of optional devices can be selectively connected to the main unit. In a control device in which optional program memories each having an independent control program written therein can be expanded as necessary, predetermined data different for each option is stored at a predetermined address of the optional program memory of each of the plurality of optional devices. , and pulls up or pulls down the data bus line of the central processing unit to specify the data content that is input to the central processing unit when the data bus line is open; When any of the plurality of optional devices is connected, the central processing unit specifies the predetermined address from among the address group allocated to the optional program memory of the connected optional device, and The content of the data input to the central processing unit via the data bus line by the designation of the predetermined address matches the content of the data that should be written to the predetermined address of the option program memory. A method for determining the presence or absence of an optional program memory, characterized in that it is determined whether or not the optional program memory of the optional device connected to the main device has been expanded by checking whether the optional program memory is installed.