JPH04296030A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To satisfactorily fill up multiple contact holes different in depths with a metal for covering the upper layer wiring efficiently. CONSTITUTION:After the formation of an insulating film 2 and the first aluminum wiring 3 on a semiconductor substrate 1, a silicon oxide film 4, a silica film 5 and another silicon oxide film 6 are formed. Next, after the formation of the second aluminum wiring 7, the other silicon oxide film 8, another silica film 9 and the other silicon oxide film 10 are formed. Next, the first contact hole 11 is made and then tungsten 13 is selectively deposited to be buried in this contact hole 11. Finally, after the formation of the other oxide film 14 on the whole surface, the second contact hole 15 is made and then the tungsten 13 is selectively deposited to bury this contact hole 15.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having an electrical connection portion of wiring.

0002

2. Description of the Related Art An example of a conventional method for manufacturing a semiconductor device will be described with reference to FIG. 11, which is a sectional view showing the order of steps.

As shown in part A of FIG.
1, an insulating film 52 and a first electrode wiring 53 (aluminum wiring here) are formed. Next, when forming a second electrode wiring (aluminum in this case) on the first aluminum wiring 53, an insulating film 54 is formed on the first aluminum wiring 53 as shown in part B of FIG. A contact hole 55 is formed in the insulating film 54 on the first aluminum wiring 53 by etching, and the aluminum 56 for wiring is formed.
is deposited by sputtering. Next, as shown in part C of FIG. 11, the wiring aluminum 56 is patterned to form a second aluminum wiring 57.

However, the above-mentioned conventional method for manufacturing semiconductor devices has the drawback that as the degree of integration of the IC increases, the size of the contact hole becomes smaller, and the aspect ratio increases, the aluminum wiring becomes more likely to break. . As a means to solve this problem, a method is known in which fine contact openings are filled by selective growth of metallic tungsten. This will be explained using FIG. 12.

As shown in part A of FIG. 12, a contact hole 55 is formed in the insulating film 54 on the first aluminum wiring 53 by anisotropic etching, and then the contact hole 55 is exposed at the contact portion. selectively growing metallic tungsten 58 on the first aluminum wiring 53 for an appropriate period of time;
The contact opening 55 is filled with metal tungsten 58. Next, as shown in part A of FIG. 12, aluminum for wiring is deposited by sputtering and patterned to form a second aluminum wiring 59. If this method is used, the upper surface of the contact becomes flat, and it is possible to prevent the aluminum wiring from breaking at the step of the contact.

[0006]

The conventional manufacturing method described above has the disadvantage that contact stages of different heights cannot be buried well. This will be explained using FIGS. 13 and 14.

FIG. 13 is a cross-sectional view showing a part of the manufacturing process of a semiconductor chip having a multilayer electrode wiring structure. As shown in part A of FIG. 13, an insulating film 60, a first aluminum wiring 61, an insulating film 62, a second aluminum wiring 63, and an insulating film 64 are formed on a semiconductor substrate 59, and here the first aluminum wiring 61 or Contact openings 65 and 66 reaching the second aluminum wiring 63 are formed. Here, as is clear from the drawing, the contact opening 65
The height of the contact step and the contact opening 66 are different. If metal tungsten 67 is selectively grown in this state, the contact openings 66 are sufficiently filled, but the contact openings 65 are not sufficiently filled. Next, when the third aluminum wiring 68 is formed, as shown in part B of FIG. 13, a break in the aluminum occurs at the contact opening 65.

In order to prevent step breaks in the aluminum wiring, it is possible to partially open the contact holes by isotropic etching, but if this is done, as shown in FIG. This causes an inconvenience in that it spreads out and protrudes beyond a predetermined area. As shown by the broken line in Fig. 14, if the amount of isotropic etching is suppressed to prevent the contact hole from expanding even in the shallow part of the contact stage, a tall vertical step will remain in the deep part of the contact stage, and this can be removed using metallic tungsten. This makes it difficult to obtain good aluminum wiring coverage.

[0009] For this reason, in multilayer electrode wiring, for example, a jump connection connecting a first aluminum wiring and a third aluminum wiring has never been seen before.

0010

[Means for Solving the Problems] The manufacturing method of the present invention includes forming a flat first insulating film on a first electrode wiring, and forming a second electrode wiring on the first insulating film. , forming a second insulating film flat on the second electrode wiring, and forming a first contact opening reaching the second electrode wiring in the second insulating film; burying the first contact hole by selective growth of a first conductor material; forming a third insulating film on the surfaces of the second insulating film and the first conductor material; forming a second contact hole reaching the first electrode wiring in an insulating film, a second insulating film, and a third insulating film; and embedding by selective growth of a conductive material.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIGS. 1 to 6 are cross-sectional views of a semiconductor chip showing a process procedure for explaining an embodiment of the present invention.

As shown in FIG. 1, after forming an insulating film 2 and a first aluminum wiring 3 on a semiconductor substrate 1, a silicon oxide film 4 is grown to a thickness of 0.6 μm by plasma vapor deposition. . Next, a silica film 5 is formed using a spin coating method, and a silicon oxide film 6 is further formed to a thickness of 0.3 μm.
A first interlayer insulating film is grown to a thickness of m and is planarized.

Next, as shown in FIG. 2, after forming the second aluminum wiring 7, a silicon oxide film 8 with a thickness of 0.6 μm, a silica film 9 with a thickness of 0.3 μm, and a silicon oxide film with a thickness of 0.3 μm are formed in the same manner. 10 is formed, and a second interlayer insulating film is formed.

Next, as shown in FIG. 3, in order to provide the first contact hole 11 at a desired position of the second aluminum wiring 7, a photoresist 12 is used as a mask in carbon tetrafluoride gas plasma. Then, the second interlayer insulating film is selectively etched away.

Next, as shown in FIG.
With respect to the surface of the second aluminum wiring 7 exposed in step 1,
Tungsten 13 is selectively grown to fill the contact hole 11.

Next, as shown in FIG. 5, in order to cover the surface of the buried tungsten 13, a silicon oxide film 14 is grown to a thickness of 0.1 μm over the entire surface using plasma vapor deposition, and then a first aluminum wiring is formed. 3. Said first
A second contact hole 15 is formed by the same method as the contact hole 11, and the contact hole 14 is filled with tungsten 16 by the same method as the tungsten 12.

Next, as shown in FIG.
After etching away the entire surface of tungsten 16 to expose the surface of tungsten 16, a third aluminum wiring 17 is formed.
The first aluminum wiring 3 and the second aluminum wiring 7 are connected through the embedded tungsten 13 and 16. The tungsten does not necessarily have to grow to completely fill the contact hole, but may leave a level difference that does not cause a problem in the level difference coverage in the contact hole portion of the third aluminum wiring. For example, for a contact hole diameter of 1.0 μm, there may be a depth of 0.3 μm or less after embedding. However, it is not preferable to grow excessively beyond the surface of the second insulating film.

Further, it is obvious from the spirit of the present invention that the same effect can be obtained as long as the material to be buried is a material other than tungsten described in this embodiment, such as molybdenum, which can be selectively grown and can be used for semiconductor devices. That's true.

Next, other embodiments of the present invention will be described with reference to the drawings.

FIGS. 7 to 10 are cross-sectional views of a semiconductor chip showing process steps for explaining other embodiments of the present invention.

As shown in FIG. 7, the semiconductor substrate 1 is
An insulating film 2, a first aluminum interconnect 3, a first insulating film, a second aluminum interconnect 7, and a second insulating film are formed thereon.

Next, as shown in FIG. 8, in order to form a first contact hole 18 at a desired position of the first aluminum wiring 3, a photoresist is used as a mask in carbon tetrafluoride gas plasma. The first insulating film and the second insulating film are selectively etched away, and the first contact hole 18 is formed.
Tungsten 19 is selectively grown on the exposed surface of the first aluminum wiring 3 to fill the contact hole 18.

Next, as shown in FIG. 9, in order to cover the surface of the buried tungsten 18, a silicon oxide film 20 is grown to a thickness of 0.1 μm over the entire surface using plasma vapor deposition, and then a second aluminum wiring is formed. A second contact hole 20 is filled with tungsten 22 at a desired position of No. 7 in the same manner as the first contact hole 18 .

Next, as shown in FIG.
After etching away the entire surface of the tungsten 19 and exposing the surface of the tungsten 19, a third aluminum wiring 17 is formed. Make a connection with

In other words, in one embodiment, the contact hole connected to the second aluminum wiring 7, that is, the shallow contact hole, is formed before the contact hole connected to the first aluminum wiring 3, that is, the deep contact hole. This embodiment is different in that a contact hole connected to the first aluminum wiring 3, that is, a deep contact hole is formed first.

[0027]

As explained above, the present invention can bury a plurality of fine contact holes having different depths by selectively growing a conductor, and can uniformly form the steps of the contact portion after burying. Even in the case of a jump connection connecting the first wiring and the third wiring, stable wiring connection with good coverage at the contact portion is possible. Therefore, a semiconductor device having a highly reliable fine multilayer electrode wiring structure can be realized.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a semiconductor device after one manufacturing process according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device after the next manufacturing step in FIG. 1;

FIG. 3 is a cross-sectional view of the semiconductor device after the next manufacturing step in FIG. 2;

FIG. 4 is a cross-sectional view of the semiconductor device after the next manufacturing process shown in FIG. 3;

FIG. 5 is a cross-sectional view of the semiconductor device after the next manufacturing step in FIG. 4;

FIG. 6 is a cross-sectional view of the semiconductor device after the next manufacturing step in FIG. 5;

FIG. 7 is a cross-sectional view of a semiconductor device after one manufacturing process according to another embodiment of the present invention.

FIG. 8 is a cross-sectional view of the semiconductor device after the next manufacturing process of FIG. 7;

FIG. 9 is a cross-sectional view of the semiconductor device after the next manufacturing step in FIG. 8;

10 is a cross-sectional view of the semiconductor device after the next manufacturing step in FIG. 9;

FIG. 11 is a cross-sectional view of a semiconductor device shown in order of steps for explaining a conventional semiconductor device manufacturing method.

FIG. 12 is a cross-sectional view of a semiconductor device shown in order of steps for explaining a conventional semiconductor device manufacturing method.

FIG. 13 is a cross-sectional view of a semiconductor device shown in order of steps for explaining a conventional method of manufacturing a semiconductor device.

FIG. 14 is a cross-sectional view of a semiconductor device for explaining a conventional semiconductor device manufacturing method.

[Explanation of symbols]

1, 51, 59 semiconductor substrate 2, 52, 54, 60, 62, 64 insulating film 3,
53, 61 first aluminum wiring 4, 6, 8,
10, 14, 20 Silicon oxide film 5, 9
Silica film 11, 18 First contact hole 13, 16, 19, 22 Tungsten 15, 2
1 Second contact hole 17, 68 Third aluminum wiring 55, 65,
66 Contact opening 56 Aluminum wiring 7, 57, 59, 63 Second aluminum wiring 5
8,67 Metallic tungsten 12 Photoresist

Claims (1)

[Claims] Claim 1: A flattened first electrode on the first electrode wiring.
forming a second insulating film on the first insulating film; and forming a second insulating film on the first insulating film.
forming a planarized second insulating film on the second electrode wiring;
forming a first contact hole reaching the second electrode wiring in the insulating film; burying the first contact hole by selective growth of a first conductor material;
forming a third insulating film on the surfaces of the second insulating film and the first conductor material; and forming the first electrode wiring on the first insulating film, the second insulating film, and the third insulating film. A method for manufacturing a semiconductor device, comprising the steps of: forming a second contact hole having a depth reaching , and burying the second contact hole by selectively growing a second conductive material.