JPH04291430A - Program tracing system - Google Patents

Abstract

PURPOSE:To trace a program terminal in a real action through an existing man-machine interface without connecting the program tracing equipments to all processors by attaining a constitution where a multiprocessor having its decentralized load stores the program tracing results and performs the communication of data to a man-machine interface processor. CONSTITUTION:The address information desired by a program are transmitted to the load decentralized processors 1-1-1-n from a man-machine interface terminal 6 via the man-machine interface processors 4 in a fault treatment state, etc. The processors 1-1-1-n store the program tracing results based on the designated address information. Then the terminal 6 detects a designated address while the event detected by a terminal event detection processor 3 is pressed. Thus the program tracing results stored previously are transferred to the terminal 6 via man-machine interface processor 2.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a load-distributed multiprocessor program storage and exchange system, and more particularly to a program tracing system.

0002

2. Description of the Related Art Conventionally, in a load-balanced multiprocessor program storage and exchange system, when tracing the actual operation of a program for troubleshooting, for example, the number of processors is reduced during a time period when the load is reduced, and the remaining processors are There was a first method of connecting a trace device and a method of connecting a trace device to all processors at the same time.

0003

[Problems to be Solved by the Invention] In the first method of the program tracing method of the conventional load balancing multiprocessor program storage and exchange system described above, the program tracing is performed by the program tracing device when the load is reduced, so that the load is reduced. The disadvantage of the first method is that you have to wait until the process is complete, and in the first method, you have to connect a program trace device to all processors and operate them at the same time to trace the program.
The drawback is that program tracing operations are complicated.

0004

[Means for Solving the Problems] The program tracing method of the present invention connects and accommodates a plurality of load balancing multiprocessors and a man-machine interface terminal in a load balancing multiprocessor program storage/exchange device, and a man-machine interface that controls the man-machine interface. A processor and a terminal event detection processor for detecting events of various terminal devices connected and accommodated by the exchange are connected by a processor bus, and the load distribution processor is each equipped with a program trace circuit and a central processing unit, and the load distribution processor is provided with a program trace circuit and a central processing unit, The apparatus instructs the program trace circuit to execute a program trace of the address according to the address information input by the man-machine interface terminal, stores the instructed program trace result, and causes the load processor to execute the program trace at the address. When address information input by the man-machine interface terminal is detected during processing of a detected event, the previously accumulated program trace result is transferred to the man-machine interface terminal via the man-machine interface processor.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a path connection diagram of a multiprocessor showing an embodiment of the present invention, and FIG. 2 is a block diagram of a trace function built into each of the load distribution processors 1-1 to 1-n of this embodiment.

In FIG. 1, load distribution processors 1-1 to
1-n, a man-machine interface processor 2 which connects and accommodates the man-machine interface terminal 6 and manages the man-machine interface, and a terminal event detection processor 3 which detects events of various terminal devices connected and accommodated in the exchange, are each connected to a processor bus. It is connected to a processor bus 5 via an interface 4 . The trace function shown in FIG. 2 includes a trace circuit 13 that executes program trace and a central control unit that controls the trace circuit 13 and stores trace results.

Address information for program tracing is input from the man-machine interface terminal 6 to the load distribution processors 1-1 to 1-n. The man-machine interface processor 2 transmits address information to be traced to each of the load distribution processors 1-1 to 1-n via the processor bus 5. Load balancing processors 1-1 to 1-n
Now, the central processing unit 10 shown in FIG.
instructs the address information trace circuit 13 of the program trace received from the processor bus 5 via the processor bus interface 4 to execute the program trace. After that, an event is detected from the terminal event detection processor 3, and the information is transmitted to the load balancing processor 1-
The event is transmitted to a processor in an empty state among processors 1 to 1-n, and the event is processed. Load balancing processors 1-1 to 1-n
When a trace address previously set from the man-machine interface terminal 6 is detected during event processing in any of the above, the program trace result stored in the central processing unit 10 is sent to the man-machine interface processor via the processor bus 5. Transferred to 2. The man-machine interface processor 2 transfers the program trace result to the man-machine interface terminal 6, and also transmits trace address release information to the load distribution processors 1-1 to 1-n via the processor bus 5.

[0009]

[Effects of the Invention] As explained above, the present invention connects a processor that controls a man-machine interface and a multiprocessor that is load-balancing through a processor bus, and that the multiprocessor that is load-balancing stores program trace results. By communicating data to the man-machine interface processor, it is possible to trace the actual program using the existing man-machine interface terminal, without having to connect any program trace equipment to all the processors.

[Brief explanation of the drawing]

FIG. 1 is a bus connection diagram of a multiprocessor showing an embodiment of the present invention.

FIG. 2 is a block diagram of a trace function built into the load balancing processor in FIG. 1;

[Explanation of symbols]

1-1 to 1-n load balancing processor 2
Man-machine interface processor 3 Terminal event detection processor 4 Processor bus interface 5 Processor bus

Claims (1)

[Claims] 1. A load balancing multiprocessor program storage and exchange device comprising: a plurality of load distribution multiprocessors; a man-machine interface processor that connects and accommodates man-machine interface terminals and controls the man-machine interface; and various terminals that are connected and accommodated by the exchange. A terminal event detection processor that detects events of the device is connected via a processor bus, and the load balancing processor
Each includes a program trace circuit and a central processing unit, and the central processing unit instructs the program trace circuit to execute a program trace of the address according to address information input by the man-machine interface terminal, and outputs the result of the instructed program trace. and when the load processor detects address information input by the man-machine interface terminal during event processing detected by the terminal event detection processor, the program trace result accumulated earlier is sent to the man-machine interface processor. A program tracing method characterized in that the program is transferred to the man-machine interface terminal via the man-machine interface terminal.