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JPH04273166A - Thin film transistor array substrate - Google Patents

Thin film transistor array substrate

Info

Publication number
JPH04273166A
JPH04273166A JP3053605A JP5360591A JPH04273166A JP H04273166 A JPH04273166 A JP H04273166A JP 3053605 A JP3053605 A JP 3053605A JP 5360591 A JP5360591 A JP 5360591A JP H04273166 A JPH04273166 A JP H04273166A
Authority
JP
Japan
Prior art keywords
thin film
film transistor
substrate
array substrate
transistor array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3053605A
Other languages
Japanese (ja)
Other versions
JP2720612B2 (en
Inventor
Osamu Sukegawa
統 助川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5360591A priority Critical patent/JP2720612B2/en
Publication of JPH04273166A publication Critical patent/JPH04273166A/en
Application granted granted Critical
Publication of JP2720612B2 publication Critical patent/JP2720612B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To prevent electrostatic breakdown of a thin film transistor by preventing generation of voltage difference of charges induced on a thin film transistor due to electrostatic electricity charged at the rear surface side of a thin film transistor array substrate. CONSTITUTION:A conductive film (transparent conductive film) 2 is formed at the rear surface of an array substrate comprising a thin film transistor consisting of a gate 3, a drain 6 and a source 7 for on-off control of a display electrode 8 of a liquid crystal display apparatus provided at the front surface of a glass substrate 1, static electricity charged at the rear surface of the glass substrate 1 is unified and thereby generation of potential difference in the thin film transistor may be prevented.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明はアクティブマトリクス液
晶ディスプレイに用いられる薄膜トランジスタアレイ〔
以下、TFT(Thin Film Transist
or)と称する〕基板に関する。
[Industrial Application Field] The present invention relates to thin film transistor arrays used in active matrix liquid crystal displays.
Hereinafter, TFT (Thin Film Transistor)
or)] related to the substrate.

【0002】0002

【従来の技術】一般に液晶ディスプレイ等に用いられる
TFT基板は透明絶縁体のガラス基板に各種素材の薄膜
を形成した後これを所要パターンに形成する工程を複数
回繰返すことにより行われる。そして、完成されたTF
T基板は、ガラス基板の表面にゲートとしての導電性薄
膜と、ゲート絶縁膜としての絶縁性薄膜と、アモルファ
スシリコン薄膜と、ソース及びドレインとしての導電性
薄膜と、表示電極としての導電性薄膜が夫々積層状態に
形成されている。
2. Description of the Related Art Generally, TFT substrates used in liquid crystal displays and the like are manufactured by forming a thin film of various materials on a transparent insulating glass substrate and then repeating the process several times to form a desired pattern. And the completed TF
The T substrate has a conductive thin film as a gate, an insulating thin film as a gate insulating film, an amorphous silicon thin film, a conductive thin film as a source and a drain, and a conductive thin film as a display electrode on the surface of a glass substrate. They are each formed in a laminated state.

【0003】0003

【発明が解決しようとする課題】ところで、この種のT
FT基板では、その製造に際してのTFT基板の搬送等
においてTFT基板の裏面に静電気が帯電することがあ
る。そして、この帯電した静電気により、TFT素子側
にはガラス基板をキャパシタとして電荷が誘起される。 この静電気はガラス基板の全面において一様でなく分布
をもったものとなり、したがって素子側に誘起される電
荷も分布を持つことになり、TFT素子面で電位差が発
生し、この電位差によってTFT素子に静電破壊が生じ
ることがあるという問題がある。本発明の目的はこのよ
うなTFT素子の静電破壊を防止したTFT基板を提供
することにある。
[Problem to be solved by the invention] By the way, this type of T
In the FT substrate, static electricity may be charged on the back surface of the TFT substrate during transportation of the TFT substrate during its manufacture. Then, due to this charged static electricity, charges are induced on the TFT element side using the glass substrate as a capacitor. This static electricity is not uniform over the entire surface of the glass substrate, but has a distribution, and therefore the charge induced on the element side also has a distribution, causing a potential difference on the TFT element surface, and this potential difference causes the TFT element to There is a problem in that electrostatic discharge damage may occur. An object of the present invention is to provide a TFT substrate that prevents such electrostatic damage to TFT elements.

【0004】0004

【課題を解決するための手段】本発明のTFT基板は、
表面に複数個のTFT素子を配列形成した絶縁性基板の
裏面に導電性膜を形成している。例えば、液晶ディスプ
レイ等に用いるTFT基板では、絶縁性基板に透明ガラ
ス基板を用い、裏面に形成する導電性膜に透明な導電性
膜を形成する。
[Means for Solving the Problems] The TFT substrate of the present invention includes:
A conductive film is formed on the back surface of an insulating substrate on which a plurality of TFT elements are arrayed. For example, in a TFT substrate used for a liquid crystal display or the like, a transparent glass substrate is used as an insulating substrate, and a transparent conductive film is formed on the back surface.

【0005】[0005]

【作用】本発明によれば、基板の裏面の導電性膜によっ
て帯電する静電気の分布を均一にし、TFT素子におけ
る電位差の発生を防止して静電破壊を防止する。
According to the present invention, the electroconductive film on the back surface of the substrate uniformizes the distribution of static electricity, prevents potential difference in the TFT element, and prevents electrostatic damage.

【0006】[0006]

【実施例】次に、本発明について図面を参照して説明す
る。図1は本発明のTFT基板の断面図である。ガラス
基板1の表面には導電性薄膜によりゲート3が形成され
、その上にゲート絶縁膜4が形成される。又、このゲー
ト絶縁膜4上にはゲート3を覆うようにアモルファスシ
リコン膜5が形成され、その上には導電性薄膜によりド
レイン6とソース7が形成されている。更に、前記ゲー
ト絶縁膜4上には液晶表示装置の表示電極を構成する表
示電極8が導電性薄膜により形成され、前記ソース7に
電気的に接続されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of a TFT substrate of the present invention. A gate 3 is formed of a conductive thin film on the surface of the glass substrate 1, and a gate insulating film 4 is formed thereon. Further, an amorphous silicon film 5 is formed on this gate insulating film 4 so as to cover the gate 3, and a drain 6 and a source 7 are formed thereon by conductive thin films. Further, on the gate insulating film 4, a display electrode 8 constituting a display electrode of a liquid crystal display device is formed of a conductive thin film, and is electrically connected to the source 7.

【0007】一方、前記ガラス基板1の裏面には透明で
かつ導電性の薄膜、この例では厚さ400ÅのIn2 
O5 ・SnO2 膜(以下、ITO膜と称する)2を
形成している。このITO膜2は前記表示電極8と同じ
材料のものを用いることができ、この場合にはITO膜
2はガラス基板1の表面側に形成するTFT素子の形成
工程に先立って形成され、形成後に約 250℃のアニ
ール処理を行っている。このアニールを行うことにより
、その後の工程において表示電極8としての厚さ 40
0ÅのITO膜を形成しかつこれをエッチングしたとき
にも、裏面側のITO膜2をアニール処理していること
で、このITO膜2のエッチングレートが約1/10程
度となり、表示電極8を形成する際のエッチングによっ
てもITO膜2がエッチング除去されることはない。
On the other hand, the back surface of the glass substrate 1 is coated with a transparent and conductive thin film, in this example, a 400 Å thick In2 film.
An O5 .SnO2 film (hereinafter referred to as an ITO film) 2 is formed. This ITO film 2 can be made of the same material as the display electrode 8. In this case, the ITO film 2 is formed prior to the formation process of the TFT element formed on the surface side of the glass substrate 1, and after the formation. Annealing treatment is performed at approximately 250°C. By performing this annealing, the thickness of the display electrode 8 is reduced to 40 in the subsequent process.
Even when a 0 Å thick ITO film is formed and etched, the ITO film 2 on the back side is annealed, so the etching rate of the ITO film 2 is about 1/10, and the display electrode 8 is Even during the etching during formation, the ITO film 2 is not etched away.

【0008】したがって、このTFT基板では、裏面に
静電気が帯電した場合でも、ITO膜2の導電性によっ
て帯電が一様化されることになり、表面のTFT素子に
誘起される電荷によって電位差が生じることはなく、T
FT素子の静電破壊を防止することが可能となる。
[0008] Therefore, in this TFT substrate, even if the back surface is charged with static electricity, the electrical conductivity of the ITO film 2 equalizes the charging, and a potential difference occurs due to the charges induced in the TFT elements on the front surface. Without a doubt, T
It becomes possible to prevent electrostatic damage to the FT element.

【0009】[0009]

【発明の効果】以上説明したように本発明は、TFT素
子を形成した絶縁性基板の裏面に導電膜を形成している
ので、帯電した静電気が一様に分布するため、TFT素
子に電位差が生じることがなく、TFT素子の静電破壊
を防止することができる効果がある。
Effects of the Invention As explained above, in the present invention, since a conductive film is formed on the back surface of an insulating substrate on which a TFT element is formed, the charged static electricity is uniformly distributed, so that there is no potential difference in the TFT element. This has the effect of preventing electrostatic damage to TFT elements.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1  ガラス基板 2  ITO膜(透明導電性基板) 3  ゲート 5  アモルファスシリコン膜 6  ドレイン 7  ソース 8  表示電極 1 Glass substrate 2 ITO film (transparent conductive substrate) 3 Gate 5 Amorphous silicon film 6 Drain 7. Sauce 8 Display electrode

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  絶縁性基板の表面に複数個の薄膜トラ
ンジスタを配列形成してなる薄膜トランジスタアレイ基
板において、前記絶縁性基板の裏面に導電性膜を形成し
たことを特徴とする薄膜トランジスタアレイ電極。
1. A thin film transistor array electrode comprising a thin film transistor array substrate formed by arraying a plurality of thin film transistors on the surface of an insulating substrate, wherein a conductive film is formed on the back surface of the insulating substrate.
【請求項2】  絶縁性基板が透明ガラス基板であり、
裏面に形成する導電性膜は透明な導電性膜である請求項
1の薄膜トランジスタアレイ基板。
[Claim 2] The insulating substrate is a transparent glass substrate,
2. The thin film transistor array substrate according to claim 1, wherein the conductive film formed on the back surface is a transparent conductive film.
JP5360591A 1991-02-27 1991-02-27 Method of manufacturing thin film transistor array substrate Expired - Lifetime JP2720612B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5360591A JP2720612B2 (en) 1991-02-27 1991-02-27 Method of manufacturing thin film transistor array substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5360591A JP2720612B2 (en) 1991-02-27 1991-02-27 Method of manufacturing thin film transistor array substrate

Publications (2)

Publication Number Publication Date
JPH04273166A true JPH04273166A (en) 1992-09-29
JP2720612B2 JP2720612B2 (en) 1998-03-04

Family

ID=12947522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5360591A Expired - Lifetime JP2720612B2 (en) 1991-02-27 1991-02-27 Method of manufacturing thin film transistor array substrate

Country Status (1)

Country Link
JP (1) JP2720612B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10160920A (en) * 1996-12-02 1998-06-19 Dainippon Printing Co Ltd Color filter and its production
US8130334B2 (en) 2004-03-18 2012-03-06 Sharp Kabushiki Kaisha Active matrix substrate, apparatus for manufacturing the same and display device using the same
JP2017524644A (en) * 2014-08-12 2017-08-31 コーニング インコーポレイテッド Organic surface treatment to suppress electrostatic discharge of display glass

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61161765A (en) * 1985-01-11 1986-07-22 Nec Corp Manufacture of thin film transistor array
JPH03274027A (en) * 1990-03-24 1991-12-05 Seiko Epson Corp liquid crystal display device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61161765A (en) * 1985-01-11 1986-07-22 Nec Corp Manufacture of thin film transistor array
JPH03274027A (en) * 1990-03-24 1991-12-05 Seiko Epson Corp liquid crystal display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10160920A (en) * 1996-12-02 1998-06-19 Dainippon Printing Co Ltd Color filter and its production
US8130334B2 (en) 2004-03-18 2012-03-06 Sharp Kabushiki Kaisha Active matrix substrate, apparatus for manufacturing the same and display device using the same
JP2017524644A (en) * 2014-08-12 2017-08-31 コーニング インコーポレイテッド Organic surface treatment to suppress electrostatic discharge of display glass

Also Published As

Publication number Publication date
JP2720612B2 (en) 1998-03-04

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