JPH04268868A - Information recording device - Google Patents

Abstract

PURPOSE:To permit a simplified logical circuit to detect an outline part which is almost horizontal and vertical and to execute optimum smoothing correction in correspondence with the curvature of the outline part. CONSTITUTION:Binary data VDO developed in a dot pattern are sequentially stored in line memories 1-9. A processing circuit 43 fetches information on plural routes, which are previously decided, as information strings from an information group stored in the shift registers 1-9, extracts the feature of the fetched information string and alters information on a specified notice picture element in the shift register when the extracted feature agrees with one of plural features. An altered signal MDT is transmitted to the laser driver or a laser beam printer through a serial conversion circuit 44. The feature of the information string is dot information on a route head, the number of information change points on the route and the position of the information change point on the route.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to an information recording device such as a laser beam printer, and in particular, the present invention relates to an information recording device such as a laser beam printer, and in particular, the outline of the characters and figures to be printed is smoothed and printed by smoothing bitmap data representing characters and figures. This technology relates to smoothing and improving printing quality.

0002

2. Description of the Related Art In recent years, laser beam printers using electrophotographic technology have been used in computer output devices, facsimile output units, and so-called digital copying machines that print image data read from an image scanner.

The laser beam printers used in these applications print at a resolution of, for example, 300 dots/inch. In this case, the number of characters and figures is 300 as shown in Figure 3.
It is drawn and printed using black dots (● marks) and white dots (○ marks) printed at positions arranged on a grid of dots/inch. The figure shows the dot pattern of the alphabetic character "a". At a resolution of 300 dots/inch, the dot spacing is approximately 85 microns. Generally, it is said that human vision can recognize up to about 20 microns, but compared to this, at the above resolution (about 85 microns), the ring spaces of letters and figures formed by dots look jagged, and they are not always visible. It cannot be said that it is a high-quality print.

[0004] To solve this problem, there are the following approaches.

A first approach is to simply increase the resolution (for example, to 1200 dots/inch). However, in this case, to represent the same area, 4×4=
This has the disadvantage that 16 times as much bitmap memory is required, resulting in a very expensive device.

The second approach is to modulate the print data of the pixel of interest by referring to the surrounding dot data of the pixel of interest to be printed by simply adding a small amount of buffer memory without increasing the capacity of the bitmap memory. Accordingly, there is a method of equivalently increasing the resolution in the main scanning direction or in the main scanning direction and the sub-scanning direction.

[0007]

However, the method described above corrects the pixel of interest to be printed by referring only to the pixel of interest and the eight pixels surrounding the pixel of interest. In this type of method, since the reference area of surrounding pixels is narrow, it is possible to recognize that the pixel of interest is part of a curve, but it is not possible to recognize the degree of curvature of the part of the curve. In particular, it is impossible to detect contours that are close to horizontal or contours that are close to vertical, and therefore it is not possible to perform optimal correction according to the curvature, and as a result, it is difficult to maximize the smoothing effect.

It has also been considered to refer to a wide area of the pixel of interest and its surrounding pixels to recognize how much curvature the pixel of interest is part of a curve.

However, in this case, in order to recognize the curvature, a large number of matching patterns must be prepared, resulting in a large circuit size and high cost.

0010

[Means and effects for solving the problem] The present invention eliminates the drawbacks of the above-mentioned prior art, and uses information sequences on a plurality of predetermined routes to determine the characteristics of the dot pattern in the surrounding area of the pixel of interest. The pixel of interest is changed according to the extracted feature. This makes it possible to detect nearly horizontal contours and nearly vertical contours using a simplified logic circuit, and to perform optimal smoothing correction according to the curvature of the contour.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 to 22 show a first embodiment according to the present invention.

FIG. 1 is a diagram showing an engine portion of a laser beam printer to which the present invention is applied.

In the figure, 1 is a sheet of paper which is a recording medium;
2 is a paper cassette that holds paper 1; Reference numeral 3 denotes a feeder that separates only the topmost sheet of the sheets of paper 1 placed on the paper cassette 2 and transports the leading edge of the separated sheet to the position of paper feed rollers 4 and 4' by a driving means (not shown). The paper cam rotates intermittently every time the paper is fed, and feeds one sheet of paper for each rotation.

Reference numeral 18 denotes a reflective photosensor, which detects the absence of paper by detecting reflected light from the paper 1 through a hole 19 provided at the bottom of the paper cassette 2.

The paper feed rollers 4, 4' are arranged so that the paper is fed to the paper feed cam 3.
When the paper 1 is conveyed to the roller section, the paper 1 is rotated while being lightly pressed, and the paper 1 is conveyed. When the paper 1 is transported and the leading edge reaches the position of the registration shutter 5, the transport of the paper 1 is stopped by the registration shutter, and the paper feed rollers 4 and 4' generate transport torque while slipping against the paper 1. and continue rotating. in this case,
By driving the registration solenoid 6 and releasing the registration shutter 5 upward, the paper 1 is conveyed to the transport rollers 7 and 7'. To drive the registration shutter 5, a laser beam 20 is applied to the photosensitive drum 11.
The transmission timing of the image formed by imaging is synchronized with the transmission timing. Note that 21 is a photosensor, which detects whether or not the paper 1 is present at the location of the registration shutter 5.

Here, 52 is a rotating polygon mirror, which is driven by a motor 53. Laser beam 20 from a semiconductor laser 51 driven by a laser driver
is scanned in the main scanning direction by the rotating polygon mirror 52, passes through an f-θ lens disposed between the rotating polygon mirror 52 and the reflecting mirror 54, is guided onto the photosensitive drum 11 via the reflecting mirror 54, and is guided onto the photosensitive drum 11 via the reflecting mirror 54. 11 and scans in the main scanning direction to form a latent image on the main scanning direction 57. In this case, when the printing density is 300 dots/inch and the printing speed is 8 pages/minute (A4 size or letter size), the laser lighting time to record 1 dot is approximately 540 nanoseconds (1 pixel). When dividing into three small pixels, the lighting time of one small pixel is 18
0 nanoseconds), and 1 at a print density of 300 dots/inch.
When the printing speed is 6 sheets/min, the laser lighting time to record 1 dot is approximately 270 nanoseconds (1 pixel is 3
When divided into two small pixels, the lighting time of one small pixel is 90
nanoseconds). In addition, when the printing density is 600 dots/inch and the printing speed is 8 sheets/minute, the laser lighting time to record one dot is approximately 135 nanoseconds (when one pixel is divided into three small pixels, The lighting time of 1 small pixel is 4
5 nanoseconds), and 1 at a printing density of 600 dots/inch.
The lighting time of the laser to record one dot at a printing speed of 6 sheets/minute is approximately 68 nanoseconds (when one pixel is divided into three small pixels, the lighting time of one small pixel is 23 nanoseconds). seconds).

With the current technology, the driving ability of the laser driver 50 used in this type of laser beam printer is such that the shortest pulse lighting time is approximately 4 nanoseconds (turn-on rise time is approximately 1 nanosecond, light-off fall time is approximately 4 nanoseconds). The limit is about 1 nanosecond). Therefore, even if an attempt is made to turn on the lamp for a shorter period of time, the lamp cannot be turned on, or even if it is turned on, the lighting time and amount of light are unstable. Therefore, the laser lighting pulse width modulated for smoothing should be set to a lighting time of about 4 nanoseconds or more at the shortest.

Further, a beam detector 55 arranged at the scanning start position of the laser beam 20
By detecting 0, the BD signal is detected as a synchronizing signal for determining the image writing timing in the main scanning direction.

Thereafter, the paper 1 is conveyed to the photosensitive drum 11 by the conveyance rollers 7, 7' instead of the paper feed rollers 4, 4', which provide conveyance torque. A latent image is formed on the surface of the photosensitive drum 11 charged by the charger 13 by exposure to the laser beam 20 . After the latent image is visualized as a toner image by a developing device 14, the toner image is transferred onto the paper surface of the paper 1 by a transfer charger 15. In addition,
A cleaner 12 cleans the drum surface after the image has been transferred to the paper 1.

The paper 1 with the toner image transferred thereon is then fixed with the toner image by fixing rollers 8 and 8', and is ejected onto a paper ejection tray 10 by ejection rollers 9 and 9'.

Reference numeral 16 denotes a paper feed tray, which allows not only paper to be fed from the paper cassette 2 but also to manually feed sheets one by one from the paper feed tray 16. The paper that is manually fed to the manual paper feed roller 17 on the paper feed table 16 is lightly pressed by the manual paper feed roller 17, and the leading edge of the paper is brought into contact with the registration shutter in the same way as the paper feed rollers 4 and 4'. It is conveyed until it reaches 5, and then it slips and rotates. The subsequent conveyance sequence is exactly the same as when feeding paper from a cassette.

The fixing roller 8 houses a fixing heater 24, and the surface temperature of the fixing roller 8 is controlled to a predetermined temperature based on the temperature detected by a thermistor 23 that slips into contact with the roller surface of the fixing roller. The toner image on paper 1 is thermally fixed. A photo sensor 22 detects whether or not there is paper at the position of the fixing rollers 8, 8'.

[0024] Such a printer is connected to a controller through an interface means, and performs a print sequence upon receiving print commands and image signals from the controller. The signals sent and received by this interface means will be briefly explained below.

FIG. 2 is a diagram showing interface signals between the printer engine section and a controller that generates image data. Each of the interface signals shown in the figure will be explained below.

PPRDY signal - A signal sent from the printer to the controller to notify that the printer is powered on and ready for operation.

CPRDY signal - A signal sent from the controller to the printer to notify that the controller is powered on and ready for operation.

[0028] RDY signal - A signal sent from the printer to the controller.
This signal indicates that the printing operation can be started or continued whenever the RNT signal is received. For example, if the print operation becomes impossible due to the paper cassette 2 running out of paper, the signal is "
“False”.

PRNT signal - A signal sent from the controller to the printer, which instructs the start or continuation of the printing operation. When the printer receives the signal, it starts a printing operation.

VSREQ signal ~ A signal sent from the printer to the controller. When the RDY signal sent from the printer is in the "true" state, the controller sets the PRNT signal to "true" to initiate a print operation. This is a signal indicating that the printer is ready to receive image data after the start instruction is sent. In this state, it becomes possible to receive a VSYNC signal, which will be described later.

VSYNC signal - This is a signal sent from the controller to the printer, and is a signal for synchronizing the sending timing of image data in the sub-scanning direction. Due to this synchronization, the toner image formed on the drum is transferred onto the paper in synchronization with the paper in the sub-scanning direction.

BD signal - A signal sent from the printer to the controller, and is a signal for synchronizing the sending timing of image data in the main scanning direction. Due to this synchronization, the toner image formed on the drum is transferred onto the paper in synchronization with the paper in the sub-scanning direction. The signal indicates that the scanning laser beam is at the beginning of the main scan.

VDO signal - A signal sent from the controller to the printer, and is a signal for transmitting image data to be printed. This signal is VCLK, which will be described later.
Sent in synchronization with the signal. The controller receives code data such as a PCL code transmitted from the host device, and generates a character bit signal generated from a character generator corresponding to the code data, or generates a vector such as a postscript code transmitted from the host device. It receives the code, generates graphic bit data according to the code, or generates bit image data read from an image scanner, and transmits the data as a VDO signal to the printer. The printer prints a black image when the signal is "true" and a white image when the signal is "false".

VCLK signal - A signal sent from the controller to the printer, and is a synchronizing signal for transmitting and receiving the VDO signal.

SC signal - A bidirectional serial signal that bidirectionally transmits and receives "command" which is a signal sent from the controller to the printer, and "status" which is a signal sent from the printer to the controller. . An SCLK signal, which will be described later, is used as a synchronization signal when transmitting or receiving this signal. In addition, the SBSY signal and C
BSY signal is used. Here, the "command" is a serial signal consisting of 8 bits, and for example, the controller tells the printer whether the paper feeding mode is from a cassette or from a manual feed slot. This is command information for instructing. In addition, "Status" is a serial signal consisting of 8 bits,
For example, the printer notifies the controller of various printer conditions, such as a wait state in which the temperature of the printer's fuser has not yet reached the printable temperature, a paper jam, or a paper cassette out of paper. This is information to help you.

[0036] SCLK signal ~ for the printer to receive "commands" or for the controller to receive "status"
This is a synchronization pulse signal for capturing.

CBSY signal - This is a signal for occupying the SC signal and SCLK signal before the controller sends a "command".

SBSY signal ~ printer is in “status”
This signal is used to occupy the SC signal and SCLK signal prior to transmitting the SCLK signal.

After the VDO signal is input to the printer together with the VCLK signal, it is input to a VDO signal processing section 101 that performs signal processing according to this embodiment, which is disposed within the printer engine. The VDO signal processing section converts the inputted VDO signal through signal processing described later, and inputs the converted signal VDOM to a laser driver (not shown) to drive the semiconductor laser 51 to blink. The operation of such an interface will be explained below.

When the power switch of the printer is turned on and the power switch of the controller is turned on, the printer initializes the internal state of the printer and then sets the PPRDY signal to the controller as "true". On the other hand, after similarly initializing the internal state of the controller, the controller sets the CPRDY signal to "true" to the printer. This allows the printer and controller to confirm that each other's power has been turned on.

After that, the printer energizes the fixing heater 24 housed inside the fixing rollers 8 and 8', and when the surface temperature of the fixing roller reaches a temperature that allows fixing, an RDY signal is output.
After confirming that the RDY signal is “true”, the controller makes the PRNT signal “true” to the printer if there is data to be printed.The printer makes sure that the PRNT signal is “true”. ”, the photosensitive drum 11 is rotated to uniformly initialize the potential on the photosensitive drum surface, and at the same time, in the cassette paper feeding mode, the paper feed cam 3 is driven to move the leading edge of the paper to the position of the registration shutter 5. In the manual paper feed mode, the manual paper feed roller 17 transports the paper manually fed from the paper feed tray 16 to the position of the registration shutter 15. After that, when the printer becomes ready to accept the VDO signal, the VSREQ Set the signal to “true”. After confirming that the VSREQ signal is “true”, the controller sets the VSREQ signal to “true”.
When the SYNC signal is set to "true", VDO signals are sequentially sent out in synchronization with the BD signal. The printer is VSYNC
When it is confirmed that the signal becomes "true", the registration solenoid 6 is driven in synchronization with this, and the registration shutter 5 is released. Thereby, the paper 1 is conveyed to the photosensitive drum 11. The printer forms a latent image on the photosensitive drum 11 by turning on the laser beam when the image should be printed in black and turning off the laser beam when the image should be printed in white in response to the VDO signal, Next, a developing device 14 applies toner to the latent image and develops it to form a toner image. Next, the toner image on the drum is transferred onto the paper 1 by the transfer charger 15, fixed by the fixing rollers 8 and 8', and then discharged to a paper discharge tray.

FIG. 7 is a circuit block diagram of a VDO signal processing section 101 that performs smoothing processing and is installed at the input section of the printer engine section in the first embodiment of the present invention.

The first embodiment, as shown in FIG.
This method examines the characteristics of pixel data (pixels x 9 sub-scanning pixels) and changes the pixel of interest according to the results. More specifically, for example, the resolution 30 shown in FIG.
When printing a pixel of interest A among the dot data group of alphabetic character "a" of 0 dots/inch, an area S surrounding the pixel of interest A (: 11 pixels in main scanning x 9 pixels in sub-scanning =
99 pixels) is stored in the temporary storage means. As a result, dot information as shown in FIG. 6 is stored. Thereafter, the characteristics of the dot data group within the area S are checked, and the data of the target pixel A to be printed is changed and printed according to the characteristics. In this case, the data is changed to data such that the contour of the figure made up of dot groups is printed smoothly. In the first embodiment, as shown in FIG. 11, the pixel A of interest is divided into four subareas (X1,
, X4). Therefore, at the printing stage,
Equivalently 1200 dots/inch in main scan x 300 dots in sub scan
Printed at a print density of dots/inch. Note that the pixel A of interest must be divided into at least three parts in order to enhance the smoothing effect.

In FIG. 7, reference numerals 25 to 33 are line memories, which input the input image signal VDO to the clock signal VC.
Each line memory stores dot information of the main scanning length for a page to be printed. Each line memory is connected in the order of line memory 1 → line memory 2 → line memory 3 → ... → line memory 9, and stores dot information for the main scanning length of 9 lines in the sub-scanning direction. do. 34-42 are shift registers, and each shift register 1-9 inputs the output from each line memory corresponding to each line memory 1-9. Each shift register consists of 11 bits, and as shown in the figure, 1a to 1k, 2a to 2k, 3
A to 3k, . . . , 9a to 9k constitute a dot matrix memory of 11 dots in the main scanning direction x 9 lines in the sub-scanning direction. A dot 5f in the center of the matrix memory is defined as a dot of interest. 43 is a processing circuit that detects the characteristics of the data stored in the dot matrix memory for smoothing and changes the pixel of interest 5f as necessary; 9k (99 bits in total) are input, and the modified parallel signal MDT is output. The parallel signal MDT is input to a parallel-to-serial conversion circuit 44. The parallel-to-serial conversion circuit 44 converts the input parallel signal MDT into a serial signal VDOM, and then drives the laser 55 by a laser driver (not shown). In the first embodiment, the parallel signal has 4 bits (X1,
2, X3, X4). Similarly, processing for one main scanning line is sequentially performed. 45 is a clock generation circuit;
A BD signal, which is a main scanning synchronization signal, is input, and a clock signal VCK is generated as a clock signal synchronized with the BD signal. The clock signal VCK has a clock frequency f0 necessary for recording at 300 dots/inch in the main scanning direction.
has a frequency four times that of The serial signal VDOM is sequentially sent out in synchronization with the clock VCK. 46 is a frequency dividing circuit which inputs the clock signal VCK;
The frequency is divided to generate a clock signal VCKN of frequency f0. The clock signal VCKN is used as a synchronization clock when dot data is taken into the processing circuit 43 from the dot matrix memory.

In FIG. 7, when an image signal VDO of 300 dots/inch is transmitted from the controller to the printer in synchronization with the image clock signal VCLK, the image dot data is sequentially stored in line memories 1 to 9. At the same time, dot matrix information of 11 main scanning dots x 9 sub scanning dots is taken out of the dot data in line memories 1 to 9 to shift registers 1 to 9. Thereafter, the processing circuit 43 detects the characteristics of the dot matrix information, and according to the detected characteristics, the pixel of interest is divided into four equal parts in the main scanning direction to generate modified data consisting of four pieces of data X1 to X4 and printed. It functions as it does.

FIGS. 12 to 14 are diagrams showing a method for investigating the characteristics of peripheral data of a pixel of interest with respect to the dot matrix information. 12 to 14, a route representing a series of a plurality of surrounding dots including a pixel of interest, for example, (A) to (M) in FIGS.
), a plurality of routes including at least routes r1 to r13 are defined in advance. 16 to 18 are diagrams showing the relationship between the characteristics of the route and the dot information.

First, route r1 corresponding to (A) in FIG.
This will be explained using FIG. 16. The route r1 is a, b, c, d, e, f, g, h, i,
j, k Also, 1, 2, 3, 4, 5,
For each dot addressed from numbers 6, 7, 8, and 9, 4g → 4f → 5e as a series of 10 dot information
→ Form a route of 5d → 6d → 6e → 6f → 5f → 5g → 5h. As a characteristic of the route r1, firstly, the information of the first dot of the continuous route (: whether it is a black dot,
Second, the number of information change points that exist on a continuous route (: the total number of change points that change from a white dot to a black dot, or the change points that change from a black dot to a white dot), Third, three points are extracted: the number of dot boundaries in which the position of the change point is located, counting from the beginning of the route. For example, the route r1 as shown in FIG. 16(A)
If the characteristics of (: dot information at the beginning of the route = ● black dot, number of information change points on the route = 1, position of information change points on the route = 4), then the dot information that continues on the route is 4g=● (black dot), 4f=●, 5e=●, 5
d=●, 6d=○ (white dot), 6e=○, 6f=○,
This corresponds to 5f=○, 5g=○, and 5h=○. The arrangement of dots on the dot matrix at this time is shown in Figure 19 (
A).

Similarly, when the characteristics of route r1 are [dot information at the beginning of the route = ●, number of information change points on the route = 2, position of information change points on the route = 1 & 6], the dot arrangement state is Similarly, it is shown in FIG. 16(B).

[0049] Also, when the characteristics of route r1 are [dot information at the beginning of the route = ●, number of information change points on the route = 3, position of information change points on the route = 2 & 7 & 8], the dot arrangement state is the same. This is shown in FIG. 16(C).

[0050] Also, when the characteristics of route r1 are [dot information at the beginning of the route = ○, number of information change points on the route = 1, position of information change points on the route = 4], the dot arrangement state is the same. This is shown in FIG. 16(D).

In this way, the features of the series of dots arranged on the route r1 are detected.
Features like 6(A) (: Dot information at the beginning of the route =●,
When the number of information change points on the route = 1, the position of the information change points on the route = 4) is detected, the pixel of interest 5f is set as shown in FIG. 19(A), X1 = ○, X2 = ● ,X3=○,
The information is changed to consist of four small sections with X4=○ and printed.

Next, the route r corresponding to (E) in FIG.
5 will be explained using FIG. The route r5 is 4j as a series of 20 dot information on a dot matrix.
→4i→4h→4g→4f→4e→4d→5c→5b→
6b → 6c → 6d → 5d → 5e → 5f → 6f → 5g → 5
Form a route h→5i→5j. Similarly, the characteristics of the route r1 are: firstly, the information of the first dot of the continuous route (whether it is a black dot or a white dot), and secondly, the information of the information change point existing on the continuous route. number (: total of change points that change from white dots to black dots, or change points that change from black dots to white dots), and thirdly, the number of dot boundaries at which the position of the change point is counted from the beginning of the route. Extract the three items located at . For example, Figure 1
Features of route r5 as shown in 7(A) (: dot information at the beginning of the route = ●black dot, number of information change points on the route =
1. If the position of the information change point on the route = 9), the dot information that continues on the route is 4j = ● (black dot), 4i = ●, 4h = ●, 4g = ●, 4f = ●,4e
=●, 4d=●, 5c=●, 5b=●, 6b=○, 6c
=○, 6d=○, 5d=○, 5e=○, 5f=○, 6f
=○, 5g=○, 5h=○, 5i=○, 5j=○. The arrangement of dots on the dot matrix at this time is shown in FIG. 19(E).

Similarly, when the characteristics of route r5 are [dot information at the beginning of the route = ●, number of information change points on the route = 2, position of information change points on the route = 3 & 12], the arrangement state of dots is Similarly, it is shown in FIG. 17(B).

[0054] Also, when the characteristics of route r5 are [dot information at the beginning of the route = ●, number of information change points on the route = 3, position of information change points on the route = 5 & 9 & 17], the dot arrangement state is the same. This is shown in FIG. 17(C).

[0055] Also, when the characteristics of route r5 are [dot information at the beginning of the route = ○, number of information change points on the route = 1, position of information change points on the route = 9], the dot arrangement state is the same. This is shown in FIG. 17(D).

In this way, the features of the series of dots arranged on the route r5 are detected.
Features like 7(A) (: Dot information at the beginning of the route =●,
When the number of information change points on the route = 1, the position of the information change points on the route = 9) is detected, the pixel of interest 5f is set as shown in FIG. 19(E), X1 = ○, X2 = ● ,X3=○,
The information is changed to consist of four small sections with X4=○ and printed.

Next, the route r corresponding to (M) in FIG.
13 will be explained using FIG. The route r13 is 3g → 4f → 5e → 6d → 7d → 7e → 6e → 5f → as a series of 10 dot information on the dot matrix.
Form a route from 4g to 3h. Similarly, the characteristics of the route r13 are: firstly, the information of the first dot of the continuous route (whether it is a black dot or a white dot), and secondly, the information of the information change point existing on the continuous route. number (: total of change points that change from white dots to black dots, or change points that change from black dots to white dots), and thirdly, the number of dot boundaries at which the position of the change point is counted from the beginning of the route. Extract the three that are located at . For example, in Figure 18 (A
) Features of route r13 as shown in (: dot information at the beginning of the route = ● black dot, number of information change points on the route = 1,
If the position of the information change point on the route = 5),
The dot information connected on the route is 3g=● (black dots)
, 4f=●, 5e=●, 6d=●, 7d=●, 7e=○
, 6e=○, 5f=○, 4g=○, 3h=○. The arrangement of dots on the dot matrix at this time is shown in FIG. 14-3 (M).

Similarly, the characteristics of route r13 are [dot information at the beginning of the route=●, number of information change points on the route=2,
Similarly, FIG. 18B shows the arrangement state of dots in the case where the position of the information change point on the route = 1 & 6].

[0059] In addition, when the characteristics of route r13 are [dot information at the beginning of the route = ●, number of information change points on the route = 3, position of information change points on the route = 2 & 7 & 8], the dot arrangement state is the same. This is shown in FIG. 18(C).

[0060] Also, when the characteristics of route r13 are [dot information at the beginning of the route = ○, number of information change points on the route = 1, position of information change points on the route = 5], the dot arrangement state is the same. This is shown in FIG. 18(D).

In this way, the characteristics of the series of dots arranged on the route r13 are detected, and among these characteristics, the characteristics as shown in FIG. 18(A) (: dot information at the beginning of the route =
, number of information change points on the route = 1, position of information change points on the route = 5), the pixel of interest 5f is set as shown in FIG. 21(M), X1=●, X2= ○, X3=○
, X4=○, and the information is changed to consist of four small sections and printed.

Furthermore, features of a series of dots arranged on the route r13 are detected, and among these features, the features shown in FIG.
When a feature like (D) (: dot information at the beginning of the route = ○, number of information change points on the route = 1, position of information change points on the route = 5) is detected, ), the pixel of interest 5f is set to X1=○, X2=●, X3=●,
The information is changed to information consisting of four small sections where 4=● and is printed. In this way, even if the route is the same, it is possible to change the change content of the pixel of interest depending on whether the dot information at the beginning of the route is a black dot or a white dot. This characteristic produces the effect of further simplifying the feature detection circuit described later.

FIG. 15 is a conceptual diagram schematically showing the processing blocks of the signal processing section described above. As can be seen from the figure, various predetermined routes on the dot matrix (: route r1 to route r13, ...
), the data of the pixel of interest 5f is replaced with the data of the pixel consisting of small blocks of X1, X2, X3, and X4 and printed. Note that the predetermined characteristics for all routes and for each route are determined so that they do not overlap with each other. Therefore, there are no two or more items that match the predetermined characteristics from the dot matrix.

In this way, the features of the routes shown in FIGS. 12 to 14 are shown in FIGS. 19 to 21 (
It is detected that it is a series of dots A) to (N), and the small blocks X1, X2, corresponding to (A) to (N) shown in the figure are
Change data for X3 and X4 is generated, replaced with the pixel of interest, and printed.

As a result, the image in FIG. 22(A), which is a part of the character "a" in FIG. The modified image is printed by driving a laser. The portion changed in units of small sections has the effect of changing the local image density of the outline portion or shifting the printing position of the print dots by the electrophotographic process. As a result, the outline of the character is printed as a smooth image on the paper surface.

FIG. 8, FIG. 9, and FIG. 10 are diagrams showing specific examples of processing circuits based on the above theory. FIG. FIG. 10 shows an example of a data generation circuit that generates change data consisting of small blocks X1, X2, X3, and X4 for a pixel of interest based on detected features.

FIG. 8 shows a feature detection circuit for detecting the features of the route r13. In the figure, A1 to A9 are exclusive logic circuits, B1 to B9, C1 to C9, F1 to F2, H1 to H36, J1 to J4, K1 to K4, and P1 to
P2 is a 2-input AND circuit, D1-D2 and I1-I4 are 9-input OR circuits, E1-E3 are inverter circuits, G1 is a 2-input OR circuit, and L1 is a 4-input AND circuit. As input signals to the same circuit, 3g, 4f, 5e, 6d, 7d, 7e,
6e, 5f, 4g, and 3h are arranged and input in this order. The exclusive logic circuits A1 to A9 perform exclusive logic between adjacent dots of the input signal string. As a result, when two adjacent dot information are different (:● and ○ or ○ and ●), the output is set to "1", and when two adjacent dot information are the same (:● and ● or ○ and ○), the output is set to "1". ), set its output to "0". The AND circuits B1 to B9 and the 9-input OR circuit D1 extract whether or not there is only one change point where the change point changes from ● to ○ for the data string that continues sequentially from 3g to 3h. It is a circuit. The output of the 9-input OR circuit D1 is "1" only when there is one change point changing from ● to ○, and "0" is output when there is no change point or there are two or more change points. Output. AND circuits C1 to C9 and 9-input OR circuit D
Reference numeral 2 denotes a circuit that extracts whether or not there is only one change point that changes from ◯ to ● as a change point for a data string that continues sequentially from 3g to 3h. The output of the 9-input OR circuit D2 is "1" only when there is one change point changing from ○ to ●, and "0" is output when there is no change point or when there are two or more change points. Output.

Inverter circuit E1 and 2-input AND circuit F
1 detects the case where the first dot 3g of the data string starting from 3g and ending at 3h is a ● dot and there is only one change point in the data string, and in this case, the output of the 2-input AND circuit F1 is Set it to “1”.

The inverter circuit E2 and the two-input AND circuit F2 detect the case where the first dot 3g of the data string starting from 3g and ending at 3h is a ○ dot and there is only one change point in the data string. , in this case, the output of the two-input AND circuit F2 is set to "1". Therefore, the output of the 2-input OR circuit G1 becomes "1" only when any of the above cases is detected. The 2-input AND circuits H1 to H4 are circuits that generate a 4-bit code in which H4 is 20, H3 is 21, H2 is 22, and H1 is 23, and the output of exclusive logic circuit A1 is "1".
”, that is, the “first” from the beginning of the data string
"1" only when a change point is detected at the dot boundary of
generates the code. If no change point is detected,
0” code is generated. 2-input AND circuit H5-H8
20 for H8, 21 for H7, 22 for H6, 23 for H5
This is a circuit that generates a 4-bit code, and when the output of exclusive logic circuit A2 becomes "1", that is, when a change point is detected at the "second" dot boundary from the beginning of the data string. only generates the code “2”. If no change point is detected, a code of "0" is generated. 2-input AND circuits H9 to H12 set H12 to 20 and H1 to
This is a circuit that generates a 4-bit code with 1 as 21, H10 as 22, and H9 as 23. When the output of exclusive logic circuit A3 becomes ``1'', that is, ``3'' is generated from the beginning of the data string.
A code of ``1'' is generated only when a change point is detected at the dot boundary of the ``th'' dot. If no change point is detected, a code of "0" is generated. Similarly, the two-input AND circuits H13-H16 generate code "4" for exclusive logic circuit A4, and so on until code "9" is generated by H33-H36. 9 input OR circuit I
1 to I4 are 20 of each code at the change point of A1 to A9.
, 21, 22, and 23 are ORed together to generate an output. The 2-input AND circuits J1 to J4 perform an AND logic with each output of the 9-input OR circuits I1 to I4 and the output of the 2-input OR circuit G1 as a signal indicating that there is one change point. A position code of a changing point is generated when there is one changing point in the output of the input AND circuits J1 to J4. The position code is output as a code in which 20, 21, 22, and 23 correspond to each output of the two-input AND circuits J1 to J4. The position code of the change point output from the 2-input AND circuits J1 to J4 is the 2-input AND circuit K1 to
K4 matches the code to "5". As a result of the comparison, if the codes match, the output of the 4-input AND circuit L1 becomes "1". Therefore, the characteristics of the data strings 3g to 3h when the output of the 2-input AND circuit becomes "1" are as follows:
It has the characteristics of either "●" from the beginning of the data string to the fifth dot boundary position or "○" from the beginning of the data string to the fifth dot boundary position. The first data 3g of the data string is ●
The case is obtained as the output M of the two-input AND circuit P2. Further, the case where the first data 3g of the data string is ◯ is obtained as the output N of the two-input AND circuit P2. In this way, it is possible to detect a data string of dots that match the characteristics of (M) and (N) shown in FIG. 14-3. A similar circuit can examine the characteristics of a plurality of data strings including the routes r1 to r13 and detect cases where they match predetermined characteristics. Note that, as explained above, the plurality of predetermined features are a group of features selected so that two or more of them do not hold true at the same time. Therefore, two or more feature matches will not be detected simultaneously from these plurality of feature detection circuits.

FIGS. 9 and 10 show a data generation circuit that generates data for the pixel of interest 5f in accordance with the characteristics of the detected data string. Note that FIG. 10 shows the states of R1 to R64 in FIG. In FIG. 9, Q1 to Q16 are OR circuits, R1 to R64 and U1 to U2 are 2-input AND circuits, and S
1 to S4 are 16-input OR circuits, E4 is an inverter circuit,
T1 is a NOR circuit. Each output signal of the feature detection circuit extracted as a feature of a predetermined data string corresponding to a plurality of routes is connected to one of OR circuits Q1 to Q16. For example, as shown in Figures 19 and 20 (
The feature matching signals corresponding to A) to (N) are (G) and (I
), (K), (M) are OR circuit Q2, (A), (C),
(E) is OR circuit Q3, (B) is OR circuit Q7, (D)
, (F), (H), (J), (L), and (N) are connected to OR circuit Q15. Furthermore, all feature matching signals including the above (A) to (N) are connected to the NOR circuit T1. Corresponding to the output "1" of OR circuits Q1 to Q16, R1 to R6
The AND circuit group 4 generates 4-bit codes of 20 (:R4 output), 21 (:R3 output), 22 (:R2 output), and 23 (:R1 output) by code generation circuits each consisting of 4 units. "0" to "F" are generated as "0" to "F". The 20th digit of these code outputs is ORed by the OR circuit S1 and output as the output of the OR circuit S1: X1. Further, the 21st digit of the code output is ORed by the OR circuit S2 and outputted as the output of the OR circuit S2: X2. Further, the 22nd digit of the code output is ORed by the OR circuit S3 and output as the output of the OR circuit S3: X3. Also, the 23rd digit of the code output is ORed by OR circuit S4 and
Output: Output as X4. In this way, one code "0" to "F" corresponding to the outputs of Q1 to Q16, which are not selected at the same time, is generated by the OR circuits S1 to S.
4 outputs: obtained as X1 to X4. For example, if the code is "3", X1=1, X2=1, X3=0,
4=0, and if the code is "9", then X1=
1, X2=0, X3=0, and X4=1. Note that all feature matching signals are connected to the input of NOR circuit T1, so if none of the feature matching signals becomes "1" (i.e., when none of the features match), the output of T1 is "1". become. At this time, when the pixel of interest 5f is a ○ dot, the output of the 2-input AND circuit U1 becomes "1", the output of the OR circuit Q1 is set to "1", and the code "0" is output to X1 to X4 (:X
1 = 0, X2 = 0, X3 = 0, and output code "F" to X1 to X4 (:X1=1,X2=
1, X3=1, X4=1). In this way, if the pixel 5f does not match the predetermined characteristics, the data of the pixel 5f of interest is stored as is and printed. In addition, in the above example, the method of recognizing whether the first dot of the route is a ○ dot or a ● dot was explained, but it does not necessarily have to be the first dot, but the dot of interest 5f or any one dot on the route. It may also be a method that targets.

Outputs X1 to X4 of the data generation circuit are converted into X1 and X2 by a known parallel-to-serial conversion circuit 44.
.

[Other Embodiments] FIGS. 23 to 25 are diagrams showing a second embodiment according to the present invention. In this case, the route of the data string is determined such that a data string in which all the points of change exist between adjacent data is a characteristic of the route to be predetermined. An example of a route selected in this way is shown in FIG. Route in FIG. 24(A): r1' is 5d → 6d → 5e → 6e → 5e → 6f → 4f → → 4g
It forms a data string of →5g→4g→5h. The relationship between the characteristics and dot information for the data string at this time is shown in FIG. 25(A). In the same figure, the dot information at the beginning of the route = ● dot,
A dot string characterized by the number of information change points on the route=all (11) is extracted as shown in FIG. 19(A). Also, the route in Figure 24(B): r2' is 5d → 6d → 5e
→ 6e → 4f → 5f → 4g → 5g → 4h → 5h data string is formed. The relationship between the features and dot information for the data string at this time is shown in FIG. 25(B). In the same figure, the dot information at the beginning of the route = ○ dot, the number of information change points on the route =
The dot row characterized as all (9) is shown in Figure 19 (B
) is extracted as

A specific example of the feature detection circuit of the second embodiment based on this logic is shown in FIG. In the same figure, A1 to A9
is an exclusive logic circuit, and the input data strings 5d, 6d,
Detect points of change between adjacent data of 5e, 6e, 4f, 5f, 4g, 5g, 4h, and 5h. The output of each exclusive logic circuit is input to a 9-input AND circuit V1, and when all of the exclusive logic circuits input as outputs are "1", the output of the 9-input AND circuit V1 is set to "1". This makes it possible to extract the feature that there is a change in all adjacent points of the data string on the route. The AND circuit P1 detects that the first dot of the data string at this time is a ○ dot, and it can be detected that it matches the characteristics of the dot string shown in FIG. 19(B). The processing after feature detection is the same as that shown in FIG. 9 above.

FIG. 26 is a diagram showing a specific example of a feature detection circuit as a third embodiment of the present invention. The same figure is shown in Figure 1 above.
2(B) route r2(:5d→5g→5f→6e→6
This circuit detects the characteristics of d→5d→5e→4f→4g→4h). In this case, 5d, 5e, 4f on the route,
The data of 4g and 4h are logically inverted by inverter circuits E5 to E9 and then input to exclusive logic circuits A1 to A9. The 9-input OR circuit and the inverter E10 detect that the outputs of the exclusive logic circuits A1 to A9 are all "0", that is, there is no change in the input data of the adjacent exclusive logic circuits on the route. Therefore, by detecting with the two-input AND circuit P2 that the pixel of interest 5h is a ● dot, the characteristics of the data string shown in FIG. 19(B) can be detected. The processing after feature detection is the same as that shown in FIG. 9 above.

FIG. 27 is a diagram showing a specific example of a feature detection circuit as a fourth embodiment of the present invention. This embodiment is an example in which the circuit of the first embodiment explained with reference to FIG. 8 is implemented using a different method. Among the numerals in the figure, the same numerals as in FIG. 8 indicate the same devices. The route r13 (:3g→4f→5e→6d→7d) detected in the example in the same figure
→7e→6e→5f→4g→3h) The fact that there is only one change point in 2
It is obtained from the output of input OR circuit G1. In this case, it is possible to determine that the position of the change point is at the "fifth" position from the first data by detecting that the output of the exclusive logic circuit A5 becomes "1". Therefore, by obtaining the AND of the output of the exclusive logic circuit A5 and the output of the 2-input OR circuit G1 by the 2-input AND circuit J5, only one change point on the route r13 exists in the fifth data adjacent part from the beginning. can be detected. Therefore, by taking the state and logic of the leading data 3g of the route r13, the features (N) and (M) can be extracted from the two-input AND circuits P1 and P2, respectively. The processing after feature detection is the same as that shown in FIG. 9 above.

FIG. 28 is a diagram showing a specific example of a feature detection circuit as a fifth embodiment of the present invention. This embodiment is an example in which the circuit of the first embodiment explained with reference to FIG. 8 is implemented using a different method. Among the numerals in the figure, the same numerals as in FIG. 8 indicate the same devices. The route r13 (:3g→4f→5e→6d→7d) detected in the example in the same figure
→7e→6e→5f→4g→3h) is detected by exclusive logic circuits A1 to A9. In this case, the position of the change point is "fifth" from the first data, which means that only the output of exclusive logic circuit A5 is "1" and A1, A2, A
3. All outputs of A4, A6, A7, A8, and A9 are "0"
This can be detected by detecting that the Therefore, the output of exclusive logic circuit A5 and exclusive logic circuits A1 and A
By ANDing each output of 2, A3, A4, A6, A7, A8, and A9 with each signal inverted by inverter circuits E10 to E17 using a 9-input AND circuit W1,
It can be detected that only one change point on the route r13 exists in the fifth data adjacent portion from the beginning. Therefore, by taking the state and logic of the first data 3g of route r13, (N) and (M
) features can be extracted. The processing after feature detection is the same as that shown in FIG. 9 above.

In the above embodiment, in the sub-scanning direction, 3
For a printer engine that has a printing function of 0.00 dots/inch, the controller can print 30 dots/inch for both main and sub-scanning.
When transmitting image data of 0 dots/inch, the resolution in the printer engine is equivalent to 4 times the resolution in the sub-scanning direction (: 1200 dots/inch) in the main scanning direction, and 300 dots/inch in the sub-scanning direction. Although we have explained the case of printing at a print density of dots/inch, the equivalent print density in the main scanning direction is not necessarily limited to 4 times that in the sub-scanning direction, but can be 2 times, 3 times, 4 times, 5 times, 6 times, It may be 7 times, 8 times, etc.

Next, in the sub-scanning direction, 600 dots/
For a printer engine with inch printing function,
When transmitting image data of 300 dots/inch in both main scanning and sub-scanning from the controller, the printer engine transmits 1200 dots/inch equivalently in the main scanning direction and 600 dots/inch in the sub-scanning direction. A sixth embodiment in which printing is performed at a print density of dots/inch will be described with reference to FIGS. 29 to 37.

FIG. 33 shows how to take a small area for printing the pixel of interest in the sixth embodiment. The sixth embodiment is as follows:
In the same figure, the pixel of interest (:5f) in the center of the dot matrix memory consisting of 300 dots/inch, 11 dots in the main scanning direction x 9 dots in the sub-scanning direction, is printed 4 times in the main scanning direction x 2 times in the sub-scanning direction. Set of small plots with density (:X1
, X2, X3, X4, Y1, Y2, Y3, Y4) to print the image data.

In the sixth embodiment, the characteristics of the image data in the peripheral area surrounding the pixel of interest (11 pixels in the main scanning direction x 9 pixels in the sub-scanning direction) surrounding the pixel of interest are checked for the data transmitted from the controller, and the above-described processing is performed according to the results. This is to change the pixel of interest. More specifically, for example, when printing a pixel of interest among the dot data group of the alphabetic character "a" with a resolution of 300 dots/inch shown in FIG. Pixel x sub-scanning 9 pixels = 9
9 pixels) is stored in a temporary storage means. Thereafter, the characteristics of the dot data group within the area are checked, and the data of the pixel of interest to be printed is changed according to the characteristics and printed. In this case, the data is changed to data such that the contour of the figure made up of dot groups is printed smoothly. In the sixth embodiment, as shown in FIG.
, X2, X3, X4, Y1, Y2, Y3, Y4). Therefore, at the printing stage, printing is performed at an equivalent printing density of 1200 dots/inch in the main scanning direction x 600 dots/inch in the sub scanning direction.

FIG. 29 is a diagram showing a circuit block of a VDO signal processing section 101 that performs smoothing processing installed in the input section of the 600 dot/inch printer engine, and is similar to the diagram explained in the first embodiment. 7 is a diagram corresponding to FIG. In the figure, devices with the same reference numbers as in FIG. 7 indicate devices with the same functions.

In FIG. 29, SW1 to SW9 are switch means, which switch the respective positions "α" and "β" in the figure to switch the signals input to the respective line memories 25 to 33. The switching position of the switch means is controlled by a control signal SWC issued by a control circuit 47, which will be described later. The control circuit 47 inputs a synchronization signal BD' corresponding to 600 dots/inch in sub-scanning for printing at 600 dots/inch, and every time the synchronization signal BD' is input, BD'
A control signal SWC is generated which is inverted in synchronization with the signal. Note that the synchronization signal BD interfaces with the controller.
is generated as a signal corresponding to 300 dots/inch in sub-scanning by subtracting the synchronization signal BD' for each line in main-scanning. First, the switch means SW1 to SW9 are set to the "α" position. The controller transmits 300 dots/inch image data VDO in synchronization with the BD signal. Line memories 1 to 9 store the 300 dots/inch image signal VDO while sequentially shifting it in synchronization with the clock signal VCLK, and each line memory stores dot information of the main scanning length for the page to be printed. . Each line memory is connected in the order of line memory 1 → line memory 2 → line memory 3 → ... → line memory 9, and stores dot information for the main scanning length of 9 lines in the sub-scanning direction. do. After that, the switch means SW1 to SW9
is switched to the position "β" by the control signal SWC issued from the control circuit 47. 34 to 42 are shift registers, and each shift register 1 to 9 corresponds to each of the line memories 1 to 9 and inputs the output from each line memory in synchronization with the clock signal VCKN. At this time, the data output from each line memory is re-inputted into the line memories 1-9 via the switch means SW1-SW9. Each shift register consists of 11 bits, and as shown in the figure, 1a to 1k, 2a to 2k, 3a to 3k,
..., 9a to 9k constitute a dot matrix memory of 11 dots in the main scanning direction x 9 lines in the sub-scanning direction. A dot 5f in the center of the matrix memory is defined as a dot of interest. 43 is a processing circuit that detects the characteristics of the data stored in the dot matrix memory for smoothing and changes the pixel of interest 5f as necessary;
9k (99 bits in total) are input, and a modified parallel signal MDT (:X1, X2, X3, X4) is output. The parallel signal MDT (X1, X2, X3, X4)
is input to the parallel-to-serial conversion circuit 44. The parallel-to-serial conversion circuit 44 converts the input parallel signal M
DT (X1, X2, X3, X4) as serial signal VDO
After converting into M, the laser 55 is driven by a laser driver (not shown). Similarly, processing for one main scanning line is sequentially performed.

Thereafter, the switch means SW1 to SW9 are switched to the position "α". Then, in synchronization with the synchronization signal BD' inputted at the next timing, the data is similarly read from the line memories 1 to 9 and transferred to the next line memory, and the data is output to the shift registers 1 to 9. The processing circuit 43 detects the characteristics of the data stored in the dot matrix memory of 11 dots in the main scanning direction x 9 dots in the sub-scanning direction output from the shift register, and changes the target pixel 5f as necessary, A parallel signal MDT (Y1, Y2, Y3, Y4) is output. The parallel-serial conversion circuit 44 converts the input parallel signal MDT (Y1, Y2, Y3, Y4) into a serial signal VDOM, and then drives the laser 55 by a laser driver (not shown). Similarly, processing for one main scanning line is sequentially performed.

Thereafter, the switch means SW1 to SW9 are switched to the position "α". Then, the image signal VDO of the next sub-scanning line of 300 dots/inch transmitted from the controller is input.

In the sixth embodiment, the parallel signal is 4 bits as explained above, but the first MDT signal (X1, X2, X3, X4) and the second MDT signals (Y1, Y2, Y3, Y4) are output alternately. Reference numeral 45 denotes a clock generation circuit which receives a BD' signal, which is a main scanning synchronization signal, and generates a clock signal VCK as a clock signal synchronized with the signal. The clock signal VCK has a frequency twice as high as the clock frequency f0 necessary for recording at 600 dots/inch in the main scanning direction. The serial signal VDOM (:X1, X2, X3, X4 or Y1
, Y2, Y3, Y4) are sent out sequentially. 46 is a frequency dividing circuit which receives the clock signal VCK and divides the frequency by two to generate a clock signal VCKN having a frequency f0. The clock signal VCKN is used as a synchronization clock when dot data is taken into the processing circuit 43 from the dot matrix memory.

Of the processing circuit 43, the feature extraction circuit section is the circuit of FIG. 8 explained in the first embodiment, the circuit of FIG. 23 explained in the second embodiment, or the circuit explained in the third embodiment. 26, the circuit of FIG. 27 explained in the fourth embodiment, or the circuit of FIG. 28 explained in the fifth embodiment. Of the processing circuits 43, the data generation circuits used in the sixth embodiment are shown in FIGS. 38 and 32. In FIGS. 20 to 32, devices with the same reference numbers as those in FIGS. 9 and 10 indicate devices having the same functions. 31 is a diagram showing details of the data generation section 1 of FIG. 30, and FIG. 32 is a diagram showing details of the data generation section 2 of FIG. 30. Further, R1 to R64 in FIG. 31 and R1' to R64' in FIG. 32 are the same as the configuration shown in FIG. 10.

FIGS. 30 to 32 show a data generation circuit that generates data for the pixel of interest 5f in accordance with the characteristics of the detected data string. In the same figure, Q1 to Q16 and Q1'
~Q16' is an OR circuit, R1-R64 and R1'-R6
4' and U1-U2 are 2-input AND circuits, S1-S4, S1'-S4' and S5-S8 are 16-input OR circuits,
E4 and E18 are inverter circuits, and T1 is a NOR circuit. When generating the first MDT signal explained in FIG. 29, the control signal SWC output from the control circuit 47
The "1" level is output. In this state, the data generation section 1 is selected by the two-input AND circuits U3 to U6 and U3' to U6' and the two-input OR circuits S5 to S8, and X1, X2, X3, and X4 are output as parallel signals. In addition, when generating the second MDT signal described with reference to FIG. 29, the control signal SWC output from the control circuit 47 is output at the "0" level. In this state, the data generation section 2 is selected by the two-input AND circuits U3 to U6 and U3' to U6' and the two-input OR circuits S5 to S8, and Y1, Y2, Y3, and Y4 are output as parallel signals.

Each of the output signals of the feature detection circuit extracted as a feature of a predetermined data string corresponding to a plurality of routes is applied to OR circuits Q1 to Q16 in order to select the output data of X1 to X4. OR circuits Q1' to Q to select data of Y1 to Y4 at the same time when connected to one of the
16'.

Change signal in this case (:X1,X2,X3
, X4, Y1, Y2, Y3, Y4) are shown in Figures 34 to 3.
6. The characteristics of the data string shown in the figure are the same as those shown in FIG. 19 in the first embodiment.

For example, in the case of the data string characterized by FIG. 34(A), the pixels of interest are X1 to X4 and Y1 in the same figure.
The data is changed to the data indicated by ~Y4 and printed. In this case, X1=1, X2=1, X3=0, X4=1, that is, the code for X: "B", Y1=1, Y2=0,
Y3=0, Y4=0, i.e. code for Y: “1”
Each time the feature matching signal (A) is generated from the data generation circuit, the feature matching signal (A) input from the feature extraction circuit is input to the OR circuit Q12 and the OR circuit Q2'.

Furthermore, in the case of the data string characterized by FIG. 34(B), the pixels of interest are X1 to X4 and Y1 to Y1 in the same figure.
The data is changed to the data indicated by Y4 and printed. In this case, X1=0, X2=0, X3=1, X4=0, that is, the code for
3=1, Y4=1, that is, the code for Y: Every time "E" is generated from the data generation circuit, the feature matching signal (B) input from the feature extraction circuit is input to the OR circuit Q5 and the OR circuit Q15'. be done.

Furthermore, in the case of the data string characterized by FIG. 36(M), the pixels of interest are X1 to X4 and Y1 to Y1 in the same figure.
The data is changed to the data indicated by Y4 and printed. In this case, X1=1, X2=1, X3=0, X4=0, or the code for X: "3", Y1=1, Y2=0,
3=0, Y4=0, that is, the code for Y: Every time a "1" is generated from the data generation circuit, the feature matching signal (M) input from the feature extraction circuit is input to the OR circuit Q4 and the OR circuit Q2'. be done.

Furthermore, in the case of the data string characterized by FIG. 36(N), the pixels of interest are X1 to X4 and Y1 to Y1 in the same figure.
The data is changed to the data indicated by Y4 and printed. In this case, X1=0, X2=0, X3=1, X4=1, i.e. the code for
3=1, Y4=1, that is, the code for Y: Every time "E" is generated from the data generation circuit, the feature matching signal (N) input from the feature extraction circuit is input to the OR circuit Q13 and the OR circuit Q15'. be done.

Similarly, feature matching (A) to (
N) and other matching characteristics (not shown), OR circuit Q1
~Q16, and OR circuit Q1'~Q16
' is connected to one of the '.

Further, all the feature matching signals including the above (A) to (N) are connected to the NOR circuit T1. In this way, corresponding to the output "1" of the OR circuits Q1 to Q16 and Q1' to Q16', the AND circuit groups of R1 to R64 and R1' to R16' are each formed by a code generation circuit consisting of four units. 20 (:R4 output and R4' output), 21 (:R3
output and R3' output), 22 (: R2 output and R2'
As a 4-bit code of output), 23 (: R1 output and R1' output), codes from "0" to "F" are generated as a code for the X output and a code for the Y output, respectively. The 20 digits of these code outputs are ORed by the OR circuit S1 or S1' and output as the output of the OR circuit S1: X1 or the output of the OR circuit S1': Y1. The 21st digit of the code output is ORed by the OR circuit S2 or S2' and output as the output of the OR circuit S2: X2 or the output of the OR circuit S2': Y2. Also, the 22 digits of the code output
is ORed by the OR circuit S3 or S3' and output as the output of the OR circuit S3: X3 or the output of the OR circuit S3': Y3. The 23rd digit of the code output is ORed by the OR circuit S4 or S4' and output as the output of the OR circuit S4: X4 or the output of the OR circuit S4': Y4. In this way, two or more of Q1 to Q16 are not selected at the same time.
One code "0" to "F" corresponding to the output of is obtained as the outputs of the OR circuits S1 to S4: X1 to X4.

[0096] Also, one code "0" corresponding to the outputs of Q1' to Q16', in which two or more are not selected at the same time.
~ "F" is the output of OR circuit S1'-S4': Y1-Y
Obtained as 4. For example, if the code of X is "3", X1=1, X2=1, X3=0, X4=0,
Also, if the code of Y is "9", Y1=1, Y2=
0, Y3=0, Y4=1. Note that all feature matching signals are connected to the input of NOR circuit T1, so if none of the feature matching signals becomes "1" (i.e., when none of the features match), the output of T1 is "1". become. At this time, if the pixel of interest 5f is a ○ dot, the 2-input AND circuit U
1 becomes "1", outputs of OR circuits Q1 and Q1' become "1", and code "0" is applied to X1 to X4 and Y1 to Y4.
” is output (:X1=0,X2=0,X3=0,X4=0
and Y1=0, Y2=0, Y3=0, Y4=0), and if the pixel of interest 5f is a ● dot, then the two-input AND circuit U
The output of 2 becomes "1", the outputs of OR circuits Q16 and Q16' become "1", and the code "F" is output to X1 to X4 and Y1 to Y4 (: X1 = 1, X2 = 1, X3 = 1 ,X4
=1 and Y1=1, Y2=1, Y3=1, Y4=1). In this way, if the pixel 5f does not match the predetermined characteristics, the data of the pixel 5f of interest is stored as is and printed. In addition, in the above example, the method of recognizing whether the first dot of the route is a ○ dot or a ● dot was explained, but it does not necessarily have to be the first dot, but the dot of interest 5f or any one dot on the route. It may also be a method that targets.

The outputs X1 to X4 of the data generation circuit are converted into X1, X2 by a known parallel-to-serial conversion circuit 44.
,
As a result, a signal VDOM is generated, which is outputted in the order of Y1, Y2, Y3, and Y4 in synchronization with the clock signal VCK, and the VDOM signal drives a laser through a laser drive circuit (not shown).

As a result, the image in FIG. 37(A), which is a part of the character "a" in FIG. The modified image is printed by driving a laser. The portion changed in units of small sections has the effect of changing the local image density of the outline portion or shifting the printing position of the print dots by the electrophotographic process. As a result, the outline of the character is printed as a smooth image on the paper surface.

In the above embodiment, 6 in the sub-scanning direction.
For a printer engine that has a printing function of 0.00 dots/inch, the controller can print 30 dots/inch for both main and sub-scanning.
When transmitting image data of 0 dots/inch, the resolution in the printer engine is equivalent to 4 times the resolution in the sub-scanning direction in the main scanning direction (: 1200 dots/inch), and 600 dots/inch in the sub-scanning direction. Although we have explained the case of printing at a print density of dots/inch, the equivalent print density in the main scanning direction is not necessarily limited to 4 times that in the sub-scanning direction, but can be 2 times, 3 times, 4 times, 5 times, 6 times, It may be 7 times, 8 times, etc.

According to this embodiment, it is possible to perform optimal smoothing processing according to the curvature of the contour, and to extract the characteristics of the dot pattern based on information on a plurality of predetermined routes. It is also possible to detect different patterns using the dot pattern, and the characteristics of the dot pattern can be detected using a simplified logic circuit.

[0101]

[Effects of the Invention] As explained above, the present invention extracts the characteristics of a dot pattern in the surrounding area of a pixel of interest using information sequences on a plurality of predetermined routes, and This method changes the pixel of interest using a simplified logic circuit, making it possible to detect near-horizontal and near-vertical contours, and perform optimal smoothing correction according to the curvature of the contour. .

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an engine portion of a laser beam printer that is an embodiment of the present invention.

FIG. 2 is a diagram showing interface signals between a printer engine section and a controller.

FIG. 3 is a diagram showing an example of a pattern expressed by dot data.

FIG. 4 is a diagram showing a matrix memory.

5 is a schematic diagram of storing image data in a matrix memory from the dot pattern of FIG. 3; FIG.

6 is a schematic diagram of storing image data in a matrix memory from the dot pattern of FIG. 3; FIG.

FIG. 7 is a block diagram showing details of a VDO signal processing section according to the first embodiment of the present invention.

FIG. 8 is a block diagram showing details of the processing circuit of FIG. 7;

FIG. 9 is a block diagram showing details of the processing circuit of FIG. 7;

FIG. 10 is a block diagram showing a part of FIG. 9 in detail;

FIG. 11 is a diagram showing a change area of a pixel of interest applied in the first embodiment of the present invention.

FIG. 12 is a diagram showing an example of a data feature extraction route applied to this embodiment.

FIG. 13 is a diagram showing an example of a data feature extraction route applied to this embodiment.

FIG. 14 is a diagram showing an example of a data feature extraction route applied to this embodiment.

FIG. 15 is a diagram illustrating the concept of a feature extraction unit of this embodiment.

FIG. 16 is a diagram illustrating an example of the characteristics of data extracted by the feature extraction unit of the present embodiment.

FIG. 17 is a diagram illustrating an example of the characteristics of data extracted by the feature extraction unit of this embodiment.

FIG. 18 is a diagram illustrating an example of characteristics of data extracted by the feature extraction unit of the present embodiment.

FIG. 19 is a diagram illustrating an example of a pattern arrangement extracted by the feature extraction unit of this embodiment.

FIG. 20 is a diagram illustrating an example of a pattern arrangement extracted by the feature extraction unit of this embodiment.

FIG. 21 is a diagram illustrating an example of a pattern arrangement extracted by the feature extraction unit of this embodiment.

FIG. 22 is a diagram showing an example of a smoothed printed image obtained by the first embodiment of the present invention.

FIG. 23 is a circuit diagram showing a second embodiment of the present invention.

FIG. 24 is a diagram showing an example of a feature extraction route according to the second embodiment of the present invention.

FIG. 25 is a diagram showing an example of the characteristics of data extracted by the feature extraction unit of the second embodiment of the present invention.

FIG. 26 is a circuit diagram showing a third embodiment of the present invention.

FIG. 27 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 28 is a circuit diagram showing a fifth embodiment of the present invention.

FIG. 29 is a block diagram showing details of a VDO signal processing section according to a sixth embodiment of the present invention.

FIG. 30 is a diagram showing details of the processing circuit of FIG. 29;

31 is a circuit diagram showing details of the data generation section 1 of FIG. 30. FIG.

32 is a circuit diagram showing details of the data generation section 2 of FIG. 30. FIG.

FIG. 33 is a diagram illustrating a changed area of a pixel of interest in the sixth embodiment.

FIG. 34 is a diagram showing an example of a pattern arrangement extracted by the custom extraction unit in the sixth embodiment.

FIG. 35 is a diagram showing an example of a pattern arrangement extracted by the custom extraction unit in the sixth embodiment.

FIG. 36 is a diagram showing an example of a pattern arrangement extracted by the custom extraction section in the sixth embodiment.

FIG. 37 is a diagram showing an example of a smoothed printed image obtained by the sixth embodiment.

[Explanation of symbols]

11 photosensitive drum, 14 developing device, 51 semiconductor laser, 52 polygon mirror, 8-8' fixing device, 200 controller, 100 printer, 101 VDO signal processing section, 25-33 line memory, 34-42 shift register, 43 processing circuit , 44 parallel-serial conversion circuit, 45 clock generation circuit, 46 frequency division circuit, A1-A9 exclusive logic circuit, B1-B9 and C1-C9 AND circuit, Q1-Q1
6 OR circuit

Claims (3)

[Claims] 1. Information signal generation means for generating an information signal, modulation means for modulating a light beam according to the information signal, and scanning means for deflecting the light beam and scanning the recording medium. In a scanning type information recording apparatus that forms an electrostatic latent image on a recording medium and further visualizes the electrostatic latent image on the recording medium by a developing means, a part of the information signal emitted from the information signal generating means is a temporary storage means for temporarily storing the information;
means for extracting information on a plurality of predetermined routes from the stored information group as an information string; feature extraction means for extracting features of the extracted information string; a feature matching means for detecting whether or not the feature matching means matches one of a plurality of predetermined features; and a feature matching means for detecting whether the feature matching means matches one of the plurality of predetermined features. and information changing means for changing the print information of a specific pixel of interest among the information group stored in the temporary storage means when detecting this, based on a change signal obtained from the information changing means. An information recording apparatus characterized in that the information recording apparatus performs recording by modulating the light beam. 2. The information recording apparatus according to claim 1, wherein the feature of the information string is a feature representing whether or not there is a change in information between adjacent pieces of information in the information string. 3. The information recording device according to claim 1, wherein the feature of the information string is a feature expressed by a position of a change point of information between adjacent pieces of information in the information string and a state of a predetermined piece of information in the information string. .