JPH04257906A - Constant current circuit - Google Patents

Abstract

PURPOSE:To completely prevent a current from flowing in the case of the stop and further to prevent current accuracy from getting worse in the case of the use by turning on/off a switching transistor provided serially to a connecting means. CONSTITUTION:When the potential of a control terminal 3 is low, an NMOS transistor Q11 for switching is turned off and an NMOS transistor Q12 is turned on. As the result, an NPN transistor Q1 is operated as a diode short-circuiting the collector and the base, and a current mirror circuit is formed. When the potential of the control terminal 3 is high, the Q12, is turned off and the Q11 is turned on. Therefore, since no bias is impressed to the bases of NPN transistors Q1-Q3, those transistors are turned off, and the operation of a using circuit 1 is stopped. Since the Q1 is turned off at such a time, no current flows to a resistor R1. On the other hand, when an inverter 11 is manufactured with CMOS constitution, current consumption at the inverter 11 is zero as well.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant current circuit, and more particularly to a circuit configuration of a constant current circuit that reduces current consumption during standby.

0002

[Prior Art] Conventionally, constant current circuits have been widely used in analog integrated circuits to apply bias currents to differential amplifiers and emitter follower (or source follower) circuits, and to provide bias currents as loads for various amplifiers. There is.

FIG. 5 shows a circuit diagram of an example of a conventional constant current circuit. This constant current circuit is similar to Utilization Circuit 1 as described above.
In order to apply several bias currents (represented by two in FIG. 5) to the resistor R1, as shown in FIG.
and the current flowing through the NPN bipolar transistor (
It has a current mirror circuit 2 consisting of NPN transistors Q1, Q2 and Q3 (hereinafter referred to as NPN transistors) and resistors R2, R3 and R4.

[0004] The NPN transistor Q4 has a resistor R1
One end of the input is input, and NPN transistors Q1, Q2
It operates as an emitter follower circuit whose output is the base of Q3. Note that instead of providing this transistor Q4, a constant current circuit may be used in which the collector and base of the transistor Q1 are directly diode-connected.

As the power source 4 of this constant current circuit, a power source applied to the integrated circuit from the outside or a voltage source generated within the integrated circuit is used.

By the way, if we look at the circuit 1 to which a bias current is applied by such a constant current circuit,
There are many cases where it is desired to stop the usage circuit 1 during non-selection or standby, and in such cases, the usage circuit is stopped by turning off the constant current circuit.

The NPN transistor Q51 in FIG. 5 is provided for this purpose, and when the potential of the control terminal 3 is set high, the transistor Q51 is turned on.
Since the input voltage of the current mirror circuit 2 connected to the collector of this transistor becomes approximately 0V, the circuit 1 used
can be turned off.

[0008]

[Problems to be Solved by the Invention] As mentioned above, in the conventional constant current circuit, in order to turn off the utilization circuit 1, an NPN
When transistor Q51 is turned on, NPN transistors Q2 and Q3 are turned off and no current is supplied to circuit 1.

However, in this case, since current flows through the resistor R1 and the transistor Q51, power consumption becomes a problem. In particular, this becomes a big problem when the integrated circuit is used in a battery-powered device and includes a number of constant current circuits.

On the other hand, in order to solve the above problem of power consumption, a constant current circuit in which an analog switch circuit is inserted in series with the resistor R1 has been put into practical use.

However, such a constant current circuit has the disadvantage that current accuracy deteriorates because the on-resistance of the analog switch circuit is added to the value of the resistor R1. In order to avoid this deterioration in current accuracy, it is effective to make the on-resistance of the analog switch circuit sufficiently low.
This requires the use of large transistors,
It becomes expensive.

The present invention has been made in view of the above-mentioned problems, and provides a simple means for creating a constant current circuit in which no current flows at all when stopped and which does not cause deterioration in current accuracy due to switching transistors when in use. The aim is to realize this.

[0013]

[Means for Solving the Problems] The constant current circuit of the present invention has the following features:
A current source transistor that supplies current to an external circuit, a bias transistor whose control electrode is connected to a control electrode of the current source transistor, and a reference current source that supplies a reference current to the bias transistor, The output current of the current source transistor is controlled by applying an equal bias to the control electrode of the bias transistor and the control electrode of the current source transistor through a connecting means that connects the electrode on the reference current source side and the control electrode. In a constant current circuit of the type that controls the current to be equal to the reference current, in series with the connection means,
It is characterized by the provision of a switching transistor.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a preferred embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a first embodiment of the present invention.

In this embodiment, the present invention is applied to, among the conventional constant current circuits described above, a constant current circuit having a configuration in which the collector and base of an NPN transistor Q1 are diode-connected.

The difference between this embodiment and the conventional constant current circuit is that the NPN transistor Q51 in the conventional constant current circuit
and two N-channel MOS transistors (
Q11 and Q12 (hereinafter referred to as NMOS transistors)
Another point is that an inverter 11 is provided.

In this embodiment, the NPN transistor Q1
An NMOS transistor Q1 is connected between the collector and base of
2 is connected, and an NMOS transistor Q11 is connected between the base of the NPN transistor Q1 and the ground terminal. The conduction state of these two NMOS transistors is determined by the provision of the inverter 11.
controlled in a contradictory manner.

The operation of this embodiment will be described below. When the potential of control terminal 3 is low, the switching NMO
S transistor Q11 is turned off. On the other hand, NMOS transistor Q12 is turned on.

As a result, the NPN transistor Q1 operates as a diode with its collector and base shorted, forming a current mirror circuit similar to a conventional constant current circuit.

At this time, the base currents of the NPN transistors Q1, Q2, and Q3 flow through the NMOS transistor Q12, but this value is smaller than that of the NPN transistor Q1.
Since the collector current is about 1/100 of the current flowing through the resistor R1, a small-sized transistor can be used without worrying about the on-resistance of the NMOS transistor Q12, and it is inexpensive.

On the other hand, when the potential of the control terminal 3 is high, N
MOS transistor Q12 is turned off, and conversely, NMOS transistor Q11 is turned on. Therefore, at this time, since no bias is applied to the bases of the NPN transistors Q1, Q2, and Q3, these transistors are turned off, and the operation of the circuit 1 to be used can be stopped.

At this time, since the NPN transistor Q1 is off, no current flows through the resistor R1. Further, when the inverter 11 is made with a CMOS configuration, the current consumption in the inverter 11 is also zero. Therefore, in this embodiment shown in FIG. 1, no current flows at all when the motor is stopped.

Although the NMOS transistor Q11 can be omitted without any problem in operation, it is inserted to speed up the switching operation.

Next, a second embodiment of the present invention will be described. FIG. 2 is a circuit diagram showing the circuit configuration of a second embodiment of the present invention.

[0025] This embodiment has the following additions to the first embodiment shown in FIG.
An NPN transistor Q4 is added.

The NPN transistor Q4 operates as an emitter follower and supplies the current flowing to the NMOS transistor Q12 (that is, the base current of the NPN transistors Q1, Q2, and Q3) from its own collector.
The current from the base side of the NMOS transistor Q12 is reduced to one part of the current amplification degree (usually about 1/100) to reduce the influence on the input of the current mirror circuit.

That is, by providing the NPN bipolar transistor Q4, the NMOS transistor Q
Even if 12 is configured with a bipolar transistor, its base current etc. can be prevented from affecting the input of the current mirror circuit.

Therefore, according to this embodiment, it is possible to configure the NMOS transistor Q12 with a bipolar transistor, improving the flexibility of the circuit configuration.

Next, a third embodiment of the present invention will be described. FIG. 3 is a circuit diagram showing the circuit configuration of a third embodiment of the present invention.

In this embodiment, the NPN transistor in the second embodiment shown in FIG. 2 is replaced with a PNP transistor. In addition, in this example, the NMO in FIG.
The S transistor Q11 is replaced with a PMOS transistor Q11P of a conductivity type opposite to that of the second embodiment, and the inverter 11 is also removed. In addition, in FIG. 3, the corresponding circuit elements in FIG. 2 are indicated with the suffix P.

In FIG. 3, when the potential of the control terminal 3 is low, the switching PMOS transistor Q11
P turns on, turning off PNP transistors Q1P, Q2P and Q3P. At this time, the switching NM
OS transistor Q12P is off, and PNP transistor Q4P is off because its base bias is cut off.

On the other hand, when the potential of the control terminal 3 is high, P
MOS transistor Q11P is turned off, and NMOS
Since transistor Q12P is turned on, this embodiment operates as a normal current mirror circuit.

Note that the current flowing through the NMOS transistor Q12P is one part of the current amplification degree of the base current of the PNP transistors Q1P, Q2P, and Q3P.
The collector current of transistor Q1P (i.e. resistor R1
This is extremely small compared to the current flowing through P. Therefore, since the on-resistance of the NMOS transistor Q12P can be ignored, the size of this transistor may be extremely small.

[0034] Also, in this embodiment, the switching MO
Since MOS transistors of opposite conductivity types are used for the S transistors Q11P and Q12P, there is an advantage that the inverter 11 in the first embodiment shown in FIG. 1 and the second embodiment shown in FIG. 2 can be omitted. .

Next, a fourth embodiment of the present invention will be described. FIG. 4 is a circuit diagram showing the circuit configuration of a fourth embodiment of the present invention.

This embodiment is constructed by replacing the NPN transistor with an NMOS transistor in the first embodiment shown in FIG. 1, and performs the same operation as the first embodiment.

In this embodiment, a constant current source 5 is used in place of the resistor R1 in the first embodiment. According to such a configuration, when the potential of the control terminal 3 is high, the NMOS
Since transistors Q12 and Q41 are turned off, there is no place for the current from constant current source 5 to flow, and the current eventually becomes zero.

This embodiment includes the effects of the first embodiment,
Furthermore, it also has the effect that the circuit can be constructed using only CMOS transistors.

[0039]

As described above, the present invention includes a switching transistor in series with the path connecting the collector (or drain) and base (or gate) of the bias transistor of the current mirror circuit.

Therefore, according to the present invention, by turning the switching transistor on and off, a constant current circuit in which no current flows at all when stopped and which does not cause deterioration of current accuracy when in use can be created using a small switching transistor. It can be realized at low cost with a simple circuit using .

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a second embodiment of the invention.

FIG. 3 is a circuit diagram of a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a fourth embodiment of the present invention.

FIG. 5 is a circuit diagram of an example of a conventional constant current circuit.

[Explanation of symbols]

1 Utilized circuit 2 Current mirror circuit 3 Control terminal 4 Power supply 5 Constant current source 11 Inverter

Claims (2)

[Claims] 1. A current source transistor that supplies current to an external circuit, a bias transistor whose control electrode is connected to a control electrode of the current source transistor, and a reference current source that supplies a reference current to the bias transistor. , by applying an equal bias to the control electrode of the bias transistor and the control electrode of the current source transistor through a connecting means that connects the reference current source side electrode of the bias transistor and the control electrode, 1. A constant current circuit of a type that controls the output current of a source transistor to be equal to the reference current, characterized in that a switching transistor is provided in series with the connection means. 2. The constant current circuit according to claim 1,
A second switching transistor provided between the control electrode of the bias transistor and the ground terminal, and a conduction state of the second switching transistor and a conduction state of the switching transistor provided in series with the connection means are mutually connected. 1. A constant current circuit comprising means for controlling in a contradictory manner.