JPH04252388A - Pwm wave integration circuit - Google Patents
Pwm wave integration circuitInfo
- Publication number
- JPH04252388A JPH04252388A JP888691A JP888691A JPH04252388A JP H04252388 A JPH04252388 A JP H04252388A JP 888691 A JP888691 A JP 888691A JP 888691 A JP888691 A JP 888691A JP H04252388 A JPH04252388 A JP H04252388A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- discharging
- charging
- circuit
- pwm wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】0001
【産業上の利用分野】本発明はテレビジョン受像機のマ
イクロコンピュータなどから出力されるパルス幅変調波
の積分回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrating circuit for pulse width modulated waves output from a microcomputer of a television receiver or the like.
【0002】0002
【従来の技術】近年、データ伝送手段が多方面で行なわ
れるが、パルス幅変調波(以下、PWM波と称す)はそ
の一つの手段として広く利用される。2. Description of the Related Art In recent years, data transmission means have been used in many ways, and pulse width modulated waves (hereinafter referred to as PWM waves) are widely used as one of the means.
【0003】以下、従来のPWM波積分回路について図
面を参照しながら説明する。図3はPWM波を波形図で
示す。図においてt1はPWM波のパルス幅、t2はP
WM波がローレベル‘L’である期間、t3はPWM波
の周期にそれぞれ対応する時間長を表わす。A conventional PWM wave integrating circuit will be explained below with reference to the drawings. FIG. 3 shows a PWM wave in a waveform diagram. In the figure, t1 is the pulse width of the PWM wave, and t2 is P
During the period when the WM wave is at the low level 'L', t3 represents the time length corresponding to the period of the PWM wave.
【0004】図4は従来のPWM波積分回路の構成を回
路図で示す。図において、PWM波を発生するマイクロ
コンピュータ(以下、マイコンと称す)1の出力端子2
に積分回路の入力端子3が接続され、入力端子3がダイ
オードD1と抵抗R2の並列回路を介してトランジスタ
Q1のベースに接続されるとともに、抵抗R1で電源V
CCに接続される。トランジスタQ1のベースがコンデ
ンサC1でアースに、エミッタが抵抗R3でアースに、
コレクタが前記電源VCCに接続される。PWM波を積
分した電圧がトランジスタQ1のエミッタから出力され
る。
電源VCCの電圧はおよそ12ボルト程度である。FIG. 4 shows a circuit diagram of a conventional PWM wave integration circuit. In the figure, an output terminal 2 of a microcomputer (hereinafter referred to as microcomputer) 1 that generates PWM waves
The input terminal 3 of the integrating circuit is connected to the input terminal 3, and the input terminal 3 is connected to the base of the transistor Q1 through a parallel circuit of a diode D1 and a resistor R2.
Connected to CC. The base of transistor Q1 is grounded through capacitor C1, and the emitter is grounded through resistor R3.
A collector is connected to the power supply VCC. A voltage obtained by integrating the PWM wave is output from the emitter of transistor Q1. The voltage of power supply VCC is approximately 12 volts.
【0005】マイコン1の出力端子2ではパルス幅t1
の期間で開放端となり、期間長t2のローレベル期間で
はカレントシンクとなるように動作し、抵抗R1を負荷
として入力端子3に所定のPWM波を発生する。At the output terminal 2 of the microcomputer 1, the pulse width t1
It becomes an open end during the period t2, and operates as a current sink during the low level period of period length t2, and generates a predetermined PWM wave at the input terminal 3 with the resistor R1 as a load.
【0006】上記の構成においてその動作を説明する。
パルス幅t1の期間においてマイコン1は開放端となり
、コンデンサC1が抵抗R1を介して電源電圧VCCで
充電され、その充電時定数はほぼR1×C1である。つ
ぎに、期間長t2のローレベル期間ではコンデンサC1
の充電電荷がマイコンのカレントシンクにより抵抗R2
を介して放電され、その時定数はほぼR2×C1である
。すなわち、充電動作時にはダイオードD1が導通方向
となるので充電がほとんど抵抗R1だけを介して行なわ
れ、また、放電動作時にはダイオードD1が逆方向であ
るので放電はほとんど抵抗R2だけを介して行なわれる
。したがって、充電と放電の時定数がダイオードD1に
より切り換えられることになる。この充放電動作により
コンデンサC1にはパルス幅とともに増加する積分電圧
が発生し、その積分電圧がトランジスタQ1のエミッタ
から出力される。(ただし、トランジスタのベース・エ
ミッタ間電圧VBEだけ低下する。)この積分電圧はパ
ルス幅t1にほぼ比例して大きくなるが、充電時定数と
放電時定数との関係により1次曲線または2次曲線的な
関係となる。The operation of the above configuration will be explained. During the period of pulse width t1, the microcomputer 1 becomes an open terminal, and the capacitor C1 is charged with the power supply voltage VCC via the resistor R1, and the charging time constant is approximately R1×C1. Next, during the low level period of period length t2, the capacitor C1
The charge is transferred to the resistor R2 by the current sink of the microcontroller.
The time constant is approximately R2×C1. That is, during the charging operation, the diode D1 is conductive, so charging is performed almost exclusively through the resistor R1, and during the discharging operation, the diode D1 is in the opposite direction, so discharging is performed almost exclusively through the resistor R2. Therefore, the charging and discharging time constants are switched by the diode D1. This charging/discharging operation generates an integrated voltage in the capacitor C1 that increases with the pulse width, and this integrated voltage is output from the emitter of the transistor Q1. (However, it decreases by the voltage VBE between the base and emitter of the transistor.) This integrated voltage increases almost in proportion to the pulse width t1, but depending on the relationship between the charging time constant and the discharging time constant, it curves into a linear curve or a quadratic curve. This is a relationship.
【0007】図5は充電時定数と放電時定数とがほぼ等
しいとき、図6は充電時定数が放電時定数よりもかなり
大きいとき、図7は充電時定数が放電時定数よりもかな
り小さいときのパルス幅と積分電圧との関係をグラフで
示す。FIG. 5 shows when the charging time constant and discharging time constant are almost equal, FIG. 6 shows when the charging time constant is much larger than the discharging time constant, and FIG. 7 shows when the charging time constant is much smaller than the discharging time constant. The relationship between the pulse width and the integrated voltage is shown in a graph.
【0008】[0008]
【発明が解決しようとする課題】このような従来のPW
M波積分回路では図5,図6,図7で示すように、パル
ス幅に対する積分電圧の特性はおよそ非直線または、2
次曲線の関係となる。PWM波を積分した電圧を他の電
子回路部に供給する制御電圧として利用するとき、3次
曲線変化などの積分電圧が欲しい場合があるが、従来の
積分回路ではそのような積分電圧が得られない問題があ
った。[Problem to be solved by the invention] Such a conventional PW
In the M-wave integrator circuit, as shown in Figures 5, 6, and 7, the characteristics of the integrated voltage with respect to the pulse width are approximately nonlinear or 2
The relationship is the following curve. When using the voltage obtained by integrating the PWM wave as a control voltage to be supplied to other electronic circuits, it may be necessary to obtain an integrated voltage such as a cubic curve change, but such an integrated voltage cannot be obtained with conventional integrating circuits. There were no problems.
【0009】本発明は上記の課題を解決するもので、パ
ルス幅対積分電圧の関係が3次曲線変化を含め、任意の
関係に設定できるPWM波積分回路を提供することを目
的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a PWM wave integration circuit in which the relationship between pulse width and integrated voltage can be set to any desired relationship, including changes in cubic curves.
【0010】0010
【課題を解決するための手段】本発明は上記の課題を解
決するために、電荷を蓄積するコンデンサと、前記コン
デンサを充電する充電抵抗し、その充電された電荷を放
電する放電抵抗と、前記充電抵抗または前記放電抵抗を
バイパスするダイオードとで構成する充放電回路を備え
、幅変調されたパルス列を相違なる充電時定数と放電時
定数で積分した積分電圧を前記コンデンサの両端に発生
する回路において、ツェナーダイオードを前記充放電回
路の抵抗に挿入して設け、パルス幅対積分電圧の関係が
非直線の関係となるPWM波積分回路とする。[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides a capacitor for accumulating electric charge, a charging resistor for charging the capacitor, a discharging resistor for discharging the charged electric charge, and a discharging resistor for discharging the charged electric charge. A circuit comprising a charging/discharging circuit configured with a charging resistor or a diode that bypasses the discharging resistor, and generating an integrated voltage across the capacitor by integrating a width-modulated pulse train with different charging time constants and discharging time constants. A Zener diode is inserted into the resistor of the charging/discharging circuit to provide a PWM wave integrating circuit in which the relationship between the pulse width and the integrated voltage is non-linear.
【0011】[0011]
【作用】本発明は上記の構成において、フェナーダイオ
ードが積分電圧に依存して充電時次定数と放電時定数を
変化させ、パルス幅対積分電圧出力の関係が高次の曲線
関係となる。According to the present invention, in the above structure, the Fenner diode changes the charging time constant and the discharging time constant depending on the integrated voltage, so that the relationship between the pulse width and the integrated voltage output becomes a high-order curved relationship.
【0012】0012
【実施例】(実施例1)以下、本発明の一実施例のPW
M波積分回路について図面を参照しながら説明する。[Example] (Example 1) Hereinafter, PW of an example of the present invention
The M-wave integrator circuit will be explained with reference to the drawings.
【0013】図1は本発明の一実施例のPWM波積分回
路の構成を回路図で示す。図において、マイコン1の出
力端子2は従来例と同様にパルス幅期間t1で開放、ロ
ーレベル期間t2でカレントシルクとなるように制御さ
れ、抵抗R1を負荷抵抗として入力端子3に所定のPW
M波を出力する。FIG. 1 is a circuit diagram showing the configuration of a PWM wave integrating circuit according to an embodiment of the present invention. In the figure, the output terminal 2 of the microcomputer 1 is controlled to be open during the pulse width period t1 and become a current silk during the low level period t2, as in the conventional example, and a predetermined PW is applied to the input terminal 3 using the resistor R1 as a load resistance.
Outputs M waves.
【0014】入力端子3は抵抗R1を介して電源電圧V
CCに、ダイオードD1を介してトランジスタQ1のベ
ースに、抵抗R4とツェナーダイオードD2の直列接続
に抵抗R1を並列接続した2端子回路を介してコンデン
サC1に接続される。コンデンサC1の他端はアースに
接続される。前記トランジスタQ1のコレクタは電源電
圧VCCに、エミッタは抵抗R3を介してアースに接続
される。Input terminal 3 is connected to power supply voltage V via resistor R1.
It is connected to CC, via a diode D1 to the base of a transistor Q1, and to a capacitor C1 via a two-terminal circuit in which a resistor R1 is connected in parallel to a series connection of a resistor R4 and a Zener diode D2. The other end of capacitor C1 is connected to ground. The collector of the transistor Q1 is connected to the power supply voltage VCC, and the emitter is connected to ground via a resistor R3.
【0015】上記の構成においてその動作を説明する。
図において、パルス幅が比較的に小さいときは積分電圧
がツェナーダイオードD2のツェナー電圧を越えず、し
たがって、ツェナーダイオードが存在しない従来例と同
様の動作により、パルス幅t1の期間においてコンデン
サC1は抵抗R1を介して電源電圧VCCに充電され、
その充電時定数はほぼR1×C1である。期間長t2の
ローレベル期間においてはコンデンサC1の充電電荷が
抵抗R2を介して放電され、その放電時定数はR2×C
1である。この場合もダイオードD1が充電時と放電時
に時定数を切り換える動作を行なっている。The operation of the above configuration will be explained. In the figure, when the pulse width is relatively small, the integrated voltage does not exceed the Zener voltage of the Zener diode D2, and therefore, due to the same operation as the conventional example without the Zener diode, the capacitor C1 becomes a resistor during the period of the pulse width t1. Charged to power supply voltage VCC via R1,
Its charging time constant is approximately R1×C1. During the low level period with period length t2, the charge in the capacitor C1 is discharged via the resistor R2, and the discharge time constant is R2×C
It is 1. In this case as well, the diode D1 performs the operation of switching the time constant during charging and discharging.
【0016】パルス幅が充分大きく、コンデンサC1の
積分電圧がツェナーダイオードD2のツェナー電圧を越
えるときは、放電が抵抗R1を介して行なわれるととも
に、抵抗R4とツェナーダイオードの直列回路を介して
も行なわれ、したが、放電時定数はパルス幅の小さいと
きの放電時定数よりも小さくなる。When the pulse width is sufficiently large and the integrated voltage of the capacitor C1 exceeds the Zener voltage of the Zener diode D2, discharge occurs through the resistor R1 and also through the series circuit of the resistor R4 and the Zener diode. However, the discharge time constant is smaller than the discharge time constant when the pulse width is small.
【0017】パルス幅が小さいときには放電時定数が充
電時定数よりもかなり大きく、パルス幅が大きいときに
は放電時定数が充電時定数よりもかなり小さくなるよう
に抵抗R1,R2,R4とツェナー電圧を設定すると、
従来例の図5に示した下向きの2次曲線特性から図7で
示した上向きの2次曲線特性に遷移する特性が得られ、
ツェナー電圧近辺に変曲点を備えたほぼ3次曲線と見な
せるような特性が得られる。Resistors R1, R2, and R4 and the Zener voltage are set so that when the pulse width is small, the discharging time constant is much larger than the charging time constant, and when the pulse width is large, the discharging time constant is much smaller than the charging time constant. Then,
A characteristic that transitions from the downward quadratic curve characteristic shown in FIG. 5 of the conventional example to the upward quadratic curve characteristic shown in FIG. 7 is obtained,
A characteristic that can be regarded as a substantially cubic curve with an inflection point near the Zener voltage is obtained.
【0018】図2はこのようにして得られた特性の一例
をグラフで示す。図において、積分電圧がツェナー電圧
V1となるパルス幅近辺で特性曲線が変曲している。FIG. 2 graphically shows an example of the characteristics thus obtained. In the figure, the characteristic curve curves around the pulse width where the integrated voltage becomes the Zener voltage V1.
【0019】なお、トランジスタQ1はバッファ回路を
構成するものであり、演算増幅器を用いてもよく、また
、大きい出力電流を必要としないときは省略してもよい
。Note that the transistor Q1 constitutes a buffer circuit, and may be an operational amplifier, or may be omitted when a large output current is not required.
【0020】以上のように本発明の実施例のPWM波積
分回路によれば、コンデンサを充電する充電抵抗と、そ
の充電された電荷を放電する放電抵抗と、充電時に前記
放電抵抗をバイパスするダイオードとを備え、幅変調さ
れたパルス列を積分した積分電圧を前記コンデンサの両
端に発生する回路において、抵抗とツェナーダイオード
と抵抗の直列回路を前記放電抵抗に並列に接続して設け
、パルス幅対積分電圧の関係が非直線の関係となるよう
に設定したPWM波積分回路とすることにより、ほぼ、
3次曲線となるPWM波積分回路が実現できる。As described above, according to the PWM wave integration circuit of the embodiment of the present invention, a charging resistor for charging a capacitor, a discharging resistor for discharging the charged charge, and a diode for bypassing the discharging resistor during charging. In a circuit that generates an integrated voltage obtained by integrating a width-modulated pulse train across the capacitor, a series circuit of a resistor, a Zener diode, and a resistor is connected in parallel to the discharge resistor, and the pulse width vs. By using a PWM wave integrator circuit that is set so that the voltage relationship is non-linear, almost
A PWM wave integration circuit having a cubic curve can be realized.
【0021】なお、実施例ではツェナーダイオードを1
個だけ用いて3次曲線の関係を実現したが、ツェナー電
圧の異なる複数のツェナーダイオードを用いて3次以上
の複雑な曲線の特性を備えた積分回路を構成することも
できる。[0021] In the embodiment, one Zener diode is used.
Although the relationship of the cubic curve was realized by using only one Zener diode, it is also possible to construct an integrating circuit having the characteristic of a complex curve of the third order or more by using a plurality of Zener diodes having different Zener voltages.
【0022】[0022]
【発明の効果】以上の実施例から明かなように、本発明
は電荷を蓄積するコンデンサと、前記コンデンサを充電
する充電抵抗と、その充電された電荷を放電する放電抵
抗と、前記充電抵抗または前記放電抵抗をバイパスする
ダイオードとで構成する充放電回路を備え、幅変調され
たパルス列を相違なる充電時定数と放電時定数で積分し
た積分電圧を前記コンデンサの両端に発生する回路にお
いて、ツェナーダイオードを前記充放電回路の抵抗に挿
入して設け、パルス幅対積分電圧の関係が非直線となる
PWM波積分回路とすることにより、パルス幅対積分電
圧の特性が任意の曲線となる積分回路を得ることができ
る。As is clear from the above embodiments, the present invention includes a capacitor that stores charge, a charging resistor that charges the capacitor, a discharging resistor that discharges the charged charge, and a charge resistor or The circuit includes a charging/discharging circuit configured with a diode that bypasses the discharging resistor, and generates an integrated voltage across the capacitor by integrating a width-modulated pulse train with different charging time constants and discharging time constants. is inserted into the resistor of the charge/discharge circuit to form a PWM wave integrator circuit in which the relationship between pulse width and integrated voltage is non-linear, thereby creating an integrator circuit in which the characteristic of pulse width versus integrated voltage forms an arbitrary curve. Obtainable.
【図1】本発明の一実施例のPWM波積分回路の構成を
示す回路図FIG. 1 is a circuit diagram showing the configuration of a PWM wave integration circuit according to an embodiment of the present invention.
【図2】本発明の実施例のPWM波積分回路におけるパ
ルス幅対積分電圧出力特性の例を示すグラフFIG. 2 is a graph showing an example of pulse width versus integrated voltage output characteristics in the PWM wave integration circuit according to the embodiment of the present invention.
【図3】P
WM波の波形を示す波形図[Figure 3] P
Waveform diagram showing the waveform of WM wave
【図4】従来のPWM波積分回路の構成を示す回路図[Figure 4] Circuit diagram showing the configuration of a conventional PWM wave integration circuit
【
図5】従来のPWM波積分回路におけるパルス幅対積分
電圧出力特性の一例を示すグラフ[
Figure 5: Graph showing an example of pulse width versus integrated voltage output characteristics in a conventional PWM wave integration circuit
【図6】従来のPWM波積分回路におけるパルス幅対積
分電圧出力特性の一例を示すグラフ[Fig. 6] A graph showing an example of pulse width versus integrated voltage output characteristics in a conventional PWM wave integration circuit.
【図7】従来のPWM波積分回路におけるパルス幅対積
分電圧出力特性の一例を示すグラフ[Fig. 7] A graph showing an example of pulse width versus integrated voltage output characteristics in a conventional PWM wave integration circuit.
R1 充電抵抗 R2 放電抵抗 D1 ダイオード D2 ツェナーダイオード C1 コンデンサ R1 Charging resistance R2 Discharge resistance D1 Diode D2 Zener diode C1 Capacitor
Claims (1)
ンデンサを充電する充電抵抗と、その充電された電荷を
放電する放電抵抗と、前記充電抵抗または前記放電抵抗
をバイパスするダイオードとで構成する充放電回路を備
え、幅変調されたパルス列を相違なる充電時定数と放電
時定数で積分した積分電圧を前記コンデンサの両端に発
生する回路において、ツェナーダイオードを前記充放電
回路の抵抗に挿入して設け、パルス幅対積分電圧の関係
が非直線であるPWM波積分回路。1. A charging/discharging device comprising a capacitor that stores charge, a charging resistor that charges the capacitor, a discharging resistor that discharges the charged charge, and a diode that bypasses the charging resistor or the discharging resistor. The circuit includes a circuit and generates an integrated voltage across the capacitor by integrating a width-modulated pulse train with different charging and discharging time constants, wherein a Zener diode is inserted into a resistor of the charging and discharging circuit, A PWM wave integration circuit in which the relationship between pulse width and integrated voltage is non-linear.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP888691A JPH04252388A (en) | 1991-01-29 | 1991-01-29 | Pwm wave integration circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP888691A JPH04252388A (en) | 1991-01-29 | 1991-01-29 | Pwm wave integration circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04252388A true JPH04252388A (en) | 1992-09-08 |
Family
ID=11705166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP888691A Pending JPH04252388A (en) | 1991-01-29 | 1991-01-29 | Pwm wave integration circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04252388A (en) |
-
1991
- 1991-01-29 JP JP888691A patent/JPH04252388A/en active Pending
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