JPH0423523A - Satellite receiving tuner - Google Patents
Satellite receiving tunerInfo
- Publication number
- JPH0423523A JPH0423523A JP12849990A JP12849990A JPH0423523A JP H0423523 A JPH0423523 A JP H0423523A JP 12849990 A JP12849990 A JP 12849990A JP 12849990 A JP12849990 A JP 12849990A JP H0423523 A JPH0423523 A JP H0423523A
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- circuit
- shield case
- case
- satellite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims description 2
- 238000001914 filtration Methods 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Receivers (AREA)
Abstract
Description
【発明の詳細な説明】 産業上の利用分野 本発明は衛星受信用チューナに関する。[Detailed description of the invention] Industrial applications The present invention relates to a tuner for satellite reception.
従来の技術
従来のこの種の衛星受信用チューナは、シールドケース
の外壁面に入力端子を装着し、この入力端子に対応する
シールドケース内部分に、衛星第1中間周波数信号を衛
星第2中間周波数信号へ変換する回路部を設けていた。2. Description of the Related Art A conventional satellite receiving tuner of this type has an input terminal mounted on the outer wall of a shield case, and transmits a satellite first intermediate frequency signal to a satellite second intermediate frequency signal to a portion inside the shield case corresponding to the input terminal. It had a circuit section that converted it into a signal.
そして屋外アンテナで受信された12CH2の信号をコ
ンバータで衛星第1中間周波数信号であるIGH2に変
換し、それをケーブルを介して前記入力端子、に印加し
、前記回路部中のフィルタ回路、増幅回路で、濾波およ
び増幅していた。Then, the 12CH2 signal received by the outdoor antenna is converted to IGH2, which is the satellite first intermediate frequency signal, by a converter, and applied to the input terminal via a cable, and is applied to the filter circuit and amplifier circuit in the circuit section. It was filtered and amplified.
発明が解決しようとする課題
しかしながらこのような従来の衛星受信用チューナにお
いては、自由空間において、I G HZ帯の別の信号
が存在した場合、それが入力端子近傍からシールドケー
ス内に侵入し、その結果、正規のIGH2帯信号と混信
して、その後の信号処理に悪影響を与えていた。Problems to be Solved by the Invention However, in such a conventional satellite receiving tuner, when another signal in the IGHZ band exists in free space, it enters the shield case from near the input terminal, As a result, there was interference with the regular IGH 2 band signal, which adversely affected subsequent signal processing.
そこで本発明は、この外来からの不要信号の前記フィル
タ回路、増幅回路への侵入を阻止することを目的とする
ものである。Therefore, an object of the present invention is to prevent unnecessary signals from outside from entering the filter circuit and the amplifier circuit.
課題を解決するための手段
そしてこの目的を達成するために、本発明は第1のシー
ルドケースの壁面に衛星第1中間周波数信号の入力端子
を結合し、この入力端子に対応する第1のシールドケー
ス内部分に衛星第2中間周波数信号へ変換する回路部を
設け、前記回路部のうち衛星第1中間周波数信号を濾波
するフィルタ回路および衛星第1中間周波数信号の増幅
回路をシールドケースで覆ったものである。Means for Solving the Problems and in order to achieve this object, the present invention couples an input terminal of a satellite first intermediate frequency signal to the wall of a first shield case, and a first shield corresponding to this input terminal. A circuit section for converting to a satellite second intermediate frequency signal is provided in the inner part of the case, and a filter circuit for filtering the satellite first intermediate frequency signal and an amplification circuit for the satellite first intermediate frequency signal of the circuit section are covered with a shielding case. It is something.
作用
以上の構成とすれば、たとえ外来からのIGH7帯の不
要信号が入力端子近傍から第1のシールドケース内に侵
入したとしても、前記不要信号を第2のシールドケース
が阻止するので、結論として回路部のフィルタ回路と増
幅回路には外来からの不要信号が侵入しなくなるのであ
る。If the configuration is as described above, even if an unnecessary signal in the IGH7 band from an external source enters the first shield case from near the input terminal, the second shield case will block the unnecessary signal, so the conclusion is that This prevents unnecessary signals from outside from entering the filter circuit and amplifier circuit of the circuit section.
実施例
以下本発明の一実施例を添付図面を用いて説明する。第
2図は一般的に良く用いられている衛星受信用チューナ
の電気的なブロック図を示しており、1は入力端子、2
はフィルタ回路、3〜5は増幅回路、6はミキサー、7
.8はフィルタ回路、9はFM復調回路、10はスレッ
ショルドエクステンション回路、11は発振回路、12
は分周器、13はフェーズドロックループである。そし
てこれらのうち入力端子1は第1図に示す第1のシール
ドケス14の外壁面に取り付けられ、それ以外はこの第
1のシールドケース14内に設けられている。EXAMPLE An example of the present invention will be described below with reference to the accompanying drawings. Figure 2 shows an electrical block diagram of a satellite reception tuner that is commonly used.
is a filter circuit, 3 to 5 are amplifier circuits, 6 is a mixer, 7
.. 8 is a filter circuit, 9 is an FM demodulation circuit, 10 is a threshold extension circuit, 11 is an oscillation circuit, 12
is a frequency divider, and 13 is a phased lock loop. Among these, the input terminal 1 is attached to the outer wall surface of the first shield case 14 shown in FIG. 1, and the other terminals are provided inside the first shield case 14.
また第1のシールドケース14内の入力端子1近傍には
第2のシールドケース15が設けられており、この第2
のシールドケース15により第2図で示した特にフィル
タ回路2と増幅回路3を覆っている。Further, a second shield case 15 is provided near the input terminal 1 within the first shield case 14.
A shield case 15 specifically covers the filter circuit 2 and amplifier circuit 3 shown in FIG.
またこの第2のシールドケース15は下面が開口した箱
型となっているが、その入力端子1側の側壁下部は、入
力端子lの引込みのために切欠いたものとなっている。The second shield case 15 has a box shape with an open bottom, and the lower part of the side wall on the input terminal 1 side is cut out to accommodate the input terminal l.
したがってこの切欠から外来不要信号が侵入しやすくな
るので、それを補うべく、第1のシールドケース14の
入力端子1側の側壁14aの上端は第2のシールドケー
ス15側へ折曲げられて折曲部14bが形成され、これ
により出来るだけ第1、第2のシールドケース14.1
5間の間隔を狭くしている。Therefore, unnecessary external signals are likely to enter through this notch, so in order to compensate for this, the upper end of the side wall 14a of the first shield case 14 on the input terminal 1 side is bent toward the second shield case 15. A portion 14b is formed, which allows the first and second shield cases 14.1 to be separated as much as possible.
The interval between 5 is narrowed.
また第2のシールドケース15の入力端子1との対向部
15aは第1図(a)のごと(入力端子1側に突出して
いるので、その分析曲部14bには切欠部14Cを形成
している。Further, since the portion 15a of the second shield case 15 facing the input terminal 1 protrudes toward the input terminal 1 side as shown in FIG. There is.
つまり、これで第2のシールドケース15を上方から簡
単に装着したり、逆に脱着したりできるようにしている
のである。In other words, the second shield case 15 can now be easily attached or detached from above.
発明の効果
以上の構成とすれば、たとえ外来からの不要信号が入力
端子近傍から第1のシールドケース内に侵入したとして
も、前記不要信号を第2のシールドケースがその内部へ
の侵入を阻止するので、結論として回路部には外来から
の不要信号が侵入しなくなるものである。If the configuration exceeds the effects of the invention, even if an unnecessary signal from an external source enters the first shield case from near the input terminal, the second shield case prevents the unnecessary signal from entering the inside thereof. Therefore, the conclusion is that unnecessary signals from outside will not enter the circuit section.
第1図(a)は本発明の一実施例にかかる衛星受信用チ
ューナの上面図、第1図(b)は第1図(a)のbb゛
線断面回、第2図はその回路ブロック図である。
1・・・・・・入力端子、2・・・・・・フィルタ回路
、3・・・・・増幅回路、14・・・・・第1のシール
ドケース、15・・・・・・第2のシールドケース。FIG. 1(a) is a top view of a satellite reception tuner according to an embodiment of the present invention, FIG. 1(b) is a cross-sectional view taken along line bb' of FIG. 1(a), and FIG. 2 is a circuit block thereof. It is a diagram. 1... Input terminal, 2... Filter circuit, 3... Amplifier circuit, 14... First shield case, 15... Second shield case.
Claims (1)
号の入力端子を結合し、この入力端子に対応する第1の
シールドケース内部分に衛星第2中間周波数信号へ変換
する回路部を設け、前記回路部のうち衛星第1中間周波
数信号を濾波するフィルタ回路および衛星第1中間周波
数信号の増幅回路を第2のシールドケースで覆った衛星
受信用チューナ。An input terminal for the satellite first intermediate frequency signal is coupled to the outer wall surface of the first shield case, and a circuit section for converting the satellite to the second intermediate frequency signal is provided in the inner part of the first shield case corresponding to the input terminal, A tuner for satellite reception in which a filter circuit for filtering a satellite first intermediate frequency signal and an amplification circuit for the satellite first intermediate frequency signal among the circuit portion are covered with a second shield case.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12849990A JPH0423523A (en) | 1990-05-17 | 1990-05-17 | Satellite receiving tuner |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12849990A JPH0423523A (en) | 1990-05-17 | 1990-05-17 | Satellite receiving tuner |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0423523A true JPH0423523A (en) | 1992-01-27 |
Family
ID=14986255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12849990A Pending JPH0423523A (en) | 1990-05-17 | 1990-05-17 | Satellite receiving tuner |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0423523A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0794246A (en) * | 1993-09-20 | 1995-04-07 | Nec Corp | High frequency signal interface connector and its mounting method |
US6503192B1 (en) | 1999-05-18 | 2003-01-07 | Pentax Corporation | Insertion facilitating device for intestinal endoscope |
KR100827760B1 (en) * | 1999-12-27 | 2008-05-07 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Method of manufacturing an electroluminescence display device |
-
1990
- 1990-05-17 JP JP12849990A patent/JPH0423523A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0794246A (en) * | 1993-09-20 | 1995-04-07 | Nec Corp | High frequency signal interface connector and its mounting method |
US6503192B1 (en) | 1999-05-18 | 2003-01-07 | Pentax Corporation | Insertion facilitating device for intestinal endoscope |
KR100827760B1 (en) * | 1999-12-27 | 2008-05-07 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Method of manufacturing an electroluminescence display device |
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