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JPH04214658A - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPH04214658A
JPH04214658A JP90401490A JP40149090A JPH04214658A JP H04214658 A JPH04214658 A JP H04214658A JP 90401490 A JP90401490 A JP 90401490A JP 40149090 A JP40149090 A JP 40149090A JP H04214658 A JPH04214658 A JP H04214658A
Authority
JP
Japan
Prior art keywords
lsi
package
chip
lead frame
showing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP90401490A
Other languages
Japanese (ja)
Inventor
Masahiro Mochizuki
優宏 望月
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP90401490A priority Critical patent/JPH04214658A/en
Publication of JPH04214658A publication Critical patent/JPH04214658A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、チップを搭載するフレ
ーム部と、チップからの信号を出力するリード部とによ
って構成されたリードフレームをパッケージで固めてな
る半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a lead frame including a frame portion for mounting a chip and a lead portion for outputting signals from the chip is packaged.

【0002】0002

【従来の技術】図5(a) と(b) は半導体装置(
以下LSIと呼ぶ)の基本構成を示す図であって、(a
) はリードフレームの構造を示す模式的斜視図、(b
) は従来のLSIの一形状例を示す斜視図である。リ
ードフレーム1は、図5(a) に示すように、チップ
10を搭載したフレーム部2と、チップ10からの信号
を出力するリード部3と、チップ10とリード部3間を
電気的に接続するワイヤ4とによって構成されている。
[Prior Art] Figures 5(a) and 5(b) show a semiconductor device (
(hereinafter referred to as LSI) is a diagram showing the basic configuration of (a
) is a schematic perspective view showing the structure of the lead frame, (b
) is a perspective view showing an example of the shape of a conventional LSI. As shown in FIG. 5(a), the lead frame 1 includes a frame portion 2 on which a chip 10 is mounted, a lead portion 3 that outputs a signal from the chip 10, and an electrical connection between the chip 10 and the lead portion 3. It is constituted by a wire 4.

【0003】LSI40は、前記リードフレーム1のリ
ード部3の一部とその先端部に設けられた端子部3a以
外の部分をエポキシ樹脂等より成るパッケージ5で固め
ることによってLSIとして部品化される。図5(b)
 はこのようにして製作された従来のLSI40の一形
状例を示している。
[0003] The LSI 40 is made into an LSI by solidifying a portion of the lead portion 3 of the lead frame 1 and a portion other than the terminal portion 3a provided at the tip thereof with a package 5 made of epoxy resin or the like. Figure 5(b)
shows an example of the shape of a conventional LSI 40 manufactured in this manner.

【0004】0004

【発明が解決しようとする課題】従来のLSI40は、
リードフレーム1の殆どの部分がエポキシ樹脂等より成
るパッケージ5によって覆われているが、このエポキシ
樹脂は熱伝導性が良くないので、チップ10による発熱
がパッケージ5内に籠り易いという欠点がある。パッケ
ージ5からの熱の放散が不充分でこれが中に籠もると、
時間の経過と共にパッケージ5内の温度が益々上昇して
LSI40が正常に動作しなくなり、最悪の場合は破損
といった事態に発展する。
[Problems to be Solved by the Invention] The conventional LSI 40 is
Most of the lead frame 1 is covered with a package 5 made of epoxy resin or the like, but since this epoxy resin has poor thermal conductivity, there is a drawback that heat generated by the chip 10 tends to be trapped inside the package 5. If the heat dissipation from the package 5 is insufficient and it gets trapped inside,
As time passes, the temperature inside the package 5 increases more and more, causing the LSI 40 to malfunction and, in the worst case, to breakage.

【0005】本発明は、チップ10の発熱をバイパス的
に放散する手段を設けることにより、従来のものに比較
し、放熱効率を格段に向上させた半導体装置を実現しよ
うとする。
The present invention aims to realize a semiconductor device with significantly improved heat dissipation efficiency compared to conventional devices by providing means for dissipating heat generated by the chip 10 in a bypass manner.

【0006】[0006]

【課題を解決するための手段】本発明によるLSIは、
■図1に示すように、一方の端部がリードフレーム1の
フレーム部2に接触し、他方の端部がパッケージ5外へ
露出する形で配置された放熱用の弾性体部材11を装備
したもの(以下これをLSI20と称する)と、■図3
に示すように、その両端部分の開口面のみがパッケージ
5外へ露出し、その他の部分が前記リードフレーム1の
フレーム部2に密接する形で配置された冷却液流通パイ
プ16を装備したもの(以下これをLSI20Aと称す
る)と、■図4に示すように、前記流通パイプ16の代
替として、冷却液流通溝18を装備してなるもの(以下
これをLSI20Bと称する)の3種類に分かれている
が、これらは全て前記の如くチップ10の発熱をバイパ
ス的に外部へ放散するための手段を備えている。
[Means for Solving the Problems] The LSI according to the present invention has the following features:
■As shown in FIG. 1, an elastic member 11 for heat dissipation is arranged such that one end contacts the frame portion 2 of the lead frame 1 and the other end is exposed to the outside of the package 5. (hereinafter referred to as LSI20) and ■Figure 3
As shown in FIG. 2, a coolant distribution pipe 16 is provided, in which only the opening surfaces at both ends are exposed to the outside of the package 5, and the other portions are arranged in close contact with the frame portion 2 of the lead frame 1 ( (hereinafter referred to as LSI 20A); and (hereinafter referred to as LSI 20B) equipped with a coolant distribution groove 18 as an alternative to the distribution pipe 16 as shown in FIG. However, all of these devices are equipped with means for dissipating the heat generated by the chip 10 to the outside in a bypass manner, as described above.

【0007】[0007]

【作用】これら各LSI20,20A,20Bは、チッ
プ10の発熱をバイパス的に外部へ放散するための手段
をそれぞれ装備している〔■LSI20は、一方の端部
がリードフレーム1のフレーム部2に接触し、他方の端
部がパッケージ5外へ露出する形で配置された弾性体部
材11を装備しており、■LSI20Aは、冷却液の出
入り口となる開口面のみがパッケージ5外へ露出し、そ
の他の部分が前記フレーム部2に密接する形で配置され
た冷却液流通パイプ16を装備しており、■LSI20
Bは、当該流通パイプ16の代替として、冷却液流通溝
18を装備している〕ことから、熱の放散が著しく活性
化される。
[Operation] Each of these LSIs 20, 20A, and 20B is equipped with a means for dissipating the heat generated by the chip 10 to the outside in a bypass manner. The LSI 20A is equipped with an elastic member 11 arranged in such a way that the other end is exposed to the outside of the package 5, and only the opening surface that serves as the entrance and exit for the coolant is exposed to the outside of the package 5. , other parts are equipped with a coolant distribution pipe 16 arranged in close contact with the frame part 2, and ■ LSI 20
B is equipped with a coolant flow groove 18 as a substitute for the flow pipe 16], so heat dissipation is significantly activated.

【0008】[0008]

【実施例】以下実施例図に基づいて本発明を詳細に説明
する。図1(a) と(b) と(c) および(d)
 は本発明によるLSIの第1の実施例を示す図であっ
て、(a) はリードフレーム部の構造を示す斜視図、
(b) はこのリードフレーム部に装着される板バネの
一形状例を示す斜視図、(c) はパッケージ直後の状
態を示す斜視図、(d) は完成状態を示す斜視図、図
2はこのLSIの実装状態を示す模式的側断面図である
が、前記図5と同一部分にはそれぞれ同一符号を付して
いる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiment figures. Figure 1 (a), (b), (c) and (d)
1 is a diagram showing a first embodiment of an LSI according to the present invention, in which (a) is a perspective view showing the structure of a lead frame part;
(b) is a perspective view showing an example of the shape of the leaf spring attached to this lead frame part, (c) is a perspective view showing the state immediately after packaging, (d) is a perspective view showing the completed state, and FIG. This is a schematic side cross-sectional view showing the mounting state of this LSI, in which the same parts as in FIG. 5 are given the same reference numerals.

【0009】図1(a) と(b) と(c) 及び(
d) に示すように、このLSI20は、その一方の端
部がリードフレーム1のフレーム部2に接触し、他方の
端部がパッケージ5外へ露出する形で配置された弾性体
部材11(以下板バネ11と呼ぶ)を装備している。リ
ードフレーム1のフレーム部2に対して図1(a) に
示すような形で装着されるこの板バネ11は、例えばリ
ン青銅板等のように熱伝動性とバネ性を有する材料を用
いて製作される。この板バネ11は、例えばスポット溶
接法(点溶接法)で知られる電気的な溶接手段等を用い
てフレーム部2に装着されるが、この装着手段について
は特定しない。
FIGS. 1(a), (b), (c) and (
d) As shown in FIG. (referred to as a leaf spring 11). The leaf spring 11, which is attached to the frame portion 2 of the lead frame 1 in the form shown in FIG. Manufactured. This leaf spring 11 is attached to the frame portion 2 using, for example, an electric welding means known as a spot welding method, but this attachment means is not specified.

【0010】板バネ11装着後のリードフレーム1は、
図1(c) に示すように板バネ11と共にパッケージ
5によってその周囲を固められる。なお、この時の板バ
ネ11は直立状態のままであるが、その後これを矢印C
方向に折り曲げて図1(d) に示すように変形させる
。この塑性加工によって板バネ11は矢印C’方向の反
撥力を潜在的に付与される。
The lead frame 1 after the plate spring 11 is attached is as follows:
As shown in FIG. 1(c), the package 5 together with the leaf spring 11 hardens the surrounding area. Note that at this time, the leaf spring 11 remains in an upright state, but after that it is moved as shown by arrow C.
bend it in the direction shown in Figure 1(d). This plastic working potentially imparts a repulsive force in the direction of arrow C' to the leaf spring 11.

【0011】図2はこのLSI20の実装状態を示す図
であって、50はスペーサ51を介して上下2段に配置
された基板を、60はこれら全体を収容する箱をそれぞ
れ示す。 基板50上に実装されたLSI20は、自らが持つ反撥
力によって露出側の端部を箱60に接触させた板バネ1
1を介して内部の熱を箱60側に放出する。なお、箱6
0は熱伝動性の良好な材料,例えば鉄板或いは銅合金板
等を用いて製作されているので、基板50上に実装され
ているLSI20は効率的に冷却される。
FIG. 2 is a diagram showing the state in which this LSI 20 is mounted, in which 50 indicates boards arranged in upper and lower stages with spacers 51 interposed therebetween, and 60 indicates a box that accommodates the entire board. The LSI 20 mounted on the board 50 is a leaf spring 1 whose exposed end is brought into contact with the box 60 by its own repulsive force.
The internal heat is released to the box 60 side through 1. In addition, box 6
0 is manufactured using a material with good thermal conductivity, such as an iron plate or a copper alloy plate, so that the LSI 20 mounted on the substrate 50 is efficiently cooled.

【0012】図3(a) と(b) と(c) は本発
明によるLSIの第2実施例を示す図であって、(a)
 はリードフレーム部の構造を示す斜視図、(b) は
このリードフレーム部をパッケージした時の状態を示す
斜視図、(c) はリードフレーム部の細部構造を示す
要部側断面図である。図3(a) に示すように、この
LSI20Aは、その両端部分の開口面のみがパッケー
ジ5の側端面から露出し、その外周面がリードフレーム
1のフレーム部2に密接する形で配置された冷却液流通
パイプ16を装備している。この冷却液流通パイプ16
は熱伝動性の良好な銅パイプ等で構成されていることか
ら、チップ10で発生した熱はチップ10→フレーム部
2→冷却液流通パイプ16→冷却液15という熱伝動コ
ースを経て冷却液15に吸収され、上方に向かって流動
する冷却液15によって外部へ放出される。
FIGS. 3(a), 3(b), and 3(c) are diagrams showing a second embodiment of the LSI according to the present invention, in which (a)
2 is a perspective view showing the structure of the lead frame section, FIG. 1B is a perspective view showing the packaged state of the lead frame section, and FIG. As shown in FIG. 3(a), this LSI 20A is arranged such that only the opening surfaces at both ends thereof are exposed from the side end surfaces of the package 5, and the outer peripheral surface is in close contact with the frame portion 2 of the lead frame 1. It is equipped with a coolant distribution pipe 16. This coolant distribution pipe 16
is made of a copper pipe or the like with good thermal conductivity, so the heat generated in the chip 10 is transferred to the coolant 15 through the heat transfer course of the chip 10 → frame part 2 → coolant distribution pipe 16 → coolant 15. The coolant 15 flows upward and is discharged to the outside.

【0013】図中、17はチップ10の発熱によって生
じた気泡であって、この気泡17が付着すると冷却効率
が著しく阻害されるが、このLSI20Aの場合は冷却
液流通パイプ16によって冷却液15の対流が活性化さ
れるので、気泡17が冷却液流通パイプ16内に滞留す
ることは無い。このLSI20Aは、冷却液15を流動
させて冷却を行う液冷型のLSIに適用して特に効果を
発揮する。
In the figure, reference numeral 17 indicates air bubbles generated by the heat generation of the chip 10. If these air bubbles 17 adhere, the cooling efficiency will be significantly inhibited, but in the case of this LSI 20A, the cooling liquid 15 is Since convection is activated, air bubbles 17 will not remain in the coolant distribution pipe 16. This LSI 20A is particularly effective when applied to a liquid-cooled LSI that cools by flowing the cooling liquid 15.

【0014】図4(a) と(b) は本発明によるL
SIの第3の実施例を示す図であって、(a) は完成
品の一形状例を示す斜視図、(b) は内部の細部構造
を示す要部側断面図である。図4(a) と(b) に
示すように、このLSI20Bは、前記第2実施例にお
ける冷却液流通パイプ16の代替として、リードフレー
ム1のフレーム部2に沿う形で冷却液流通溝18を装備
している。なお、パッケージ5の一部に設けられるこの
冷却液流通溝18はリードフレーム1をパッケージする
時に形成される。
FIGS. 4(a) and 4(b) show L according to the present invention.
FIG. 3 is a diagram showing a third embodiment of the SI, in which (a) is a perspective view showing an example of the shape of a completed product, and (b) is a side sectional view of a main part showing a detailed internal structure. As shown in FIGS. 4(a) and 4(b), this LSI 20B has a coolant flow groove 18 along the frame portion 2 of the lead frame 1 instead of the coolant flow pipe 16 in the second embodiment. Equipped. Note that this coolant flow groove 18 provided in a part of the package 5 is formed when the lead frame 1 is packaged.

【0015】この冷却液流通溝18はフレーム部2に隣
接して設けられることから、一方の壁面はチップ10を
搭載したフレーム部2そのものである。従って、チップ
10で発生した熱は略直接的に冷却液15に伝達される
ので、放熱効率が特に良い。このLSI20Bも液冷型
のLSIに適用して効果を発揮する。
Since the coolant flow groove 18 is provided adjacent to the frame portion 2, one wall surface is the frame portion 2 itself on which the chip 10 is mounted. Therefore, the heat generated in the chip 10 is almost directly transferred to the coolant 15, so that the heat dissipation efficiency is particularly good. This LSI20B is also effective when applied to liquid-cooled LSI.

【0016】[0016]

【発明の効果】本発明によるLSIは、チップの発熱を
バイパス的に放熱する手段を備えていることから、その
内部温度が異常に上昇することは無い。そのため、この
LSIは動作が著しく安定する。
Effects of the Invention Since the LSI according to the present invention is provided with means for radiating heat generated by the chip in a bypass manner, the internal temperature thereof will not rise abnormally. Therefore, the operation of this LSI is extremely stable.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】  本発明によるLSIの第1の実施例を示す
図であって、(a) はリードフレーム部の構造を示す
斜視図、(b) はこのリードフレーム部に装着される
板バネの一形状例を示す斜視図、(c) はパッケージ
後の状態を示す斜視図、(d) は完成状態を示す斜視
図である。
FIG. 1 is a diagram showing a first embodiment of an LSI according to the present invention, in which (a) is a perspective view showing the structure of a lead frame section, and (b) is a perspective view of a leaf spring attached to this lead frame section. (c) is a perspective view showing a state after packaging; (d) is a perspective view showing a completed state.

【図2】  本発明によるLSIの実装状態を示す模式
的側断面図である。
FIG. 2 is a schematic side sectional view showing a mounting state of an LSI according to the present invention.

【図3】  本発明によるLSIの第2実施例を示す図
であって、(a) はリードフレーム部の構造を示す斜
視図、(b) はこのリードフレーム部をパッケージし
た時の状態を示す斜視図、(c) はリードフレーム部
の細部構造を示す要部側断面図である。
FIG. 3 is a diagram showing a second embodiment of the LSI according to the present invention, in which (a) is a perspective view showing the structure of the lead frame part, and (b) shows the state when this lead frame part is packaged. A perspective view, and (c) a side sectional view of the main part showing the detailed structure of the lead frame part.

【図4】  本発明によるLSIの第3実施例を示す図
であって、(a) は完成品の一形状例を示す斜視図、
(b) は内部の細部構造を示す要部側断面図である。
FIG. 4 is a diagram showing a third embodiment of the LSI according to the present invention, in which (a) is a perspective view showing an example of the shape of the finished product;
(b) is a side sectional view of the main part showing the detailed internal structure.

【図5】  半導体装置(以下LSIと呼ぶ)の基本構
成を示す図であって、(a) はリードフレームの構造
を示す模式的斜視図、(b) は従来のLSIの一形状
例を示す斜視図である。
[Fig. 5] Diagrams showing the basic configuration of a semiconductor device (hereinafter referred to as LSI), in which (a) is a schematic perspective view showing the structure of a lead frame, and (b) shows an example of the shape of a conventional LSI. FIG.

【符号の説明】[Explanation of symbols]

1  リードフレーム 2  フレーム部 3  リード部 3a  端子部 4  ワイヤ 5  パッケージ 10  チップ 11  板バネ(弾性体部材) 15  冷却液 16  冷却液流通パイプ 17  気泡 18  冷却液流通溝 20,20A,20B,40  LSI(半導体装置)
50  基板 51  スペーサ 60  箱
1 Lead frame 2 Frame portion 3 Lead portion 3a Terminal portion 4 Wire 5 Package 10 Chip 11 Leaf spring (elastic member) 15 Coolant 16 Coolant distribution pipe 17 Air bubble 18 Coolant distribution groove 20, 20A, 20B, 40 LSI ( semiconductor devices)
50 board 51 spacer 60 box

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】  チップ(10)を搭載するフレーム部
(2) と、チップ(10)からの信号を出力するリー
ド部(3) と、によって構成されたリードフレーム(
1) をパッケージ(5) で固めてなる半導体装置に
おいて、その一方の端部が前記パッケージ(5) で覆
われたフレーム部(2) に接触し、他方の端部が前記
パッケージ(5) 外へ露出する形で配置された弾性体
部材(11)を装備してなることを特徴とする半導体装
置。
1. A lead frame (2) comprising a frame part (2) on which a chip (10) is mounted, and a lead part (3) for outputting a signal from the chip (10).
In a semiconductor device formed by solidifying 1) with a package (5), one end of the semiconductor device contacts the frame part (2) covered with the package (5), and the other end contacts the outside of the package (5). A semiconductor device characterized in that it is equipped with an elastic member (11) arranged in such a manner as to be exposed to the elastic member (11).
【請求項2】  チップ(10)を搭載するフレーム部
(2) と、チップ(10)からの信号を出力するリー
ド部(3) とによって構成されたリードフレーム(1
) をパッケージ(5) で固めてなる半導体装置にお
いて、その両端部分の開口面のみがパッケージ(5) 
の側端面から露出し、その外周面がリードフレーム(1
) のフレーム部(2) に密接する形で配置された冷
却液流通パイプ(16)を装備してなることを特徴とす
る請求項1記載の半導体装置。
2. A lead frame (1) comprising a frame part (2) on which a chip (10) is mounted and a lead part (3) that outputs a signal from the chip (10).
) in a package (5), only the openings at both ends of the package (5)
is exposed from the side end surface of the lead frame (1
2. The semiconductor device according to claim 1, further comprising a coolant distribution pipe (16) disposed in close contact with the frame portion (2) of the semiconductor device.
【請求項3】  前記冷却液流通パイプ(16)の代替
として、冷却液流通溝(18)を装備してなることを特
徴とする請求項1記載の半導体装置。
3. The semiconductor device according to claim 1, further comprising a coolant flow groove (18) as a substitute for the coolant flow pipe (16).
JP90401490A 1990-12-12 1990-12-12 semiconductor equipment Withdrawn JPH04214658A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP90401490A JPH04214658A (en) 1990-12-12 1990-12-12 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP90401490A JPH04214658A (en) 1990-12-12 1990-12-12 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPH04214658A true JPH04214658A (en) 1992-08-05

Family

ID=18511316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP90401490A Withdrawn JPH04214658A (en) 1990-12-12 1990-12-12 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPH04214658A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007150044A (en) * 2005-11-29 2007-06-14 Denso Corp Semiconductor device
US7304379B2 (en) 2003-08-27 2007-12-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with pipe for passing refrigerant liquid

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7304379B2 (en) 2003-08-27 2007-12-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with pipe for passing refrigerant liquid
US7705448B2 (en) 2003-08-27 2010-04-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device for pipe for passing refrigerant liquid
JP2007150044A (en) * 2005-11-29 2007-06-14 Denso Corp Semiconductor device

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