JPH04211805A - Programmable controller - Google Patents

Abstract

PURPOSE:To reduce wiring cost by controlling both a first input/output part by a parallel bus and a second input/output part by serial communication in parallel by a single control means. CONSTITUTION:First and second remote input/output units 2, 3 and 17, 18 and a CPU unit 1A to program-control a controlled object connected to these are provided. Then, the first remote input/output units 2, 3 and the second remote input/output units 17, 18 are connected to the CPU unit 1A through the parallel bus and a serial signal line respectively. Then, the second input/output parts 17, 18 by the serial communication are controlled by the single control means 7 in parallel in addition to the first input/output parts 2, 3 by the parallel bus.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable controller, and more particularly to an improvement in the configuration between an input/output unit and external equipment.

0002

[Background Art] As automation systems become larger in scale, the installation range of control objects becomes wider, and when performing bulk control using a regular programmable controller, wiring work costs to control objects installed far away increase. To increase. To solve this problem, a remote controller is placed near the control target that is installed far away.
A method is used in which a programmable controller serving as a master station is installed and controlled by serial communication to reduce wiring construction costs. However, this serial communication method is a normal method for programmable controllers, and has the disadvantages of complicating the parallel bus and slowing the transmission speed of control information, and is not suitable for controlling objects located far away.

FIG. 13 is a block diagram of a conventional programmable controller, in which 1 is a CPU unit, 2 is an input unit, 3 is an output unit, and 4 is a base unit to which the CPU unit 1, input unit 2, and output unit 3 are installed. . 5 is an external device connected to the input unit 2, which is a limit switch in the illustrated example. 6 is output unit 3
An external device that is connected to a relay. In the example shown in the figure, it is a relay coil. 7 is a microprocessor built into the CPU unit 1; 8 is a memory for storing a user's sequence program; 9 is an ON state for the input unit 2 and output unit 3;
This is a memory that stores OFF information. 10 is the above CPU
It represents a data bus connected to unit 1, input unit 2, and output unit 3, and the illustrated example assumes an 8-bit data bus. 11 is a bus driver built into the input unit 2, and an external device 5 is connected to the input side A.
A data bus 10 is connected to the output side Y. Reference numeral 12 denotes a latch built into the output unit 3, whose input side D is connected to the data bus 10, and whose output side Q is connected to the external device 6 via a transistor driver 13 in the illustrated example. 14 is a decoder mounted on the base unit 4, the input side is connected to the signal from the CPU unit 1, and the output signal 15
, 16 are partly connected to the input unit 2 and partly to the output unit 3.

[0004] Note that the CPU unit 1 and the input unit 2
, the output unit 3 is detachable from the base unit 4 by using a connector or the like, and the number of input units 2 and output units 3 can be arbitrarily configured within the maximum range that can be attached to the base unit 4.

Next, the operation will be explained. Figure 14 is Figure 1
3 is a flowchart showing the operation of the microprocessor 7 arranged in the block diagram of FIG. The initial process (S120) in FIG. 14 is a process that is executed only once when the microprocessor 7 is reset, such as when the power is turned on, and includes processes for initializing the input unit 2 and output unit 3.

[0006] The input/output refresh process (S121) is as follows:
This is a process of storing ON/OFF state information of the external device 5 in FIG. The external device 6 is distinguished by a device number XN (N = 0 to maximum connectable points) depending on where it is connected to the input unit 2, and a device number YN (N = 0 to maximum number of connectable points). Then, 8 points of X0 to X7 are connected to the input unit 2, and 8 points of Y100 to Y107 are connected to the output unit 3.
This is an example where the points are connected. Microprocessor 7 controls decoder 14 and enables one output signal 15 among the decoder outputs. The output signal 15 is connected to the gate terminal of the bus driver 11, and is connected to the O of X0 to X7.
N, OFF information is carried on the data bus 10 and read by the microprocessor 7. Similarly, the ON and OFF information of all input units 2 is read by the microprocessor 7 and the results are stored in the inputs in the memory 9.

Next, one output signal 1 of the decoder outputs
6 is enabled, and at the same time, the ON/OFF information of Y100 to Y107 stored in the memory 9 is placed on the data bus 10. The output signal 16 is connected to the latch enable terminal of the latch 12, and the ON/OFF information of Y100 to Y107 is actually output to the external device 6 via the transistor driver 13. Similarly, the output information of the memory 9 is actually outputted to all the output units 3.

Sequence program arithmetic processing (S12
2) is a process of sequentially reading and executing the user's sequence program stored in the memory 8. An example of this sequence program is shown in FIG. The microprocessor 7 turns on XN and YN stored in the memory 9,
A calculation is performed based on the OFF information, and the calculation result is stored in the memory 9. In the example in the figure, if X0 is ON, Y100 is ON
However, if X0 is OFF, Y100 is OFF. The same applies to X7 and Y107.

Next, the END process (S123) is a process for returning the sequence calculation process to 0 steps, and at the same time checks RUN/STOP to decide whether to continue the sequence process. The microprocessor 7 thus functions as a programmable controller according to the operation flow shown in FIG.

Next, the case of outputting to the remote I/O 51 will be explained. In FIG. 16, data is written from the CPU unit 1 to the transmission data area of the master unit 1a in the CPU unit 1 by the TO command of the sequence program. By writing in the transmission data area, it is automatically transmitted to the remote I/O 51 and output to the outside.

Each output of the remote I/O 51 corresponds to each bit of the transmission data area of the master unit 1a. To turn an output ON, write “1” to the bit in the transmission data area corresponding to each output, and to turn it OFF, write “1” to the bit in the transmission data area corresponding to each output.
Write 0”.

Next, the case of reading input from the remote I/O 51 will be explained. In FIG. 17, master unit 1a is
Read from the receive data area. Remote I/O51
When external input is made to the master unit, the input information is automatically received in the reception data area of the master unit.

Each input of the remote I/O 51 corresponds to each bit of the receive data area of the master unit 1a. When an input is turned ON, the bit of the reception data area corresponding to each input becomes "1", and when it is turned OFF, it becomes "0".

As mentioned above, the bus I/O 50 is a normal
Access with /Y, remote I/O51 is FROM/T
Access with O. Therefore, as shown in FIG. 18, the special unit is integrated with the CPU unit 1, and the user can access it by X/Y regardless of the bus I/O 50 or remote I/O 51.

When the programmable controller configured as described above is used to control a conveyor using, for example, one programmable controller (parallel bus), the result will be as shown in FIG. 19. In FIG. 19,
47 is control wiring that connects the programmable controller and a controlled object 48 such as a relay or a limit switch;
9 is a conveyor.

[0016]

[Problems to be Solved by the Invention] The conventional programmable controller is configured as described above, and is of a type in which the CPU unit 1, input unit 2, and output unit 3 are mounted on the base unit 4, so it is difficult to attach and detach the units. On the other hand, when the external devices 5 and 6 that are the control targets 48 are dispersed far apart, the wiring distance between the external devices 5 and 6 and the input unit 2 and output unit 3 is There were problems such as increased length and higher wiring costs.

The present invention was made to solve the above-mentioned problems, and its purpose is to provide a programmable controller that can reduce wiring costs even if external devices are dispersed far apart. shall be.

[0018]

[Means for Solving the Problems] A programmable controller according to a first invention includes first and second input/output sections;
In order to program-control the control objects connected to the first and second input/output sections, control information is input from the control object or output to the control object via the first and second input/output sections. The first input/output section is connected to the program control section via a parallel bus, the second input/output section is connected to the program control section via a serial signal line, and the program control section is connected to the program control section via a parallel bus. The apparatus is equipped with a control means for controlling the first input/output section using a bus and the second input/output section using a serial signal in parallel.

In the programmable controller according to the second invention, in the programmable controller according to the first invention, the first input/output section is constituted by a plurality of input/output units, and the second input/output section is constituted by a plurality of input/output units. Each of the plurality of input/output units in the first input/output section includes a unit information storage means for storing information regarding the number of input/output points, and the control means in the program control section includes: Information regarding the number of input/output points of each input/output unit is read out from the unit information storage means of each input/output unit, and based on this information, an input/output number of - series is assigned to the input/output point of each input/output unit, and this input/output number is assigned to the input/output point of each input/output unit. Set the subsequent input/output number to the output number as shown above.
The first and second input/output units are controlled by the assigned input/output numbers.

[0020]

[Operation] In the first invention, a single control means controls the first input/output section using the parallel bus and the second input/output section using serial communication in parallel. In the second invention, the unit information storage means provided in each of the plurality of input/output units constituting the first input/output section using the parallel bus stores information regarding the number of input/output points of each input/output unit, The control means in the program control section controls the input/output units forming the first input/output section and the remote input/output unit forming the second input/output section based on the information regarding the number of input/output points. A series of input/output numbers are assigned to arbitrarily divide the finite number of controllable input/output points of the program control section into a first input/output section using a parallel bus and a second input/output section using serial communication. .

[0021]

【Example】

Example 1. An embodiment of the first invention will be described below with reference to the drawings. In FIGS. 1 and 2, numerals 2 to 16 are exactly the same as the conventional device described above. 1A is a program control unit that controls the input unit 2 and output unit 3 as the first input/output unit using a parallel bus, and the remote input unit 17 and remote output unit 18 as the second input/output unit using serial communication. 17 is a remote type remote input unit, 18 is a remote type remote output unit, and the remote input unit 17 and remote output unit 18 constitute a first and a second input/output section. The memory 9 stores ON/OFF information of the input unit 2, output unit 3, remote input unit 17, and remote output unit 18. 19 is an external device connected to the remote input unit 17, and 20 is an external device connected to the remote output unit 18. 21, 22, 23 are serial data communication cables, transceivers 24, 25,
26, connected to receivers 27, 28, and 29. 30
, 31 are station number setting switches for remote I/Os consisting of a remote input unit 17 and a remote output unit 18, and are set so that the station numbers do not overlap between the remote I/Os.

32 and 33 are station number matching detection circuits, 34 is a selector, 35 and 36 are P/S converters for converting parallel data into serial transmission data, and 37 and 38 are S/S converters for converting serial reception data into parallel data. It is a P converter. 39 is a receiving buffer, and 40 is a transmitting buffer, each of which is a register of 11 bits in total, including 8 bits of data, 2 bits of status, and 1 bit of parity.

41 is DMA (DIRECT MEMO)
RY ACCESS) controller has two channels, one for transmission and one for reception, and 42 is a DMA buffer memory. When the DMA function starts operating, the sequence decoding operation of the arithmetic unit is temporarily interrupted, and data transmission and reception are performed.

43 is a flag generation circuit, 44 is a data buffer built into the remote input unit 17, the input side A is connected to the external device 19, and the output side Y is connected to the input of the P/S converter 36. Ru. 45 is a latch built into the remote output unit 18, whose input D is connected to the output of the S/P converter 38, and whose output Q is connected to the external device 20 via a transistor driver 46 in the illustrated example. Then, the input unit 2 and the output unit 3 connect the bus I/O 5
Configure 0. Further, the remote input unit 17 and remote output unit 18 constitute a remote I/O.

Next, the operation will be explained. Figure 3 is Figure 1,
Microprocessor 7 arranged in the block diagram of FIG.
FIG. 4 is a flowchart showing the main operation of FIG. 4, and FIG. 4 is a flowchart showing the operation at periodically occurring real-time interrupts.

The initial process (S101) in FIG. 3 is a process that is executed only once when the microprocessor 7 as a single control means is reset, such as when the power is turned on, and initializes the input unit 2 and output unit 3. processing to set the DMA controller 41 to a predetermined mode.

In FIG. 4, a real-time interrupt occurs (
S201) Then, the microprocessor 7 executes interrupt processing. In the interrupt processing, the microprocessor 7 issues a command to the DMA controller 41 to start the transmission DMA (
S202).

Since the number of transfer bytes and the transfer data storage address of the DMA buffer memory are set in advance in the DMA controller 41 in the above-mentioned initial processing, after the microprocessor 7 gives the transmission activation command, the DMA controller roller 41 transfers the specified number of bytes of transmission data from the DMA buffer memory 42 to the transmission buffer 40, and when the transfer is completed, notifies the microprocessor 7 of the completion of DMA using a transmission DMA completion signal (S20
3). At this time, the number of bytes normally transferred is
Set a value equal to the total number of stations in O. That is, one byte of data is exchanged per station in one communication. The data transferred to the transmission buffer 40 is sent to the P/S converter 35, converted into serial data, and sent by the transceiver 24 to the remote input unit 17 via the data communication cable 21. The format of this transmission signal is shown in FIG.

[0029] The entire communication data of one time is called a frame.
A flag is added to the beginning of the frame by the flag generation circuit 43. Thereafter, the first station data, the second station data, and so on continue until the data for the total number of remote I/O stations is reached.Finally, the data becomes 0 as idle, and one frame ends. The data for one station is 8 bits of X and Y ON and OFF.
It consists of information D0 to D7 and 3 bits of additional status information. If the station number setting switch of the remote input unit 17 is set to 1 station, the selector selects the B side input by the station number match detection circuit 32 and changes the part corresponding to the 1 station data in the frame to the own station data. The signal is sent from the transceiver 25 to the data communication cable 22, and transmitted to the next station. From the second station to the final station in the frame, the selector 34 is A.
Since the side is selected, the data transmitted by the CPU unit 1A is sent as is to the next station.

Here, the first station data is the O of the external device 19.
The N and OFF states are P/S converted, and the one-station data D0 to D7 correspond to the ON and OFF states of X200 to X207. In this way, all the remote input units 17 carry the ON/OFF information of X while the frames are transmitted one after another between stations. Further, if the station number setting switch of the remote output unit 18 is set to N station, the station number coincidence detection circuit 33 converts the N-th station data in the frame into parallel data by the S/P converter 38.
and is latched by latch 45. The data of the Nth station corresponds to the ON/OFF information of Y300 to Y307, and is actually output to the external device 20.

In the case of the remote output unit 18, the Y ON/OFF information of its own station received from the previous station is sent as is to the next station. In this way, while the frames are transmitted one after another between stations, the ON/OFF information of Y is captured by all the remote output units 18 and output to the external device 20.

The data transmitted from the final station is received by the CPU unit 1A, converted into parallel data by the S/P converter 37, and set in the reception buffer 39. When data is set in the reception buffer 39, the DMA controller roller 41 starts reception DMA and transfers the reception data in the reception buffer 39 to the DMA buffer memory 42. When the transfer of all received data is completed, the DMA controller 41 sends the received DM to the microprocessor 7.
A completion signal is issued and notified. When the transmission and reception are completed in this way, the microprocessor 7 performs reception error processing (S204) to check whether there are any errors in the received data, and then returns to the main program (S20).
5).

Input/output refresh processing (S
Step 102) is the same as the process in the conventional embodiment, in which ON/OFF information of X and Y of the bus I/O 50 is transferred between the external device that performs external input/output and the memory.

Remote I/O input/output refresh processing (
In S103), the microprocessor 7 transfers the remote input XON, OFF information from the DMA buffer memory 42 to the memory 9, and transfers the YON, OFF information for remote output from the memory 9 to the DMA buffer memory 42.

The arithmetic processing of the sequence program memory 8 (S104) is a process of executing the user's sequence program stored in the sequence program memory 8. Microprocessor 7 is memory 9
The calculation is performed based on the ON/OFF information of XN and YN stored in the memory 9, and the calculation result is stored in the memory 9.

When the programmable controller configured as described above is used to control a conveyor using, for example, one programmable controller (parallel bus and serial bus), the result will be as shown in FIG. Figure 6
, 47 is a control wiring that connects the remote I/O and a controlled object 48 such as a relay or a limit switch; 52
49 is a communication cable connecting the programmable controller and remote I/O, and 49 is a conveyor.

Example 2. 7 and 8 show an embodiment of the second invention, 1 to 46
is the same as that shown in FIGS. 1 and 2, so the explanation will be omitted. 53 is the input unit 2 mounted on the input unit 2
54 is the unit information gate of the output unit 3 mounted in the output unit 3, 55 is the CP
A decoder mounted in the U unit 1A, which uses signals 56 and 57 to output the unit information gate 53 of the input unit 2 or the unit information gate 5 of the output unit 3.
4 can be selected. Then, consecutive input/output numbers are assigned by the unit information gates 53, 54 and decoder 55.

Then, as shown in FIG. 9, the bus I/O 5
0 has a unit 50 with a maximum number of input/output points of 16 points from the beginning.
Three units are connected: a, a unit 50b with 32 points, and a unit 50c with 16 points, and the units 50a, 50b, and 50c constitute a unit information storage means. Each of the units 50a, 50b, and 50c is provided with unit information including the number of units and input/output distinction. 51a and 51b are remote I/Os each having a maximum number of input/output points of 32 points.

The CPU unit 1A reads unit information from the first unit 50a of the bus I/O 50, and
As shown in 0, the number of CPU units 1A is equal to the number of units.
Allocate the X/Y numbers to be accessed, and then allocate the remote I/O. This remote I/O assignment is done according to the station number setting switches 30 and 31.
The allocation is made in the order of O51a and then remote I/O51b. Note that the assignment is to the unit 50a of the bus I/O 50.
, unit 50b, unit 50c, remote I/O5
1a and remote I/O 51b using consecutive input/output numbers.

In the embodiment of the first invention, the bus I/O 50,
The classification of remote I/O is 0 to 1FF is bus I/O50.
, 200 to 3FF are remote I/O. Normally, the maximum number of I/O points of a sequencer is fixed depending on the model, so in the above example, it is 1024 points for 0 to 3FF. With this, if it is desired to use 512 or more bus I/O points, a system cannot be created with one CPU unit 1A. Therefore, it is conceivable to use two programmable controllers or to use a higher-end model, but both would increase the cost. To avoid this, bus I/O50 and remote I/O
By freeing the boundaries of O, it becomes possible to construct it at a more optimal cost.

Next, the operation will be explained. Figure 11 is Figure 7
, a flowchart showing the main operation of the microprocessor 7 arranged in the block diagram of FIG. 8, and FIG. 12 a diagram showing the contents of unit information.

In FIG. 11, initial processing (S11
0) is the same as the conventional embodiment except for the settings for the DMA controller 41. This is a process that is executed only once when the microprocessor 7 is reset, such as when the power is turned on.

Next, unit information read processing (S111)
Then, the microprocessor 7 controls the decoder 55,
One signal 56 of the decoder outputs is enabled. The signal 57 is connected to the gate terminal of the unit information gate 53, and unit information is transferred from the unit information gate 53 onto the data bus 10 and read by the microprocessor 7. Similarly, unit information from the output unit 3 is placed on the data bus 10 and read by the microprocessor 7. As described above, the unit information is configured so that the presence or absence of a unit and the number of points of the unit can be determined as shown in FIG.

Next, in the input/output setting process (S112), the presence or absence of the input unit 2 and the output unit 3 is checked based on the unit information obtained in the unit information read process, and if there is no unit, the 16 shown in FIG. The number of input/output control points by the parallel bus can be calculated by summing up the points of each unit, with the other points being the points according to the unit information.

The value obtained by subtracting the number of input/output control points using the parallel bus from the maximum number of connectable points of the programmable controller is the number of control points using serial communication. This value tells the DMA controller 41 the number of bytes to be transferred, D
Set the transfer data storage address of the MA buffer memory 42.

Next, input/output refresh processing (S113)
This is the same process as in the first embodiment of the invention, and the XY ON/OFF information of the bus I/O 50 is transferred between the external devices 19, 20 and the memory.

Next, remote I/O input/output refresh (
S114) is the same as the process in the embodiment of the first invention, and transfers the XY ON/OFF information of the remote I/O between the external devices 19, 20 and the memory.

Next, sequence program calculation processing (S1
15) is the same as the process in the conventional embodiment, and the sequence program calculation process is a process of sequentially reading and executing the user's sequence program stored in the memory 8.

Next, the END process (S116) is the same as the process in the conventional embodiment, including the process of returning the sequence calculation to 0 steps and deciding whether to continue the sequence process.

Example 3. In the above embodiment, input/output control using a parallel bus and input/output control using serial communication are automatically performed using unit information, but a setting switch may also be provided and the same effects as in the above embodiment can be achieved.

[0051]

As described above, according to the first invention, in addition to the first input/output section using the parallel bus, the second input/output section using serial communication is controlled in parallel by a single control means. Since this has been made possible, even if the external devices to be controlled are dispersed far away, it is possible to economically connect the external devices with each other.

Further, according to the second invention, the unit information storage means provided in each of the plurality of input/output units constituting the first input/output section using the parallel bus stores information about the number of input/output points of each input/output unit. Based on the information regarding the number of input/output points, the control means in the program control section selects the input/output unit constituting the first input/output section and the remote input/output unit constituting the second input/output section. By assigning continuous input/output numbers to these input/output sections, the finite number of controllable input/output points of the program control section is divided into a first input/output section using a parallel bus and a second input/output section using serial communication. This has the advantage that it can be arbitrarily divided into two parts, and a program control system can be constructed at a relatively low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a programmable controller according to an embodiment of the first invention.

FIG. 2 is a block diagram of a programmable controller according to an embodiment of the first invention.

FIG. 3 is a flowchart showing the main operation of the microprocessor according to an embodiment of the first invention.

FIG. 4 is a flowchart showing a real-time interrupt operation of a microprocessor according to an embodiment of the first invention.

FIG. 5 is a diagram showing a format of transmission data according to an embodiment of the first invention.

FIG. 6 is a diagram for explaining a case where a conveyor is controlled by one programmable controller according to an embodiment of the first invention.

FIG. 7 is a block diagram of a programmable controller according to an embodiment of the second invention.

FIG. 8 is a block diagram of a programmable controller according to an embodiment of the second invention.

FIG. 9 is a diagram showing the states of bus I/O and remote I/O according to an embodiment of the second invention.

FIG. 10 is a diagram for explaining a unit state according to an embodiment of the second invention.

FIG. 11 is a flowchart showing the main operation of a microprocessor according to an embodiment of the second invention.

FIG. 12 is a diagram showing the contents of unit information according to an embodiment of the second invention.

FIG. 13 is a block diagram of a conventional programmable controller.

FIG. 14 is a flowchart showing the operation of a conventional microprocessor.

FIG. 15 is a diagram showing a conventional sequence program.

FIG. 16 is a diagram for explaining a case of outputting to a conventional remote I/O.

FIG. 17 is a diagram for explaining a case of reading input from a conventional remote I/O.

FIG. 18 is a diagram for explaining a conventional access state from a user.

FIG. 19 is a diagram for explaining a case where a conveyor is controlled by one conventional programmable controller.

[Explanation of symbols]

1A CPU unit 2 Input unit 3 Output unit 4 Base unit 7. Control means (microprocessor) 8. Memory 9. Memory 10 Data bus 17 Remote input unit 18 Remote output unit 19 External equipment 20 External equipment 50 Bus I/O 53 Unit information gate 54 Unit information gate 55 Decoder 58 Control means

Claims (2)

[Claims] Claim 1: First and second input/output units;
and program control for inputting control information from the control object or outputting it to the control object via the first and second input/output sections in order to programmatically control the control object connected to the second input/output section. The first input/output section is connected to the program control section via a parallel bus, and the second input/output section is connected to the program control section via a serial signal line.
A programmable controller characterized in that the program control section has control means for controlling the first input/output section using a parallel bus and the second input/output section using a serial signal in parallel. 2. In the programmable controller according to claim 1, the first input/output section is composed of a plurality of input/output units, and the second input/output section is composed of a plurality of remote input/output units. , each of the plurality of input/output units in the first input/output section includes unit information storage means for storing information regarding the number of input/output points, and the control means in the program control section includes unit information storage means for each input/output unit. Read the information regarding the number of input/output points of each input/output unit from , and based on this information, assign a continuous input/output number to the input/output point of each input/output unit, and assign the subsequent input/output number to this input/output number. A programmable device that is assigned to a plurality of remote input/output units constituting the second input/output unit and controls the first and second input/output units using the assigned input/output numbers. controller.