JPH04210798A - Brushless motor drive circuit - Google Patents

Abstract

PURPOSE:To protect an upstage FET from thermal breakdown by providing means for lagging the rising of power voltage for one component, i.e., a comparator, in a distribution circuit for a predetermined time and turning the upstage FETs, connected in H bridge, OFF for a predetermined time at the time of starting a motor. CONSTITUTION:Rising of power supply voltage for one components, i.e., comparators U1, U2, U3, in a distribution circuit 3 is lagged by means of a CR or the like thus turning upstage FETs Q1-Q3, connected in H bridge, OFF for a predetermined time at the time of starting a motor. Since the upstage FETs Q1-Q3 are turned ON only when an ON/OFF control power supply voltage for the upstage FETs Q1-Q3 reaches a level for turning the FETs Q1-Q3 perfectly ON, even if a control power supply voltage VC is fed under a state where a motor drive power supply voltage VM is being fed, the FETs Q1--Q3 can be protected against thermal breakdown thus obviating the necessity of determining the order of power supply input and realizing employment of so-called 2a contact type power supply input switch.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a brushless motor drive circuit for a DC motor that detects the position of a permanent magnet rotor using a Hall element or the like. [0002]

2. Description of the Related Art Conventionally, this type of brushless motor drive circuit has a backflow blocking diode D1 as shown in FIG.
~D3, resistors R1~Rs, and capacitors Cl-C5, an on/off control power supply (hereinafter referred to as (called floating power). [0003] The above conventional circuit has the advantage of a simple circuit configuration, but when the control power supply VC is input while the motor drive power supply VM is input, the position detection element such as the Hall element Since the floating power supply capacitors 01 to C3 are not fully charged, the gate voltage of the upper stage FET, which is turned on according to the output of There is. [0'004] Therefore, it was necessary to specify the order of power input so that the control power supply VC is input and then the motor drive power supply VM is input, or it was necessary to make the power input switch a two-stage switch. . [0005]

SUMMARY OF THE INVENTION The present invention has been provided in view of the above-mentioned points, and provides a brassless motor that can input power for control even when power for driving a motor is being input. The purpose is to provide a motor drive circuit. [0006]

[Means for Solving the Problems] The present invention provides an H-bridge connected FET, a position detection element for detecting the rotor position, and a signal from the position detection element is distributed to generate an on/off signal for the FET. A delay means is provided to delay the rise of the power supply voltage of the output distribution circuit and the comparator which is a component of the distribution circuit for a certain period of time, and turn off the upper stage FET connected to the H bridge for a certain period of time when the motor is started. It is something. [0007]

[Operation] Since the output voltage of the comparator rises gradually, the circuit elements that receive the output voltage of the comparator recognize it as an L level for a certain period of time, and turn off all the FETs in the upper stage. [0008]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. As shown in FIGS. 1 and 2, this embodiment is applied to a three-phase DC brushless motor drive circuit. , HW, and the stator windings LU, LV, LW are detected by the brassless motor drive circuit shown in FIG. 1 according to the outputs of the Hall elements HU, HV, HW.
The permanent magnet rotor 1 is rotated by passing a current through the magnet rotor 1.

0OO9] Here, the above Hall elements HU, HV, HW
As shown in FIG. 2, it is arranged at a mechanical angle of 60 degrees, faces each magnetic pole of the permanent magnet rotor 1 with an air gap in between, and outputs a signal according to the magnetic flux density. The above-mentioned brushless motor drive circuit is composed of an inverter 2 using power MO3FETQ+-Q6 as a switching element. This inverter 2 has two FETs (Ql and Q4
. ing. And Hall elements HU, HV, H
The FETs Ql to Q6 of the inverter 2 are controlled on/off according to the output of the distribution circuit 3 which creates a drive signal from the output of the inverter 2. [00101 Distribution circuit 3 includes Hall elements HU, HV, H
W output signal detection comparators Ul, U2. U3 and
Comparators Ul, U2. U3 output UOUTI, U○
UT2. With UOUT3 as input, ○UT from distribution circuit 3
It is composed of a logic circuit 31 expressed by the pool algebra of equations (1) to (6) assuming that outputs 1 to UT6 are output, and comparators Ul, U2 . The power supply voltage VU of U3 is
a resistor R+ -R3 connected in series to the control power supply VC;
The voltage across the capacitors C1 to C3 is taken as the voltage across the capacitors. [00111 Note that the above rNOT J means negation, that is, overline. [0012] FIGS. 3(a) to 3(c) show a Hall element HU. The output signals of HV and HW are shown, and FIGS. 3(d) to (i) show the output timing signals of the distribution circuit 3. FET Q, + ~ Q6 in the lower part of Fig. 1 is the distribution circuit 3
It is directly on/off controlled by the output of FETQ+ in the upper stage.
Q3 is a transistor Q13. Q231 Q33 (For example, in the case of FETQt, the drive circuit is controlled by the output of the distribution circuit 3 inverted by the transistor Q13 in the case of FETQl) (consisting of transistors Qll, Q12) 41 to 43 turn on and off.
Controlled off. [0013] That is, when the output of the distribution circuit 3 is at H level, the upper stage FETs Q+ to Q3 are turned off, and the lower stage FETs Q
, ~Q6 is turned on. In addition, the drive circuits 41 to 43 of the upper stage FETs Ql-Qs include capacitors C1 to C3 and resistors R1 to R3 connected in series between the control power supply VC and the ground via backflow element diodes D1 to D3.
Drive power supply V from floating power supplies 51 to 53 consisting of
5 l~V53 is to be supplied. [0014] This is because the upper stage FETs Q1 to Q3 are connected to the drains of the lower stage FETs Q4 to Q6, and the potential from the ground varies depending on the on/off state of the lower stage FETs Q4 to Q6. Further, the comparator power supply VU is supplied to the comparators Ul, U2, and 03 via delay means composed of a resistor R4 and a capacitor C4. [00151 Next, with the permanent magnet rotor 1 stopped at point A in FIG. 3, after inputting the motor drive power supply VM,
The operation at startup when the control power supply VC is input will be explained based on FIG. 4. As shown in FIG. 4(a), along with the input of the control power supply VC, the floating power supplies 51 to 53
and comparator 01. U2. The power supply VU for U3 is the fourth
As shown in Figures (b) and (c), capacitor C1-C
5. It increases exponentially as C4 charges. The period TU until the comparator power supply ■U exceeds the voltage VL that the logic circuit 31 determines as the L level, the logic circuit 31 is at the L level.
The results are (1), (3), (
As shown in 5), the output of distribution circuit 3 ○UTI, 0UT2
, 0UT3 is at H level throughout the TU period, and F E
TQr-Qs is turned off. [0016] Furthermore, the time T5 until the driving power supplies V5t to Vi3 of the floating power supplies 51 to 53 reach the voltage VON (approximately 6V) that can completely turn on the FETQt-Qs is the voltage VL at which the logic circuit 31 determines the L level.
Since the period until exceeding TU is set shorter than TU,
After the period TU, the permanent magnet rotor 1 as shown in FIG.
According to the position of FET Q1 in the upper stage as shown in FIGS. 4(d) and (e), it can be completely turned on even if it is turned on. [0017] Since the period TU is approximately several tens of milliseconds, the time delay from inputting the control power supply VC to starting the brushless motor has almost no effect. In this way, the comparator U1.02. which is one component of the distribution circuit 3. By delaying the rise of the power supply voltage of U3 using CR etc., and turning off the upper stage FETQ1-Qs connected to the H bridge for a certain period of time when the motor is started,
Even if the control power supply VC is input while the motor drive power supply VM is input, the upper stage FETs Qt-Qs will not turn on/off.
Off control power supply (floating power supply) is FETQt
-The upper stage FETs Q+ to Q3 are turned on after reaching the voltage value that can completely turn on Qs, so FETQt-Qs
As a result, there is no need to specify the order of power input, and a so-called 2A contact type power input switch can be used. [0018]

Effects of the Invention As described above, the present invention includes an H-bridge connected FET, a position detection element for detecting the rotor position,
The signal of the position detection element is distributed to turn on/off the FET.
A distribution circuit that outputs an off signal; and a delay means that delays the rise of the power supply voltage of a comparator, which is a component of the distribution circuit, for a certain period of time to turn off the upper stage FET connected to the H bridge for a certain period of time when the motor is started. Since the output voltage of the comparator rises slowly, the circuit elements that receive the output voltage of the comparator recognize it as an L level for a certain period of time and turn off all the upper stage FETs. Therefore, it is possible to prevent thermal damage to the upper stage FET, and as a result, there is no need to specify the order of power input, and a so-called 2a contact type power input switch can be used. ′

[Brief explanation of the drawing]

FIG. 1 is an overall circuit diagram of the present invention.

FIG. 2 is a cross-sectional view showing the arrangement of Hall elements.

FIG. 3 is an operational waveform diagram of the distribution circuit.

FIG. 4 is an operation waveform diagram at startup.

FIG. 5 is a circuit diagram of a conventional example.

[Explanation of symbols]

3 Distribution circuit Q+ -Qs FET U1~U3 Comparator

[Figure 1]

[Figure 2] L　　-：2T〕-2? ----J

[Figure 3]

[Figure 4] (a) HLi (b) H■1 (C)　HW\ヮ　　 d) OtJTl e) OUT2 f) αBa3: 9) OUT4: hm i) OUT6 Mu (0)VC m- is -1 (b) Vu “’v51””VB2 d +751+ One-to-one (d) OUTl m (e) VGSI

[Procedural amendment]

[Submission date] February 26, 1991

[Procedural amendment 1]

[Name of item to be amended] Specification

[Correction target item name] Full text

[Correction method] Change

[Correction details]

[Document name] Specification

[Name of the invention] Brushless motor drive circuit

[Claims]

[Claim 1] An H-bridge connected FET, a position detection element for rotor position detection, a distribution circuit that distributes the signal of the position detection element and outputs an on/off signal for the FET, and the distribution circuit. A brushless motor drive characterized in that a delay means is provided for delaying the rise of the power supply voltage of a comparator, which is a component of the circuit, for a certain period of time and turning off the above-mentioned H-bridge connected upper stage FET for a certain period of time when the motor is started. circuit. DETAILED DESCRIPTION OF THE INVENTION [00011

[Field of Industrial Application] The present invention relates to a brushless motor drive circuit for a DC motor that detects the position of a permanent magnet rotor using a Hall element or the like. [0002] Conventionally, this type of brushless motor drive circuit has a backflow blocking diode D+ as shown in FIG.
Using ~D3, resistor Rt-R3, and capacitors 01~C3, an on/off control power supply (hereinafter referred to as (called floating power). [0003] The above conventional circuit has the advantage of a simple circuit configuration, but when the control power supply VC is input while the motor drive power supply VM is input, the position detection element such as the Hall element The gate voltage of the upper stage FET, which is in the on state according to the output of , cannot completely turn on the upper stage FET Ql - Q3 because the floating power supply capacitors C1-C5 are not fully charged.
There is a problem that the FET is destroyed by heat. [0004] Therefore, it is necessary to specify the order of power input so that the control power supply VC is input and then the motor drive power supply VM is input, or it is necessary to make the power supply input switch a two-stage switch. [0005]

SUMMARY OF THE INVENTION The present invention has been provided in view of the above-mentioned points, and provides a brushless motor in which control power can be input even when the motor drive power is being input. The purpose is to provide a drive circuit. [0006]

[Means for Solving the Problems] The present invention provides an H-bridge connected FET, a position detection element for detecting the rotor position, and a signal from the position detection element is distributed to generate an on/off signal for the FET. A delay means is provided to delay the rise of the power supply voltage of the output distribution circuit and the comparator which is a component of the distribution circuit for a certain period of time, and turn off the upper stage FET connected to the H bridge for a certain period of time when the motor is started. It is something. [0007]

[Operation] Since the output voltage of the comparator rises slowly, the circuit elements that receive the output voltage of the cosciparator as input recognize it as an L level for a certain period of time, and turn off all the FETs in the upper stage. [0008]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. As shown in FIGS. 1 and 2, this embodiment is applied to a three-phase DC brushless motor drive circuit. , HW, and the stator windings LU, LV, LW are detected by the brushless motor drive circuit shown in FIG.
The permanent magnet rotor 1 is rotated by passing a current through the magnet rotor 1. [0009] Here, the Hall elements HU, HV, HW
As shown in FIG. 2, it is arranged at a mechanical angle of 60 degrees, faces each magnetic pole of the permanent magnet rotor 1 with an air gap in between, and outputs a signal according to the magnetic flux density. The above brushless mo*
*The power MO3FET Q+ ~Q6
It consists of an inverter 2 using as a switching element. This inverter 2 has two FETs (Q+ and Q4, Q2 and Q5, Q3 and Q, ) connected in series to a motor drive power supply VM, and a stator winding LU whose one end is commonly connected to each connection point. The other ends of LV and LW are connected. And Hall elements HU, HV, HW
The FETQ+-Q6 of the inverter 2 is controlled on/off according to the output of the distribution circuit 3 which creates a drive signal from the output of the inverter 2. [00101 Distribution circuit 3 includes Hall elements HU, HV, H
W output signal detection comparators IJI, U2. U3, comparator TJI, U2. U3 output UOUTI,
U○UT2. UOUT3 is input, distribution circuit 3 to 0
Equations (1) to (6) assume that UT1 to 0UT6 are output.
A logic circuit expressed by a pool algebra of 3. It is made up of.

Note that the above rNOT J means negation, that is, overline. [0012] FIGS. 3(a) to 3(c) show a Hall element HU. Figure 3(d) shows the output signals of 1-IV and I-IW.
~(i) shows the output timing signal of the distribution circuit 3. The lower stage FETs Q4 to Q6 in Fig. 1 are directly on/off controlled by the output of the distribution circuit 3, and the upper stage FETQ
+-Q3 is the transistor Q13. Q23. Q33
(For example, in the case of FETQ+, transistor Q1
3) A drive circuit whose drive is controlled by the output of the distribution circuit 3 inverted in step 3 (for example, in the case of FET Ql, it is composed of two totem-pole connected NPN type and PNP type transistors Qll and Q12). On/off control is performed by 41 to 43. [00131 In other words, when the output of the distribution circuit 3 is at H level, the upper stage FETQ1-Q3 is turned off, and the lower stage FETQ1-Q3 is turned off.
ETQl, to Q6 are turned on. Also, the upper FETQ+
- The control power supply VC is used for Q3 drive circuits 41 to 43.
Capacitors C4 to C3 and resistor R are connected in series between the
Driving power supplies V51 to V'53 are supplied from floating power supplies 51 to 53 consisting of I to R3. [0014] This is because the upper stage FETs Q1 to Q3 are connected to the drains of the lower stage FETs Q4 to Q6, and the potential from the ground varies depending on the on/off state of the lower stage FETs Q4 to Q6. Further, the comparator power supply VU is supplied to the comparator 01. U2. It is designed to be supplied to U3. [0015]Next, with the permanent magnet rotor 1 stopped at point A in FIG. 3, after inputting the motor drive power VM,
The operation at startup when the control power supply VC is input will be explained based on FIG. 4. As shown in FIG. 4(a), along with the input of the control power supply VC, the floating power supplies 51 to 53
and comparator Ul, 02. The power supply VU for U3 is the fourth
As shown in Figures (b) and (C), capacitors 01 to C
3. It increases exponentially as C4 charges. During the period TU until the comparator power supply VU exceeds the voltage VL at which the logic circuit 31 determines the L level, the logic circuit 31 determines the L level, and as a result (1), (3),
As shown in (5), the output of distribution circuit 3 is ○UTI, 0UT.
2. ○UT3 is at H level during all TU periods, and FE
TQ1 to Q3 are turned off. [0016] Also, the time T5 until the driving power supply V51-V53 of the floating power supplies 51 to 53 reaches the voltage VON (approximately 6V) that can completely turn on the FET Q+-Q3 is the voltage at which the logic circuit 31 determines the L level. VL
Since the period until exceeding TU is set shorter than TU,
After the period TU, the permanent magnet rotor 1 as shown in FIG.
According to the position of , even if the upper stage FET Q1 is turned on as shown in FIGS. 4(d) and (e), it can be completely turned on. [0017] Incidentally, since the period TU is about several tens of m5 ec, the time delay from the input of the control power supply VC to the activation of the brushless motor has almost no effect. In this way, the comparator U, which is one component of the distribution circuit 3,
1, U2. The rise of the power supply voltage of U3 is delayed by CR etc., and the upper stage F connected to the H bridge is used when starting the motor.
By turning off ETQ1 to Q3 for a certain period of time, the control power supply V can be turned off while the motor drive power supply VM is being input.
Even if C is input, the power supply (floating power supply) for on/off control of upper stage FETQ+-Q3 is not connected to FETQ+ ~Q.
3. After reaching the voltage value that allows turning on completely, turn on the upper F.
Since E T Ql~Q3 are turned on, FETQ+
-Q3 can be prevented from being thermally damaged, and as a result, there is no need to specify the order of power input, and a so-called 2a contact type power input switch can be used. [0018]

Effects of the Invention As described above, the present invention includes an H-bridge connected FET, a position detection element for detecting the rotor position,
The signal of the position detection element is distributed to turn on/off the FET.
A distribution circuit that outputs an off signal; and a delay means that delays the rise of the power supply voltage of a comparator, which is a component of the distribution circuit, for a certain period of time to turn off the upper stage FET connected to the H bridge for a certain period of time when the motor is started. Since the output voltage of the comparator rises slowly, the circuit elements that receive the output voltage of the comparator recognize it as an L level for a certain period of time and turn off all the upper stage FETs. Therefore, it is possible to prevent thermal damage to the upper stage FET, and as a result, there is no need to specify the order of power input, and a so-called 2a contact type power input switch can be used.

[Brief explanation of the drawing]

FIG. 1 is an overall circuit diagram of the present invention.

FIG. 2 is a cross-sectional view showing the arrangement of Hall elements.

FIG. 3 is an operational waveform diagram of the distribution circuit.

FIG. 4 is an operation waveform diagram at startup.

FIG. 5 is a circuit diagram of a conventional example.

[Explanation of symbols]

3 Distribution circuit Q, ~Qa FET U1~U3 Comparator

Claims (1)

[Claims] 1. A FET connected in an H-bridge, a position detection element for rotor position detection, a distribution circuit that distributes the signal of the position detection element and outputs an on/off signal for the FET, and the distribution circuit. A brassless motor characterized by being provided with a delay means that delays the rise of the power supply voltage of a comparator, which is a component of the circuit, for a certain period of time and turns off the upper stage FET connected to the H bridge for a certain period of time when the motor is started. drive circuit.