JPH04208569A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To increase the workability of gate electrodes by inserting high melting point metal between layers of polysilicon and silicide which constitute gate electrodes, and by facilitating the detection of etching end points of the layers of the silicide and high melting point metal. CONSTITUTION:After the formation of field oxide films 2 on a semiconductor substrate 1, polysilicon 5 is deposited, and high melting point metal 4 and silicide 3 are deposited. After this, etching is performed using photoresist 6 as a mask. When the high melting point metal 4 becomes in a state of being etched after the etching completion of the silicide 3, luminous intensity decreases as the SiF density in plasma decreases. On this occasion, the end point of the etching of the silicide 3 can be easily detected as the end point detection of the etching of the silicide 3 and high melting point metal 4 is done by setting and measuring the luminous intensity of a specific wavelength by SiF which increases by the etching of the polysilicon 5. Accordingly, the workability of the gate electrodes increases.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a semiconductor device, and particularly to a technique for processing a polycide structure film as a gate electrode.

[Conventional technology]

In general, to address the problem of increased gate electrode wiring resistance that occurs with the increase in capacity of semiconductor integrated circuits, gate electrodes with a polycide structure consisting of a two-layer structure of silicide and polysilicon made by reacting a high-melting point metal and a silicon are used. are using.

For example, as shown in FIG. 4, polysilicon 25, MoSi2°WSi, TiS
A gate electrode was formed with a two-layer structure of i□ and nolicide and 3.

[Problems to be Solved by the Present Invention] The conventional semiconductor device described above has a stacked structure of gate electrodes, polysilicon, and resin, so the processing of the gate electrodes is complicated.

Generally, when processing a gate electrode, a method is used to detect the end point of etching by monitoring the intensity of light emitted from plasma at a specific wavelength emitted from SiF. In addition, for etching, CCρ3 and CF
, CF4 scum is used for polysilicon.

As shown in the conceptual diagram of FIG. 5, the etching end point of the noride is detected by the increase in the intensity of light emitted by SiF or the like at a specific wavelength when the noride is etched and the polysilicon is exposed.

The threshold of the emission intensity for detecting the end point of silicide etching is set to a high value because the emission intensity of silicide is used as the back crown level, and it becomes a composite waveform with the emission intensity after the start of polysilicide etching. There is a need to.

As a result, by the time the silicide etching end point is reached, the polysilicon has already been etched by the mixed scum of CCf4 and CF, resulting in overetching of the polysilicon and the problem that the edge of the polysilicon recedes from the edge of the silicide. was there.

[Means to solve the problem]

The semiconductor device of the present invention includes a layer made of a high melting point metal between the polynolycone and silicide layers of the gate electrode.

〔Example〕 Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG.
Figures a to 2d are process sectional views of an embodiment of the present invention, and Figure 3
The figure is a conceptual diagram for explaining etching end point detection according to the present invention.

As shown in FIG. 2a, after a field oxide film 2 is formed on the semiconductor substrate 2, about 2000 polysilicon layers 25 are deposited. Continuously, as shown in Figure 2b, high melting point metal 4 was subjected to ε7 recidivism by about 1000 people, and 3 was subjected to 2000
Deposit about the same amount as people.

Thereafter, as shown in FIG. 2C, a photoresist 26 is patterned by photolinkage technique, and using this photoresist 6 as a mask, etching is performed as shown in FIG. 2d. At this time, the silicide 3 and the high melting point metal 4 are etched using a mixture of CCf4 and CF, and the polysilicon 5 is etched using CF and scum.

Section 3 shows a conceptual diagram of changes in the emission intensity of SiF at a specific wavelength (for example, 777 nm) with etching time.

In FIG. 3, T1 is a period in which silicide 3, T2 is a high melting point metal 4, and T3 is a period in which polysilicon 5 is processed.

When the etching of the norisite 3 is completed and the high melting point metal 4 is etched, the SiF concentration in the plasma decreases and the emission intensity decreases.

At this time, the end point of etching silicide 3 and high melting point metal 4 can be easily detected by setting the end point of etching of silicide 3 and high melting point metal 4 to the emission intensity of a specific wavelength by SiF, which increases due to etching of polynolylphin 5. It can detect and process gate electrodes with high precision.

[Effects of the Invention: As explained above, in the present invention, since the gate electrode has a laminated structure consisting of silicide, high melting point metal, and polysilicon, it is possible to easily detect the end point of etching of the layer consisting of silicide and high melting point metal. This has the effect of improving the workability of the gate electrode.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG.
Figures a to 2d are cross-sectional views of the process of the present invention. Figures 3 and 5 are conceptual diagrams for explaining 2. Chink end point detection according to the present invention and the conventional method, respectively. FIG. 4 is a cross-sectional view of a conventional method. 1 - single conductor substrate, 2. field oxide film, 3. norisite, 4.. high melting point metal, 5. polynolycon, 6.. photoresist, 7.. gate oxide film. Agent Patent Attorney Susumu Uchihara 7 Figure 20-Figure 2b / Figure 2D Figure 3

Claims (1)

[Claims] In a MOS semiconductor device using a polycide gate electrode, a high melting point metal is inserted between the polysilicon and silicide layers constituting the gate electrode to facilitate the detection of the etching end point of the silicide and high melting point metal layers. A method for manufacturing a featured semiconductor device.