JPH0416836B2 - - Google Patents
Info
- Publication number
- JPH0416836B2 JPH0416836B2 JP59066352A JP6635284A JPH0416836B2 JP H0416836 B2 JPH0416836 B2 JP H0416836B2 JP 59066352 A JP59066352 A JP 59066352A JP 6635284 A JP6635284 A JP 6635284A JP H0416836 B2 JPH0416836 B2 JP H0416836B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- card
- insulating substrate
- insulating
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
- Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
Description
【発明の詳細な説明】
[発明の技術分野]
本発明は、絶縁基板にICチツプを実装したチ
ツプ実装基板と、これを保護するカバーシートと
を一体に融着させてなるICカードに関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an IC card in which a chip mounting board in which an IC chip is mounted on an insulating board and a cover sheet for protecting the chip mounting board are fused together.
[発明の技術的背景とその問題点]
従来から、例えば金融機関における金銭出入れ
時の証明用のデータカード等として、塩化ビニル
樹脂等の合成樹脂製のカード基材の表面にストラ
イプ状に磁気コートを施し、この磁気ストライプ
に口座番号や暗唱番号等の各種データを磁気記録
した、いわゆる磁気カードが広く用いられてい
る。[Technical background of the invention and its problems] Conventionally, magnetic stripes have been applied to the surface of a card base material made of synthetic resin such as vinyl chloride resin as data cards for proof of money withdrawals and withdrawals at financial institutions. So-called magnetic cards, which are coated with magnetic stripes and have various data such as account numbers and password numbers magnetically recorded, are widely used.
この磁気カードは構造が単純で耐久性が高く、
しかも大量生産に向いていることからサービス産
業分野等において広く用いられている。 This magnetic card has a simple structure and high durability.
Moreover, since it is suitable for mass production, it is widely used in the service industry.
しかしながらこのような磁気カードは、情報の
記憶容量が小さいために、口座番号、暗唱番号
等、ごく少数の情報しか記録することができず、
したがつて例えば預金の預け入れ、引出しの記録
等の多種類の情報の記録は金融機関における預金
通帳の如く別に記録台帳を設ける必要があり、情
報処理の高能率化に対する障害となつていた。 However, such magnetic cards have a small information storage capacity, so they can only record a small amount of information such as account numbers and PIN numbers.
Therefore, to record various types of information such as records of deposits and withdrawals, it is necessary to set up a separate ledger like a bankbook in a financial institution, which has been an obstacle to increasing the efficiency of information processing.
さらに、この磁気カードは、外部から情報を比
較的簡単に読取れるため、気密保持や盗用防止等
の点で問題があつた。 Furthermore, since information on this magnetic card can be read relatively easily from the outside, there have been problems in maintaining airtightness and preventing theft.
このような事情から、近年カード内部に記憶素
子およびその制御素子を内蔵させて情報の記憶容
量を飛躍的に向上させた、ICカードと呼ばれる
データカードが開発されつつある。 Under these circumstances, data cards called IC cards are being developed in recent years, which have a storage element and its control element built into the card to dramatically improve its information storage capacity.
このICカードは、電気絶縁性の合成樹脂製の
カード基板の内部に情報の記憶および処理を行な
うICチツプを実装し、入出力端子をカード表面
から露出させたもので、金融機関等に設置された
カードリーダー/ライターのカード処理部にセツ
トすることにより、カード処理部内の入出力端子
とICカードの入出力端子とを電気的に接続して、
内蔵するICチツプへの情報の書込みまたは読出
しを可能としたものである。 This IC card has an IC chip that stores and processes information mounted inside a card board made of electrically insulating synthetic resin, and has input/output terminals exposed from the surface of the card.It is installed in financial institutions, etc. By setting it in the card processing section of a card reader/writer, the input/output terminals in the card processing section and the input/output terminals of the IC card are electrically connected.
This allows information to be written to or read from the built-in IC chip.
上述したようなICカードは、例えば第1図に
示したように、合成樹脂製の絶縁基板1の表面
に、周知の印刷法、写真法等により導体パターン
1aおよび入出力端子1bを形成するとともに
ICチツプ2,3を搭載し、さらにこれらを電気
的に接続してなるIC回路基板Aの表裏両面に、
塩化ビニル樹脂製の表側カバーシート4および裏
側カバーシート5を配し、第2図に示したよう
に、これらをプレス成形して一体化することによ
り製造される。 The above-mentioned IC card is manufactured by forming a conductor pattern 1a and an input/output terminal 1b on the surface of an insulating substrate 1 made of synthetic resin by a well-known printing method, a photographic method, etc., as shown in FIG. 1, for example.
On both the front and back sides of an IC circuit board A, which is equipped with IC chips 2 and 3 and electrically connected to them,
It is manufactured by arranging a front cover sheet 4 and a back cover sheet 5 made of vinyl chloride resin, and press-molding them to integrate them as shown in FIG.
なお、表側カバーシート4には貫通孔4a穿設
されており、プレス成形の際、この貫通孔4aに
入出力端子1bが嵌合し、その頂部が外部接続用
の電極とされる。 Note that a through hole 4a is bored in the front cover sheet 4, and during press molding, an input/output terminal 1b is fitted into the through hole 4a, and the top thereof is used as an electrode for external connection.
ところで、このように構成されるICカードに
おいては、絶縁板の表面からICチツプが突出し
ているので、プレス加工の際にICチツプに不均
等な圧力が加つて導体パターンが断線したり、
ICチツプが破損したりする恐れがある。 By the way, in an IC card constructed in this way, the IC chip protrudes from the surface of the insulating plate, so uneven pressure is applied to the IC chip during press processing, causing the conductor pattern to break or break.
The IC chip may be damaged.
そこで、この問題を解決するためにはICチツ
プを絶縁基板内に埋設させ、その露出面を絶縁板
の板面と同一レベルにした後にプレス成形を行な
う方法が考えられる。 Therefore, in order to solve this problem, a method can be considered in which the IC chip is embedded in an insulating substrate, and the exposed surface is made to be on the same level as the surface of the insulating plate, and then press molding is performed.
このためには、絶縁基板にあらかじめICチツ
プが嵌合する形状およびサイズの凹陥部を形成し
ておき、この凹陥部にICチツプを嵌合させて所
定の電気的接続を施した後、絶縁基板の両面側か
らカバーシートを融着させる方法が考えられる。 To do this, a recess with a shape and size that allows the IC chip to fit is formed in advance on the insulating substrate, and after the IC chip is fitted into the recess and a predetermined electrical connection is made, the insulating substrate is A possible method is to fuse the cover sheet from both sides.
この方法においては、凹陥部の開口部の形状、
サイズおよび深さを、ICチツプの断面形状およ
び厚みと全く同じにすると、該部へのICチツプ
の嵌合が困難となるため、凹陥部とICチツプと
の間には若干の空隙が設けられる。 In this method, the shape of the opening of the recess,
If the size and depth are exactly the same as the cross-sectional shape and thickness of the IC chip, it will be difficult to fit the IC chip into the area, so a slight gap will be provided between the recess and the IC chip. .
しかしながら、このように凹陥部とICチツプ
との間に空隙を設けると、導体パターン1aと
ICチツプ2,3との接続部がこの空隙上に浮い
た状態になるので、カバーシート4,5を融着さ
せる際のプレス成形の圧力により接続部が損われ
てしまう恐れがある。 However, if a gap is provided between the recess and the IC chip in this way, the conductor pattern 1a
Since the connecting portions with the IC chips 2 and 3 will be floating above this gap, there is a risk that the connecting portions will be damaged by the pressure of press molding when the cover sheets 4 and 5 are fused together.
[発明の目的]
本発明はこのような事情に対処して成されたも
ので、絶縁基板に凹陥部を設け、この凹陥部内に
ICチツプを固着して所定の電気的接続を施した
チツプ実装基板にカバーシートを融着させてなる
ICカードにおいて、プレス加工の際にICチツプ
と導体パターンとの電気的接続が損われることの
ないICカードを提供することを目的としている。[Object of the Invention] The present invention has been made in response to the above-mentioned circumstances.
A cover sheet is fused to a chip mounting board on which an IC chip is fixed and the specified electrical connections are made.
The purpose of the present invention is to provide an IC card in which the electrical connection between an IC chip and a conductor pattern is not damaged during press processing.
[発明の概要]
すなわち本発明のICカードは、表面に導体パ
ターンが形成され、搭載すべきICチツプの厚さ
とほぼ同じ深さの凹陥部が形成され、前記ICチ
ツプの露出面と前記導体パターンとが同一平面に
なるように前記凹陥部内に前記ICチツプが搭載
される絶縁基板と、前記凹陥部に実装された前記
ICチツプと前記凹陥部との間〓部に充填され、
プレス成形の際における前記導体パターンと前記
ICチツプの接続部の損傷を防ぐ絶縁性充填材と、
前記絶縁基板上に積層されるカバーシートと、を
具備するものである。[Summary of the Invention] That is, the IC card of the present invention has a conductive pattern formed on its surface, a recessed portion having a depth approximately the same as the thickness of the IC chip to be mounted, and a concave portion formed between the exposed surface of the IC chip and the conductive pattern. an insulating substrate on which the IC chip is mounted in the recess so that the IC chips are on the same plane;
The bottom part between the IC chip and the recessed part is filled,
The conductor pattern and the
Insulating filling material that prevents damage to the IC chip connections,
and a cover sheet laminated on the insulating substrate.
[発明の実施例]
第3図は、本発明のICカードの一実施例の要
部の構成を示す横断面図である。[Embodiment of the Invention] FIG. 3 is a cross-sectional view showing the configuration of essential parts of an embodiment of the IC card of the present invention.
なお、以下の図において第1図および第2図と
共通する部分には同一の符号を付してある。 In the following figures, parts common to those in FIGS. 1 and 2 are designated by the same reference numerals.
この実施例におけるICカードは、中央部のチ
ツプ実装基板Aを挟んでその両面に、表側カバー
シート4、裏側カバーシート5を配置し、これら
をプレス加工により一体に融着させて構成されて
いる。 The IC card in this embodiment is constructed by placing a front cover sheet 4 and a back cover sheet 5 on both sides of a central chip mounting board A, which are fused together by press processing. .
中央部のチツプ実装基板Aのベースとなる絶縁
基板1には、ICチツプ2をその露出面が板面と
同一レベルになるように遊嵌可能な凹陥部1cが
形成され、ICチツプ2はこの凹陥部1cの底部
に固着されている。なお、この凹陥部1cは、例
えば絶縁基板1上に感光性樹脂を塗布し、フオト
レジスト法を用いて形成したり、加熱した金型を
押圧して形成したり、あるいは凹陥部の形状に打
抜き加工を施したシートを他のシート上に接着さ
せて形成させることができる。 The insulating substrate 1, which is the base of the chip mounting board A in the center, is formed with a recess 1c into which the IC chip 2 can be loosely fitted so that its exposed surface is on the same level as the board surface. It is fixed to the bottom of the concave portion 1c. The concave portion 1c may be formed, for example, by applying a photosensitive resin onto the insulating substrate 1 and using a photoresist method, by pressing a heated mold, or by punching into the shape of the concave portion. A processed sheet can be bonded onto another sheet.
そしてICチツプ2と凹陥部1cとの間隙には
例えばエポキシ樹脂、シリコーンゴム、あるいは
発泡性組成物等の絶縁性充填材6が充填され、硬
化されている。 The gap between the IC chip 2 and the recessed portion 1c is filled with an insulating filler 6 such as epoxy resin, silicone rubber, or a foaming composition, and is cured.
さらに絶縁基板1上には導体パターン1aが形
成され、この導体パターン1aとICチツプ2の
インナーリードとは所定の対応で電気的に接続さ
れている。 Furthermore, a conductor pattern 1a is formed on the insulating substrate 1, and the conductor pattern 1a and the inner leads of the IC chip 2 are electrically connected in a predetermined manner.
導体パターン1aとICチツプ2との電気的接
続は、ICチツプ2を絶縁基板1の凹陥部1cに
固着した後にICチツプ2のインナーパツドから
絶縁基板1上にかけて導体パターン1aを形成す
るか、あるいは予め絶縁基板1a上に導体パター
ン1aを形成しておき、凹陥部1cにICチツプ
2を固着した後に導電ペーストを塗布して、この
導体パターンとICチツプ2のインナーパツトと
を接続させる等の方法により行なわれる。 The electrical connection between the conductive pattern 1a and the IC chip 2 can be made by forming the conductive pattern 1a from the inner pad of the IC chip 2 onto the insulating substrate 1 after the IC chip 2 is fixed to the recess 1c of the insulating substrate 1, or by forming the conductive pattern 1a in advance. A conductive pattern 1a is formed on an insulating substrate 1a, and after the IC chip 2 is fixed in the recessed part 1c, a conductive paste is applied to connect the conductive pattern and the inner pad of the IC chip 2. It is done.
導体パターン1a上には、絶縁基板1の板面に
直角な方向に入出力端子1bが突設されている。。
この入出力端子1bの厚さは、表側カバーシート
2の厚さとほぼ同一の厚さとされている。 Input/output terminals 1b are provided on the conductor pattern 1a to protrude in a direction perpendicular to the plate surface of the insulating substrate 1. .
The thickness of the input/output terminal 1b is approximately the same as the thickness of the front cover sheet 2.
このように構成されたICカードでは、ICチツ
プ2が絶縁基板1中に、その露出面が板面と同一
レベルとなるように埋設された状態でプレス加工
が行なわれるので、プレス時の圧力は板面に均等
に加えられ、しかもICチツプ2と絶縁基板1の
凹陥部1cの側壁との間には絶縁性充填材6が充
填されているので、ICチツプ2およびICチツプ
2と導体パターン1a間の電気的接続部は、この
絶縁性充填材6で保護されることになり、プレス
加工によつて損われることはない。 In an IC card configured in this way, pressing is performed with the IC chip 2 buried in the insulating substrate 1 so that its exposed surface is at the same level as the board surface, so the pressure during pressing is Since the insulating filler 6 is applied evenly to the board surface and is filled between the IC chip 2 and the side wall of the concave portion 1c of the insulating substrate 1, the IC chip 2 and the conductor pattern 1a are filled with the insulating filler 6. The electrical connection between them will be protected by this insulating filler 6 and will not be damaged by press working.
第4図は本発明の他の実施例を示す横断面図で
ある。 FIG. 4 is a cross-sectional view showing another embodiment of the present invention.
この実施例においては、ICチツプ2,3と凹
陥部1cとの空〓に硬化性の絶縁充填材6を充填
する代わりに、絶縁基板1上に導体パターンを形
成してICチツプのインナーパツドと電気的に接
続した後、この空〓を覆つてICチツプ2,3と
絶縁基板1間に跨つて絶縁性シート7を貼着させ
てプレス時の圧力から導体部分を保護している。 In this embodiment, instead of filling the spaces between the IC chips 2 and 3 and the recessed portion 1c with a hardening insulating filler 6, a conductive pattern is formed on the insulating substrate 1 to connect the inner pads of the IC chips and the electrical connection. After the electrical connection is made, an insulating sheet 7 is pasted to cover this gap and span between the IC chips 2, 3 and the insulating substrate 1 to protect the conductor portion from the pressure during pressing.
なお、本発明においては絶縁基板1を厚くする
ことにより裏側カバーシート5を省略することも
可能である。。 In addition, in the present invention, it is also possible to omit the back cover sheet 5 by making the insulating substrate 1 thicker. .
[発明の効果]
以上説明したように本発明のICカードは、絶
縁基板のICチツプ実装部分に凹陥部を形成し、
この凹陥部にICチツプを固着してなるチツプ実
装基板を用いたICカードにおいて、前記凹陥部
とICチツプとの空隙を絶縁性封止部材により充
填あるいは被覆したので、カバーシートを融着さ
せる際にICチツプと導体パターンとの電気的接
続部が損われることがない。[Effects of the Invention] As explained above, the IC card of the present invention has a concave portion formed in the IC chip mounting portion of the insulating substrate,
In an IC card using a chip mounting board with an IC chip fixed to the recess, the gap between the recess and the IC chip is filled or covered with an insulating sealing member, so that when the cover sheet is fused, the gap between the recess and the IC chip is filled or covered. Therefore, the electrical connection between the IC chip and the conductor pattern is not damaged.
第1図は一般的と思われるICカードの構造を
示す分解斜視図、第2図はその横断面図、第3図
は本発明の一実施例を示す部分的な横断面図、第
4図は本発明の他の実施例を示す部分的な横断面
図である。
A……チツプ実装基板、1……絶縁基板、1a
……導体パターン、1b……入出力端子、1c…
…凹陥部、2,3……ICチツプ、4……表側カ
バーシート、5……裏側カバーシート、6……絶
縁性充填材、7……絶縁性シート。
Fig. 1 is an exploded perspective view showing the structure of a commonly used IC card, Fig. 2 is a cross-sectional view thereof, Fig. 3 is a partial cross-sectional view showing an embodiment of the present invention, and Fig. 4 FIG. 3 is a partial cross-sectional view showing another embodiment of the present invention. A...Chip mounting board, 1...Insulating board, 1a
...Conductor pattern, 1b...Input/output terminal, 1c...
... Concave portion, 2, 3... IC chip, 4... Front cover sheet, 5... Back cover sheet, 6... Insulating filler, 7... Insulating sheet.
Claims (1)
ICチツプの厚さとほぼ同じ深さの凹陥部が形成
され、前記ICチツプの露出面と前記導体パター
ンとが同一平面になるように前記凹陥部内に前記
ICチツプが搭載される絶縁基板と、 前記凹陥部に実装された前記ICチツプと前記
凹陥部との間〓部に充填され、プレス成形の際に
おける前記導体パターンと前記ICチツプの接続
部の損傷を防ぐ絶縁性充填材と、 前記絶縁基板上に積層されるカバーシートと、 を具備するICカード。[Claims] 1. A conductor pattern is formed on the surface and should be mounted.
A recessed portion having a depth approximately equal to the thickness of the IC chip is formed in the recessed portion so that the exposed surface of the IC chip and the conductive pattern are on the same plane.
Damage to the insulating substrate on which the IC chip is mounted, and the connecting portion between the conductive pattern and the IC chip during press molding due to filling in the space between the IC chip mounted in the recess and the recess. An IC card comprising: an insulating filler that prevents damage; and a cover sheet laminated on the insulating substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59066352A JPS60209885A (en) | 1984-04-02 | 1984-04-02 | Ic card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59066352A JPS60209885A (en) | 1984-04-02 | 1984-04-02 | Ic card |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60209885A JPS60209885A (en) | 1985-10-22 |
JPH0416836B2 true JPH0416836B2 (en) | 1992-03-25 |
Family
ID=13313375
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59066352A Granted JPS60209885A (en) | 1984-04-02 | 1984-04-02 | Ic card |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60209885A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH082703B2 (en) * | 1986-03-14 | 1996-01-17 | カシオ計算機株式会社 | IC card |
JP2609863B2 (en) * | 1987-05-22 | 1997-05-14 | 大日本印刷株式会社 | Lead frame for IC card |
FR2732796B1 (en) * | 1995-04-07 | 1997-05-09 | Solaic Sa | METHOD FOR FIXING A FUNCTIONAL ELEMENT IN AN ELECTRONIC CARD BODY USING EXPANDABLE MATERIAL |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2486685B1 (en) * | 1980-07-09 | 1985-10-31 | Labo Electronique Physique | ELECTRONIC PAYMENT CARD AND REALIZATION METHOD |
-
1984
- 1984-04-02 JP JP59066352A patent/JPS60209885A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60209885A (en) | 1985-10-22 |
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