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JPH04167433A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH04167433A
JPH04167433A JP29186390A JP29186390A JPH04167433A JP H04167433 A JPH04167433 A JP H04167433A JP 29186390 A JP29186390 A JP 29186390A JP 29186390 A JP29186390 A JP 29186390A JP H04167433 A JPH04167433 A JP H04167433A
Authority
JP
Japan
Prior art keywords
heat treatment
oxygen
wafer
hydrogen gas
atmosphere
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP29186390A
Other languages
Japanese (ja)
Other versions
JP3032565B2 (en
Inventor
Yoshio Ozawa
良夫 小澤
Kikuo Yamabe
紀久夫 山部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2291863A priority Critical patent/JP3032565B2/en
Publication of JPH04167433A publication Critical patent/JPH04167433A/en
Application granted granted Critical
Publication of JP3032565B2 publication Critical patent/JP3032565B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To sharply reduce the danger of a high-temperature heat treatment in a hydrogen atmosphere and to completely remove an oxygen precipitate by a method wherein, after a first high-temperature heat treatment has been executed in an inert gas atmosphere, a second high-temperature heat treatment is executed in an atmosphere which contains hydrogen gas. CONSTITUTION:By a first heat treatment process executed in an argon gas atmosphere, an interlattice oxygen concentration in a silicon wafer is reduced to 1/5 or lower at a depth of 5mum from the surface of the wafer as compared with that before the heat treatment. In succession, a second process is executed. First, a valve 3 at a hydrogen gas pipe is opened; high-purity hydrogen gas whose impurity content of moisture or the like has been reduced to 0.1ppm or lower is made to flow into at 1l/min. At this time, since residual oxygen inside a heat treatment furnace has already been replaced sufficiently with argon gas, a danger such as an explosion or the like which is caused when the hydrogen gas is introduced hardly exists. A residual oxygen precipitate, at about 0.1/cm<2>, which exists near the surface of the wafer by a reduction effect of oxygen disappears completely.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、半導体装置の製造方法に係り、とくに、優れ
た長期信頼性を有する半導体装置を形成するための基板
に使用される半導体ウェハの熱処理方法に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device having excellent long-term reliability. The present invention relates to a heat treatment method for semiconductor wafers.

(従来の技術) C2(チョクラルスキー)法により結晶成長したシリコ
ン半導体単結晶には、1018/an3程度の酸素が含
まれていて、その挙動が、LSI特性などの半導体特性
に大きな影響を及ぼしている。
(Prior art) A silicon semiconductor single crystal grown by the C2 (Czochralski) method contains about 1018/an3 of oxygen, and its behavior has a large effect on semiconductor characteristics such as LSI characteristics. ing.

シリコンなどの半導体基板上に形成された熱酸化膜に数
M V / anの高電界を印加すると、一定の確率で
、偶発的にこの熱酸化膜に絶縁破壊が起きる。その原因
は、半導体基板中の表面付近に存在する酸素析出物であ
ることが知られている。従来は、この酸素析出物を取り
除く方法として、高温水素アニール法を用いていた。す
なわち、処理すべき半導体基板を1000℃〜1200
℃程度の水素雰囲気中でアニールする方法である。この
処理によって、基板中の格子間酸素は、外方拡散して、
基板表面から外部へ離脱したり、析出酸素を還元して、
基板表面付近より酸素析出物を除去することができる。
When a high electric field of several M V/an is applied to a thermal oxide film formed on a semiconductor substrate such as silicon, dielectric breakdown occurs accidentally in the thermal oxide film with a certain probability. It is known that the cause is oxygen precipitates present near the surface of the semiconductor substrate. Conventionally, a high temperature hydrogen annealing method has been used as a method for removing this oxygen precipitate. That is, the semiconductor substrate to be processed is heated to 1000°C to 1200°C.
This is a method of annealing in a hydrogen atmosphere at a temperature of about °C. Through this treatment, interstitial oxygen in the substrate is diffused outward,
It detaches from the substrate surface to the outside, reduces precipitated oxygen,
Oxygen precipitates can be removed from near the substrate surface.

しかし、水素ガスを、このような高温状態で数時間に渡
って、扱うことは、非常に危険であり、防爆対策など安
全上の問題を解決しなければ、実用化することができな
かった。安全性の問題を回避した方法として、水素ガス
の代りにアルゴンや窒素などの不活性ガスを利用する技
術も知られている。この方法では、基板中の格子間酸素
を外方拡散することはできても、析出酸素を還元する効
果はないので、基板表面付近には、少量の酸素析出物が
残存してしまい、偶発的に起こる絶縁破壊を完全に除去
することはできない。
However, handling hydrogen gas at such high temperatures for several hours is extremely dangerous, and practical use was not possible unless safety issues such as explosion-proof measures were resolved. As a method to avoid safety issues, there is also known a technique of using an inert gas such as argon or nitrogen instead of hydrogen gas. Although this method can diffuse interstitial oxygen in the substrate outward, it is not effective in reducing precipitated oxygen, so a small amount of oxygen precipitates remain near the substrate surface, resulting in accidental The dielectric breakdown that occurs cannot be completely eliminated.

第4図は、前述した2つの方法による効果を示したもの
である。基板を、それぞれ水素およびアルゴン雰囲気中
で、1200℃、1時間アニールを施した場合の酸素析
出物密度(/an3)の半導体基板内の深さ方向分布を
示す。縦軸は、酸素析出物密度、横軸は、半導体基板表
面(ウニノー)からの深さ(μm)を表している。この
図をみると、第1の方法である水素雰囲気中でのアニー
ル処理を行なえば、ウェハ表面から40μmまでの領域
には酸素析出物は、殆ど存在していないことが分かる。
FIG. 4 shows the effects of the two methods described above. The depth distribution of the oxygen precipitate density (/an3) in the semiconductor substrate is shown when the substrate is annealed at 1200° C. for 1 hour in hydrogen and argon atmospheres, respectively. The vertical axis represents the oxygen precipitate density, and the horizontal axis represents the depth (μm) from the semiconductor substrate surface (union). Looking at this figure, it can be seen that if the first method, which is annealing treatment in a hydrogen atmosphere, is performed, there are almost no oxygen precipitates in the region up to 40 μm from the wafer surface.

一方、第2の方法である、例えば、アルゴンのような、
不活性ガス雰囲気中でのアニール処理によれば、上記の
領域には、1個/al]3程度の酸素析出物が残存して
いる。したがって、第2の方法では、酸素析出物を十分
にとり除き、ウニノ\表面付近に素子特性の優れた活性
領域を形成することは、不可能であった。
On the other hand, the second method, such as argon,
According to the annealing treatment in an inert gas atmosphere, approximately 1/al]3 oxygen precipitates remain in the above region. Therefore, in the second method, it was impossible to sufficiently remove oxygen precipitates and form an active region with excellent device characteristics near the surface of the unino.

(発明が解決しようとする課題) このように、従来技術においては、水素ガスを利用した
方法では、安全上に問題が有り、不活性ガスを利用した
方法では、酸素析出物を十分に除去することができない
という問題かあった。本発明は、上記事情により成され
たものであり、水素雰囲気中での高温熱処理の危険性を
大幅に低減し、かつ、酸素析出物を完全に除去すること
が可能な半導体装置の製造方法を提供することを目的と
している。
(Problems to be Solved by the Invention) As described above, in the conventional technology, methods using hydrogen gas have safety problems, and methods using inert gas do not sufficiently remove oxygen precipitates. The problem was that I couldn't do it. The present invention was made in view of the above circumstances, and provides a method for manufacturing a semiconductor device that can significantly reduce the risk of high-temperature heat treatment in a hydrogen atmosphere and completely remove oxygen precipitates. is intended to provide.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明は、半導体装置の製造方法に関するものであり、
不活性ガス雰囲気中で半導体ウニノ\を熱処理する工程
と、この工程の後前記半導体つニノ1を水素ガスを含ん
だ雰囲気中で熱処理する工程とを備えたことを特徴とし
ている。
(Means for Solving the Problems) The present invention relates to a method for manufacturing a semiconductor device,
The method is characterized by comprising a step of heat treating the semiconductor chip \ in an inert gas atmosphere, and a step of heat treating the semiconductor chip 1 in an atmosphere containing hydrogen gas after this step.

(作 用) 第1の不活性ガス雰囲気中における高温熱処理により、
半導体ウェハ中の格子間酸素が外方拡散し、それに伴っ
て酸素析出物の大きさは減少し、大部分の酸素析出物は
消滅する。次に、第2の高温熱処理工程は、水素ガスを
含んだ雰囲気で行なうために、水素の還元効果によって
、第1の処理では除去されなかった残留酸素析出物を完
全に消滅させることができるので、偶発的に起きる熱酸
化膜の絶縁破壊を防ぐことができる。
(Function) By the high temperature heat treatment in the first inert gas atmosphere,
The interstitial oxygen in the semiconductor wafer diffuses out, the size of the oxygen precipitates decreases, and most of the oxygen precipitates disappear. Next, the second high-temperature heat treatment step is performed in an atmosphere containing hydrogen gas, so the residual oxygen precipitates that were not removed in the first treatment can be completely eliminated by the reducing effect of hydrogen. This can prevent accidental dielectric breakdown of the thermal oxide film.

第2の高温熱処理工程は、第1の高温熱処理後に熱処理
炉内に水素ガスを導入して連続的に行なうことができる
。その際、第1の熱処理工程で使用した不活性ガスは、
連続して用いられ、水素ガスは、それに添加される事に
なる。添加量が、数%〜10数%でその効果は現れる。
The second high-temperature heat treatment step can be performed continuously by introducing hydrogen gas into the heat treatment furnace after the first high-temperature heat treatment. At that time, the inert gas used in the first heat treatment step was
It will be used continuously and hydrogen gas will be added to it. The effect appears when the amount added is from several percent to several ten percent.

第1の高温熱処理中に炉内の残留酸素は、不活性ガスで
十分に置換されているので、水素ガスを導入するときの
危険性は、はとんど無く、また、特別に炉内の雰囲気置
換のための時間を設ける必要はないので、処理時間の短
縮を計ることができる。勿論、不活性ガスを、第1と第
2で同じにする必要はないが、別にすると処理操作が複
雑になる。不活性ガスは、特に限定は無く、アルゴンで
も窒素でも良いが、熱処理温度を1100℃以上に設定
すると半導体ウェハと窒素ガスとの反応が始まるので、
窒素を用いる場合は、この温度はさける必要がある。熱
処理温度は、どの工程も1000°C〜1200℃程度
は必要である。温度が低いと処理時間は長くなり、温度
が高いと処理時間は、短くなる。大体10分から24時
間程度がその処理時間として適当である。
During the first high-temperature heat treatment, residual oxygen in the furnace is sufficiently replaced with inert gas, so there is almost no danger when introducing hydrogen gas, and special Since there is no need to provide time for atmosphere replacement, processing time can be shortened. Of course, it is not necessary to use the same inert gas for the first and second gases, but doing so would complicate the processing operation. The inert gas is not particularly limited and may be argon or nitrogen, but if the heat treatment temperature is set to 1100°C or higher, a reaction between the semiconductor wafer and the nitrogen gas will start.
If nitrogen is used, this temperature must be avoided. The heat treatment temperature is required to be about 1000°C to 1200°C in all steps. When the temperature is low, the processing time becomes long, and when the temperature is high, the processing time becomes short. Appropriate processing time is approximately 10 minutes to 24 hours.

また、格子間酸素の半導体ウェハ中における第1の高温
熱処理での拡散長は、そのウェハの活性領域中に酸素の
存在が無ければよいので、トレンチ構造を利用すること
を考慮しても10μm程度以上在れば、本発明の目的を
達成することができる。前記拡散長が10μmとなる熱
処理条件は、1200℃で40分、1100℃で3時間
、1000℃で16時間である。この拡散長を10倍に
すると熱処理時間は、100倍になり、1/10にする
と、1’/100になる。第1の処理で、ウェハ中の格
子間酸素濃度が減少して本発明の効果が現れるのには、
拡散長の175程度が必要である(第5図参照)。した
がって、本発明を実施するための前記拡散長は、通常の
構造の半導体装置では、5μm、)レンチ構造を有する
ものでは、50μm程度である。
Furthermore, the diffusion length of interstitial oxygen in the semiconductor wafer during the first high-temperature heat treatment is approximately 10 μm even if a trench structure is taken into consideration, as long as there is no oxygen in the active region of the wafer. If the above exists, the object of the present invention can be achieved. The heat treatment conditions for the diffusion length to be 10 μm are 1200° C. for 40 minutes, 1100° C. for 3 hours, and 1000° C. for 16 hours. When this diffusion length is increased by 10 times, the heat treatment time becomes 100 times, and when this diffusion length is reduced to 1/10, it becomes 1'/100. In the first treatment, the interstitial oxygen concentration in the wafer is reduced and the effect of the present invention appears due to the following reasons:
A diffusion length of about 175 is required (see Figure 5). Therefore, the diffusion length for carrying out the present invention is approximately 5 μm in a semiconductor device having a normal structure, and approximately 50 μm in a semiconductor device having a wrench structure.

(実施例) 以下、図面を参照して本発明の一実施例を説明する。(Example) Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図は、本発明の高温熱処理を行うための熱処理装置
の断面図、第3図は、本発明の熱処理に用いられる不活
性ガスおよび水素ガスの供給量の説明図を示したもので
ある。まず、水分等の不純物含有量を0.]ppm以下
に抑えた高純度アルゴンガスをパイプを通して吸気口4
からこの装置の熱処理炉1内へ191/分の割合で送り
込む。炉内を通ったガスは、排気口5を通して外に排出
される。熱処理炉は、800℃に保温されており、その
中心部に、シリコンウェハ10を搭載した支持台2を配
置する。次に、ウェハ挿入に伴って炉内に混入された酸
素ガス、水分等がアルゴンガスで十分に置換されるよう
に10分間程度放置した後、炉内の温度を1200℃ま
で昇温し、それを60分間程保持した。このときのシリ
コンウェハ10中の深さ方向の格子間酸素濃度分布を、
第2図に示す。縦軸が格子間酸素濃度(/a[13)、
横軸がウェハ表面からの深さ(μm)を現している。こ
の図にも示されているように、アルゴンガス雰囲気中で
行う第1の熱処理工程によって、シリコンウェハ中の格
子間酸素濃度は、ウェハ表面から5μmの深さで熱処理
前の115以下に減少している。
FIG. 1 is a cross-sectional view of a heat treatment apparatus for performing high-temperature heat treatment of the present invention, and FIG. 3 is an explanatory diagram of the supply amounts of inert gas and hydrogen gas used in the heat treatment of the present invention. . First, the content of impurities such as moisture is reduced to 0. ] High purity argon gas kept below ppm is passed through the pipe to the intake port 4.
from there into the heat treatment furnace 1 of this apparatus at a rate of 191/min. The gas that has passed through the furnace is exhausted to the outside through the exhaust port 5. The heat treatment furnace is kept at a temperature of 800° C., and a support base 2 on which a silicon wafer 10 is mounted is arranged in the center thereof. Next, after leaving the furnace for about 10 minutes so that the oxygen gas, moisture, etc. that were mixed into the furnace when inserting the wafer were sufficiently replaced with argon gas, the temperature inside the furnace was raised to 1200°C. was held for about 60 minutes. The interstitial oxygen concentration distribution in the depth direction in the silicon wafer 10 at this time is
Shown in Figure 2. The vertical axis is the interstitial oxygen concentration (/a[13),
The horizontal axis represents the depth (μm) from the wafer surface. As shown in this figure, by the first heat treatment step carried out in an argon gas atmosphere, the interstitial oxygen concentration in the silicon wafer was reduced to 115 or less at a depth of 5 μm from the wafer surface to the level before heat treatment. ing.

また、この格子間酸素の外方拡散に伴って、ウェハ表面
付近の酸素析出物密度も、0.1個/a[13程度まで
に減少している。これは、先の第4図に示す通りである
Further, with this outward diffusion of interstitial oxygen, the density of oxygen precipitates near the wafer surface is also reduced to about 0.1 particles/a [13]. This is as shown in FIG. 4 above.

以上が第1工程であり、引き続いて第2の工程に入る。The above is the first step, and the second step follows.

まず、水素ガスパイプのバルブ3を開けて、水分等の不
純物含有量を0.]ppm以下に抑えた高純度水素ガス
を毎分11流し込む。このとき、熱処理炉1内の残留酸
素は、すでにアルゴンガスによって十分置換されている
ので、水素ガスを導入したことによる爆発などの危険性
はほとんどない。この状態を10分間維持した。その時
の炉内の雰囲気は、体積比でアルゴン95%、水素5%
の混合状態である。熱処理温度は、1200℃を保持し
た。この水素による還元効果によってウェハ表面付近に
存在した0、1個/a[13程度の残留酸素析出物は、
完全に消滅した。第2の工程が完了したあとは、水素ガ
スのバルブ3を閉じてから炉内の温度を800℃まで降
温し、さらに、シリコンウェハ10およびその支持台2
を熱処理炉1から取り出す。
First, open the valve 3 of the hydrogen gas pipe and reduce the content of impurities such as moisture to 0. ] High-purity hydrogen gas kept at ppm or less flows in at a rate of 11 per minute. At this time, the residual oxygen in the heat treatment furnace 1 has already been sufficiently replaced by argon gas, so there is almost no risk of explosion due to the introduction of hydrogen gas. This state was maintained for 10 minutes. The atmosphere inside the furnace at that time was 95% argon and 5% hydrogen by volume.
It is a mixed state. The heat treatment temperature was maintained at 1200°C. Due to the reduction effect of hydrogen, residual oxygen precipitates of about 0.1/a [13] existed near the wafer surface.
completely disappeared. After the second step is completed, the hydrogen gas valve 3 is closed, the temperature inside the furnace is lowered to 800°C, and the silicon wafer 10 and its support 2 are
is taken out from the heat treatment furnace 1.

以上の処理を施したシリコンウェハに熱酸化処理を行っ
てシリコン酸化膜を形成する。このウェハ上の酸化膜を
ゲート絶縁膜に利用してシリコンウェハ上にゲート面積
が10画2のキャパシタを形成する。次に、このゲート
絶縁膜について、その耐圧を調べたところ、数M V 
/ anの電界を印加しても偶発的に起きる絶縁破壊は
、まったく観測されなかった。
The silicon wafer subjected to the above treatment is subjected to thermal oxidation treatment to form a silicon oxide film. A capacitor having a gate area of 10×2 is formed on the silicon wafer by using the oxide film on the wafer as a gate insulating film. Next, we investigated the breakdown voltage of this gate insulating film and found that it was several M V
Even when an electric field of /an was applied, no accidental dielectric breakdown was observed.

実施例では、シリコンウェハついてのみ説明したが、他
の半導体ウェハについても本発明が適用できる事は勿論
である。
In the embodiments, only silicon wafers have been described, but it goes without saying that the present invention can be applied to other semiconductor wafers.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の方法によって半導体ウェ
ハを熱処理すれば、何の危険も伴わずにウェハ表面付近
の酸素析出物を完全に取り除くことができ、高い長期信
頼性を有する半導体装置を形成するための半導体ウェハ
を提供することが可能に成る。
As explained above, by heat-treating a semiconductor wafer using the method of the present invention, oxygen precipitates near the wafer surface can be completely removed without any danger, and semiconductor devices with high long-term reliability can be formed. It becomes possible to provide semiconductor wafers for

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の熱処理を実行するための熱処理装置
の断面図、第2図は、本発明の第1の熱処理工程によっ
て得られるウェハ中の格子間酸素濃度分布図、第3図は
、本発明の熱処理に用いられる不活性ガスおよび水素ガ
スの供給量の説明図、第4図は、従来のウェハ中の酸素
析出物密度分布図、第5図は、ウェハ内の酸素濃度と酸
素の拡散長との関係を示す特性図である。 1・・・熱処理炉、 2・・・支持台、 3・・・水素ガスのパイプのノくルブ、4・・・吸気口
、 5・・・排気口、 10・・・ウェハ。 (8733)  代理人 弁理士 猪 股 祥 晃(ほ
か1名) (肥〕]■)牌囚澹 罎 gtk本1と功職度(crri’l 第5図
FIG. 1 is a sectional view of a heat treatment apparatus for carrying out the heat treatment of the present invention, FIG. 2 is a diagram of the interstitial oxygen concentration distribution in the wafer obtained by the first heat treatment step of the present invention, and FIG. , an explanatory diagram of the supply amount of inert gas and hydrogen gas used in the heat treatment of the present invention, FIG. 4 is a diagram of the density distribution of oxygen precipitates in a conventional wafer, and FIG. 5 is a diagram of the oxygen concentration and oxygen in the wafer. FIG. 2 is a characteristic diagram showing the relationship between . DESCRIPTION OF SYMBOLS 1...Heat treatment furnace, 2...Support stand, 3...Hydrogen gas pipe knob, 4...Intake port, 5...Exhaust port, 10...Wafer. (8733) Agent Patent attorney Yoshiaki Inomata (and 1 other person) (Fat)] ■) Passenger 澹罎GTK Book 1 and meritorious service (cri'l) Figure 5

Claims (1)

【特許請求の範囲】[Claims] 不活性ガス雰囲気中で半導体ウェハを熱処理する工程と
、この工程の後前記半導体ウェハを水素ガスを含んだ雰
囲気中で熱処理する工程とを備えたことを特徴とする半
導体装置の製造方法。
1. A method for manufacturing a semiconductor device, comprising the steps of: heat treating a semiconductor wafer in an inert gas atmosphere; and, after this step, heat treating the semiconductor wafer in an atmosphere containing hydrogen gas.
JP2291863A 1990-10-31 1990-10-31 Method for manufacturing semiconductor device Expired - Fee Related JP3032565B2 (en)

Priority Applications (1)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0620896A (en) * 1992-06-29 1994-01-28 Kyushu Electron Metal Co Ltd Manufacture of semiconductor wafer
WO2000041227A1 (en) * 1998-12-28 2000-07-13 Shin-Etsu Handotai Co.,Ltd. Method for thermally annealing silicon wafer and silicon wafer
WO2002052632A1 (en) * 2000-12-22 2002-07-04 Komatsu Denshi Kinzoku Kabushiki Kaisha Method of heat treatment of silicon wafer doped with boron
JP2005322875A (en) * 2004-05-10 2005-11-17 Siltron Inc Silicon wafer and method for manufacturing same

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0620896A (en) * 1992-06-29 1994-01-28 Kyushu Electron Metal Co Ltd Manufacture of semiconductor wafer
US5508207A (en) * 1992-06-29 1996-04-16 Sumitomo Sitix Corporation Method of annealing a semiconductor wafer in a hydrogen atmosphere to desorb surface contaminants
JP2560178B2 (en) * 1992-06-29 1996-12-04 九州電子金属株式会社 Method for manufacturing semiconductor wafer
WO2000041227A1 (en) * 1998-12-28 2000-07-13 Shin-Etsu Handotai Co.,Ltd. Method for thermally annealing silicon wafer and silicon wafer
US6573159B1 (en) 1998-12-28 2003-06-03 Shin-Etsu Handotai Co., Ltd. Method for thermally annealing silicon wafer and silicon wafer
US6809015B2 (en) 1998-12-28 2004-10-26 Shin-Etsu Handotai Co., Ltd. Method for heat treatment of silicon wafers and silicon wafer
US7011717B2 (en) 1998-12-28 2006-03-14 Shin-Etsu Handotai Co., Ltd. Method for heat treatment of silicon wafers and silicon wafer
WO2002052632A1 (en) * 2000-12-22 2002-07-04 Komatsu Denshi Kinzoku Kabushiki Kaisha Method of heat treatment of silicon wafer doped with boron
JP2002190478A (en) * 2000-12-22 2002-07-05 Komatsu Electronic Metals Co Ltd Heat treatment method for boron-doped silicon wafer
US7754585B2 (en) 2000-12-22 2010-07-13 Sumco Techxiv Corporation Method of heat treatment of silicon wafer doped with boron
JP2005322875A (en) * 2004-05-10 2005-11-17 Siltron Inc Silicon wafer and method for manufacturing same

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