JPH0416003A - Voltage controlled oscillator - Google Patents

Abstract

PURPOSE:To set the sensitivity of an oscillating frequency optionally with respect to a control voltage by applying feedback control to the voltage controlled oscillator so that an amplification factor of one amplification factor variable amplifier changes in proportion to the control voltage and an amplification factor of other amplification factor variable amplifier changes in inverse proportion to the control voltage. CONSTITUTION:Since a collector current of a transistor (TR) 3 is a current resulting from the subtraction of a current flowing to a TR 4 from a collector current of a TR 1, the collector current is inversely proportional to the amplification factor of a lst amplification factor variable amplifier. Moreover, since a resistor 5 is connected between the collector of the TR 3 and a power terminal 6, the collector level of the TR 3 is inversely proportional to the collector current. When a control voltage fed to a control terminal 21 rises, the base level of the TR 3 is dropped and the base level of the TR 4 is increased. When the base level of the TR 3 is decreased, the collector current is decreased and the collector level is increased. Then the level is fed back negatively to an inverting input of a differential amplifier 20 via a low pass filter 22.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a voltage-controlled oscillator that uses a surface acoustic wave delay line and whose oscillation frequency can be varied by a control voltage.

(Prior Art) In recent years, the demand for wireless devices such as cordless phones and car phones has increased rapidly. These devices use a multi-channel access method to communicate by selecting an available frequency channel within the frequency band allocated to IFJ under the Radio Law. Therefore, a reference signal oscillator, a so-called local oscillator, used in transmitting circuits and receiving circuits requires a voltage-controlled oscillator whose oscillation frequency can be varied.

In addition, from the perspective of effective use of frequencies, the frequencies between the channels of the devices mentioned above are set to be extremely narrow (for example, 25 KHz). Therefore, in order to prevent interference from adjacent channels, local oscillators are used to The reference signal generated must be extremely stable and have low phase noise.

Oscillators using piezoelectric elements such as crystal resonators and surface acoustic wave elements are well known as oscillators with stable oscillation frequencies and low phase noise. In an oscillator, stabilizing the oscillation frequency and varying the frequency mean:
Although this is a contradictory issue, several oscillators that use the above-mentioned piezoelectric element and can vary the frequency have been devised. The most common method is to connect a variable capacitance element such as a variable capacitance diode in series or parallel to the piezoelectric element, and change the capacitance by controlling the bias voltage applied to the element, thereby reducing the load capacitance to the piezoelectric element. In addition to this, a voltage controlled oscillator using a surface acoustic wave delay line as shown in FIG. 5 has been devised.

This voltage controlled oscillator will be explained below with reference to the drawings. In FIG. 5, the emitter of transistor 101 is connected to ground terminal 102, and the collector is connected to each emitter of transistors 103 and 104. The collector of transistor 103 is connected directly to transistor 10.
The collectors of No. 4 are connected to power supply terminals 106 via resistors 105, respectively. Further, the base of the transistor 103 and the base of the transistor 104 are connected to a control terminal 107 and a control terminal 108, respectively. The above circuit constitutes a first variable amplification amplifier.

That is, the input current input to the base of the transistor 101 is amplified and becomes the collector current of the transistor 101. When the potential of the control terminal 107 is the same as the potential of the control terminal 108, the base potentials of the transistor 103 and the transistor 104 are the same, so that the transistor 1
1/2 of the collector current of transistor 01 flows between the collector and emitter of transistors 03 and 104, respectively. Therefore, 1/2 of the current amplified by the transistor 101 is
The current flows between the resistor 105 and the collector-emitter of the transistor 104. However, if the potential of the control terminal 107 is higher than the potential of the control terminal 108, the transistor 10
3 becomes higher than the base potential of transistor 104, the proportion of the collector current of transistor 10 flowing through transistor 103 increases, and the proportion flowing through transistor 104 decreases. Therefore, the proportion of the current amplified by transistor 101 flowing through resistor 105 also decreases. Considering the resistor 105 as a load, the amplification degree, that is, the ratio of the load current to the input current is reduced. Conversely, control terminal]08
When the potential of the control terminal 107 is higher than the potential of the control terminal 107, the proportion of the current amplified by the transistor 101 flowing through the resistor 105 increases, and the degree of amplification increases. In this way, an amplifier is constructed in which the degree of amplification can be varied depending on the potentials of the control terminals 107 and 108.

Next, in FIG. 5, the emitter of the transistor 109 is connected to the ground terminal 102, and the collector is connected to the emitters of the transistors ], ], and 0.111. The collector of transistor 110 is connected directly to transistor 11.
1 collectors are connected to power supply terminals 106 via resistors 105, respectively. Further, the base of the transistor 110 and the base of the transistor 111 are connected to the control terminal 108 and the control terminal 107, respectively. The above circuit constitutes a second variable amplification amplifier.

Note that the resistor 105 is shared with the first variable amplification amplifier, but the base of the transistor 111 whose collector is connected to the resistor 105 is connected to the control terminal 107, contrary to the first variable amplification amplifier. Therefore, the control terminal 107
The change in amplification of the second variable amplification amplifier with respect to the potentials of and 108 is opposite to the change in the amplification of the first variable amplification amplifier.

Since the resistor 105 is shared, the currents of the first and second variable amplification amplifiers are added by the resistor ]05.

Since the amplification changes with respect to the potentials of the control terminals 107 and 108 are opposite between the first and second variable amplification amplifiers, when the potential of the control terminal 107 is higher than the potential of the control terminal 108, Of the current flowing through the resistor 105, the proportion of the current amplified by the first variable amplification amplifier becomes larger than the proportion of the current amplified by the second variable amplification amplifier. Conversely, when the potential of the control terminal 108 is higher than the potential of the control terminal 107, the proportion of the current flowing through the resistor 05 that is amplified by the second variable amplifier is equal to the first amplification. The proportion of current amplified by the variable amplifier will be greater.

Here, assuming that signals with the same frequency and a 90 degree phase difference are input to the bases of transistors 101 and 109, the phase of the current flowing through resistor 105 is
It can be changed by 90 degrees depending on the potential difference between control terminals 107 and 108. This is because the current amplified by the first variable amplification amplifier and flowing through the resistor 105, and the current amplified by the second variable amplification amplifier and flowing through the resistor 105.
If we consider the currents flowing through each as a vector, these two vectors have a phase difference of 90 degrees, but are combined by the resistor 105 to form one composite vector. Since the magnitudes of the two vectors change oppositely depending on the potential difference between the control terminals 107 and 108, the composite vector moves between these two vectors. Therefore, the phase of the combined vector, that is, the current flowing through the resistor 105 can be changed by 90 degrees by the potential difference. Since the phase of the current in the resistor 105 changes by 90 degrees,
The phase of the voltage at the connection point between the resistor 105 and the collectors of the transistors 104 and 111 also changes by 90 degrees.

Next, in FIG. 5, the resistor 105 and the transistor 10
The voltage at the connection point of each collector of 4 and 111 is the voltage of the amplifier 11.
2 and output to the output terminal 114,
It is input to the input interdigital electrode 116 of the surface acoustic wave delay line 115. One end of the first Hatakeka interdigital electrode of the surface acoustic wave delay line 115 is connected to the transistor 1.
01 base, and the other end is grounded.

Further, one end of the second interdigital electrode fence of the surface acoustic wave delay line 115 is connected to the base of the transistor 109, and the other end is grounded. The acoustic distance between the input interdigital electrode 16 and the first output interdigital electrode of the surface acoustic wave delay line 115, and the acoustic distance between the input interdigital electrode 116 and the second output interdigital electrode 16 The distance is 1/4
Designed for different wavelengths. As a result, signals having a phase difference of 90 degrees are input to the bases of the transistors 101 and 109, respectively. Furthermore, transistor 1
A bias voltage is applied to each base of 01 and 109 from a bias circuit connected to a power supply terminal 106 and a ground terminal 102 via resistors 119 and 118, respectively.

The above configuration constitutes a voltage controlled oscillation circuit. The operation will be explained below. Signals having a phase difference of 90 degrees are input by the surface acoustic wave delay line 115 to the inputs of the circuit other than the surface acoustic wave delay line 115, that is, to the bases of the transistors 101 and 109.

This signal is amplified and fed back to the surface acoustic wave delay line 115. Therefore, the absolute value of the amplification degree of the circuit excluding the surface acoustic wave delay line 115 is larger than the absolute value of the loss of the surface acoustic wave delay line 115, and the feedback is transmitted through the surface acoustic wave delay line 115 and other circuits. If the phase of the incoming signal is 0 degrees or 360
It oscillates at a frequency that is an integer multiple of degrees. Since the phase between the input and output of the surface acoustic wave delay line 115 changes depending on the frequency within its pass frequency band, the phase of the feedback signal can be changed by the potential difference between the control terminals 107 and 108. , the oscillation frequency can be varied.

The voltage controlled oscillator circuit shown in Fig. 5 described above has a wider frequency change range than voltage controlled oscillator circuits using crystal oscillators or surface acoustic wave resonators, and has a certain degree of variation due to the design of the surface acoustic wave delay line. It has the following characteristics: it can obtain an arbitrary frequency variable width, and it is extremely suitable for integrated circuits because it does not require a variable capacitance element, inductance, or large capacitance.

However, in the conventional voltage controlled oscillator shown in FIG. 5, the sensitivity of frequency changes to the control voltage is too high. Or there was a problem that it could not be set arbitrarily. In FIG. 5, the pair of transistors 103 and ]04 and the pair of transistors 110 and ]1 are the control terminals 107 and 2, respectively.
It operates as a differential amplifier for the control voltages applied from and 108. Therefore, the sensitivity of frequency changes to the control voltage becomes extremely high. Also, this sensitivity is
It is determined by the ratio of the collector current to the base voltage of the transistors 103, 104, 110, and 111, that is, the mutual conductance, and cannot be set arbitrarily.

It is generally said that the higher the sensitivity of the frequency change to the control voltage, the better, but if it is too high, it will cause phase noise. This is because, in the case of a voltage controlled oscillator, a change in control voltage directly results in a change in frequency, so if sensitivity is increased, noise is amplified along with the control voltage, resulting in an increase in frequency change, that is, phase noise. For this reason, it is desirable that the sensitivity of frequency changes to the control voltage can be set arbitrarily.

(Problems to be Solved by the Invention) The present invention attempts to solve the problem that the sensitivity of oscillation frequency change to the control voltage cannot be arbitrarily set in a voltage controlled oscillator using a surface acoustic wave delay line.

[Structure of the invention]

(Means for Solving the Problems) The present invention changes the phase of the signals by amplifying two signals with different phases obtained by a surface acoustic wave delay line using variable amplification amplifiers, and then adding them together. In the voltage controlled oscillator configured to feed back to the surface acoustic wave delay line, the amplification of the one variable amplification amplifier is proportional to the control voltage, and the amplification of the other variable amplification amplifier is inversely proportional to the control voltage. This is the result of feedback control.

(Function) By adopting the above configuration, the amplification degree of the variable amplification amplifier can be changed in proportion or inverse proportion to the control voltage. When the amplification degree or the attenuation degree of the circuit that feeds back the current or voltage of the variable amplification degree amplifier is changed, the proportionality coefficient of the amplification degree of the variable amplification degree amplifier to the control voltage changes. As a result, the amount of change in the phase of the signal fed back to the surface acoustic wave delay line with respect to the control voltage also changes, and the sensitivity of the oscillation frequency with respect to the control voltage also changes. Therefore, by setting the amplification degree or attenuation degree of the feedback circuit to a predetermined value, the sensitivity of the oscillation frequency to the control voltage can be set arbitrarily.

(Embodiment) An embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention. In FIG. 1, the emitter of transistor 1 is connected to ground terminal 2, and the collector is connected to transistor 3.
, 4 are connected to each emitter. The collector of the transistor 3 and the collector of the transistor 4 are connected to a power supply terminal 7 through a resistor 5 and a resistor 6, respectively. The above circuit constitutes a first variable amplification amplifier. The emitter of transistor 8 is connected to ground terminal 2, and the collector is connected to each emitter of transistors 9 and 10. The collector of transistor 9 is connected directly, the collector of transistor 10 is connected through resistor 6,
Each is connected to a power supply terminal 7. The above circuit constitutes a second variable amplification amplifier. Furthermore, the voltage at the connection point between the resistor 6 and the collectors of the transistors 4 and 10 is amplified by the amplifier 1] and output to the output terminal 12, and is also input to the input interdigital electrode 4 of the surface acoustic wave delay @13. Ru. One end of the first interdigital electrode 15 of the surface acoustic wave delay line 13 is connected to the base of the transistor 1, and the other end is grounded. Further, one end of the second 8-interdigital electrode 16 of the surface acoustic wave delay line 3 is connected to the base of the transistor 8, and the other end is grounded. The acoustic distance between the input interdigital electrode 14 and the first output interdigital electrode 15 of the surface acoustic wave delay line 13, and the acoustic distance between the input interdigital electrode 14 and the second output interdigital electrode 16. are designed to differ by 1/4 wavelength. This results in transistors 1 and 8
A signal having a phase difference of 90 degrees is input to each base. Furthermore, a bias voltage is applied to the bases of transistors 1 and 8 from a bias circuit 17 connected to power supply terminal 6 and ground terminal 2 via resistors 18 and 19, respectively.

The above circuit except for the resistor 5 is similar to the conventional voltage controlled oscillation circuit, but in this embodiment, a differential amplifier 20 is further added. The positive input of the differential amplifier 20 is the control terminal 2.
1, the negative inputs are connected to the collectors of transistors 3 through low-pass filters 22, the positive outputs are connected to the bases of transistors 4 and 9, and the negative outputs are connected to the bases of transistors 3 and 10. ing.

The above is the circuit configuration of this embodiment. Next, the operation of this embodiment will be explained.

First, a surface acoustic wave delay I
! 13, signals having a phase difference of 90 degrees are applied.

After each of these signals is amplified and summed by resistor 6,
The signal is further amplified by an amplifier 11 and fed back to a surface acoustic wave delay line 13. At this time, the absolute value of the amplification degree of the other circuits other than the surface acoustic wave delay line 13 is larger than the loss of the surface acoustic wave delay line 13, and the feedback is returned through the surface acoustic wave delay line ] 3 and the other circuits. It oscillates at a frequency where the phase of the incoming signal is an integer multiple of 0 degrees or 360 degrees. The above operation is the fifth
This is similar to the conventional voltage controlled oscillation circuit shown in the figure. In addition, the amplification degrees of the first and second variable amplification amplifiers change in the opposite manner according to the base potential differences between the transistors 3 and 4 and between 9 and 10, and the phase of the feedback signal changes, thereby changing the oscillation frequency. The operation of changing is also similar to that of the conventional voltage controlled oscillation circuit shown in FIG.

Next, in the circuit of FIG. 1, the collector current of transistor 3 is the remaining current after subtracting the current flowing to transistor 4 from the collector current of transistor 1, so it is inversely proportional to the amplification degree of the first variable amplification amplifier. What do you do? Also, I
- Since the resistor 5 is connected between the collector of the transistor 3 and the power supply terminal 6, the collector potential of the transistor 3 is inversely proportional to the collector current. As a result, the collector potential of transistor 3 is proportional to the amplification of the first variable amplification amplifier. By the way, since the negative and positive output voltages of the differential amplifier 20 are applied to the bases of the transistors 3 and 4, when the control voltage applied to the control terminal 21 increases, the base potential of the transistor 3 increases. The base potential of transistor 4 rises. transistor 3
When the base potential of , the collector current decreases and the collector potential increases. This potential is low-pass
Since this is negatively fed back to the negative input of the differential amplifier 20 via the filter 22, the base potential of the transistor 3 increases and the base potential of the transistor 4 decreases. This series of operations eventually stabilizes as the collector potential of the transistor 3 becomes the same as the control voltage applied to the control terminal. That is, feedback control is performed so that the collector potential of transistor 3 changes in proportion to the control voltage. Note that the low-pass filter 22 is connected to the transistor 3.
This is to prevent the AC voltage at the oscillation frequency generated at the collector from being input to the differential amplifier 20.
The feedback control described above is performed using only DC voltage. The fact that the collector potential of the transistor 3 is proportional to the control voltage means that the amplification degree of the first variable amplification amplifier changes in proportion to the control voltage. Furthermore, since the bases of transistors 9 and 10 are connected to the bases of transistors 4 and 3, the amplification of the second variable amplification amplifier is opposite to that of the first variable amplification amplifier. To.

In other words, it changes in inverse proportion to the control voltage.

When feedback control is performed normally, the control voltage and the DC potential of the collector of the transistor 3 are the same, so if the resistance value of the resistor 5 is decreased, the current flowing through the resistor 5 in response to a change in the control voltage is reduced. The amount of change, that is, the amount of change in the collector current of transistor 3 increases. As a result, the amount of change in oscillation frequency with respect to the control voltage increases.

In this way, the sensitivity of the oscillation frequency to the control voltage can be adjusted by the resistance value of the resistor 5.

As described above, according to the embodiment shown in FIG. 1, the sensitivity of the oscillation frequency to the control voltage can be set arbitrarily. Furthermore, since a surface acoustic wave delay line is used, a voltage controlled oscillator that is extremely stable and has little phase noise can be constructed.

Further, the embodiment shown in FIG. 1 does not require a variable capacitance element, an inductance, a large capacitor, etc., and is therefore extremely suitable for integration into an integrated circuit. For example, the embodiment shown in FIG. 1 is composed of two chips: a semiconductor substrate chip on which other circuits except the surface acoustic wave delay line 13 are integrated, and a piezoelectric substrate chip on which the surface acoustic wave delay line 13 is formed. 5 It is possible to construct an ultra-small voltage controlled oscillator.

The present invention is not limited to the embodiment shown in FIG. 1, but can be implemented with various modifications. FIG. 2 is a circuit configuration diagram showing a modification of the embodiment of FIG. 1.

In place of the low-pass filter 22 in FIG. 1, a capacitor 23 is connected in parallel with the resistor 5 in the embodiment shown in FIG. By selecting the absolute value of the impedance of this capacitor to be sufficiently smaller than the resistance value of the resistor 5 at the oscillation frequency, the oscillation frequency component of the collector current of the transistor 3 can be biased by this capacitor. Therefore, the AC voltage at the oscillation frequency generated at the collector of the transistor 3 can be made sufficiently small, so that the same operation as in the embodiment shown in FIG. 1 can be performed.

In the embodiment shown in FIG. 2, the same effects as in the embodiment shown in FIG. 1 can be obtained.

FIG. 3 is a circuit configuration diagram showing another modification of the embodiment of FIG. 1. In place of the low-pass filter of FIG. 1, in the embodiment of FIG. 3, resistors 24 and 25 are inserted into the two inputs of the differential amplifier 20, and a capacitor 26 is used to provide negative feedback from the positive output to the negative output. By applying
By operating the differential amplifier 20 as a so-called active filter, the AC voltage at the oscillation frequency generated at the collector of the transistor 3 is not amplified. With such a configuration, the same operation as the embodiment shown in FIG. 1 can be performed.

In the embodiment shown in FIG. 3, the same effects as in the embodiment shown in FIG. 1 can be obtained.

FIG. 4 is a circuit diagram showing another embodiment of the present invention.

In this embodiment, all the high frequency circuit portions have a differential circuit configuration. In FIG. 4, transistors 41 and 42
are connected to a ground terminal 44 via a direct current source 43, the collector of transistor 41 is connected to the emitters of transistors 45 and 46, and the collector of transistor 42 is connected to the emitters of transistors 47 and 48. The collector of transistor 45 is connected through resistor 49, the collectors of transistors 46 and 47 are connected through resistor 50, and the collector of transistor 48 is connected through resistor 51.
Each is connected to a power supply terminal 52. The above circuit constitutes a first variable amplification amplifier. and,
Each emitter of transistors 53 and 54 is connected to a direct current source 55.
The collector of transistor 53 is connected to the emitters of transistors 56 and 57, and the collector of transistor 54 is connected to the emitters of transistors 58 and 59. The collector of transistor 56 is connected via resistor 49, the collectors of transistors 57 and 58 are directly connected, and the collector of transistor 59 is connected to resistor 51.
are connected to the power supply terminals 52 through the respective terminals. The above circuit constitutes a second variable amplification amplifier. Further, the voltage at the connection point between the resistor 51 and the collectors of the transistors 48 and 59 is amplified by an amplifier 60 and applied to output terminals 61 and 62, and is also input to the input interdigital electrode 64 of the surface acoustic wave delay line 63. be done.

One end of the first output interdigital electrode 65 of the surface acoustic wave delay line 63 is connected between the bases of transistors 41 and 42. Further, one end of the second output interdigital electrode 66 of the surface acoustic wave delay line 63 is connected between the bases of the transistors 53 and 54. The acoustic distance between the input interdigital electrode 64 and the first output interdigital electrode 65 of the surface acoustic wave delay line 63 and the acoustic distance between the input interdigital electrode 64 and the second output interdigital electrode 66 are as follows. Designed to differ by 1/4 wavelength. As a result, transistors 41 and 42
Signals having a phase difference of 90 degrees are input between the bases of the transistors 53 and 54 and between the bases of the transistors 53 and 54, respectively. A bias circuit 6 connected to a power supply terminal 52 and a ground terminal 44 is connected to the base of each transistor 41, 42, 53, 54.
7, a bias voltage is applied through resistors 68, 69, and 70° 71, respectively. Further, the positive input of the differential amplifier 72 is connected to the control terminal 73, the negative input is connected to the collectors of the transistors 46 and 47, and the positive output is connected to the bases of the transistors 45, 48, 57, 58,
The negative output is connected to each base of transistors 46.47.56.59.

The above is the circuit configuration of this embodiment. Next, the operation of the second embodiment will be explained.

First, between each input of the first and second variable amplification amplifiers, that is, between the bases of transistors 41 and 42, and between the transistor 53
Signals having a phase difference of 90 degrees are applied between the bases of and 54 by the surface acoustic wave delay line 13.

These two signals are amplified by the differential amplification operation of transistors 41 and 42 and the differential amplification operation of transistors 53 and 54, respectively. This amplified signal, that is, the collector current of transistor 4], 42,
The collector currents of transistors 53, 54 flow through transistors 45, 46, 47, 48 and 56, 57, 58, 59, respectively. The base of each transistor 45, 48, 57, 58 is a differential amplifier 72
Since the bases of transistors 46, 47, 56, and 59 are respectively connected to the positive output of transistor 46, 47, 56, and 59 to the negative output of differential amplifier 72, the rate at which the collector current of transistor 41 flows through transistor 45, The rate at which the collector current flows through transistor 48, the rate at which the collector current of transistor 53 flows through transistor 57, and the rate at which the collector current of transistor 54 flows through transistor 58 are all the same. Naturally, the proportion of the collector current of the transistor 41 flowing through the transistor 46, the proportion of the collector current of the transistor 42 flowing through the transistor 47,
The ratio at which the collector current of transistor 53 flows through transistor 56 and the ratio at which the collector current of transistor 54 flows through transistor 59 are also the same.

Then, the current flowing through the transistors 45 and 56 is
Similarly, the currents flowing through transistors 48 and 59 are added at resistor 51. At this time, the voltage generated at the connection point between the resistor 49 and the collector of the transistor 45.56 and the voltage generated at the connection point between the resistor 51 and the collector of the transistor 48.59 have a phase difference of 180 degrees.
It becomes a differential voltage. This voltage is amplified by the amplifier 60 and fed back to the surface acoustic wave delay i&163. Then, the amplification degree of the circuit excluding the surface acoustic wave delay line 63 becomes greater than the loss of the surface acoustic wave delay line 63, and
It oscillates at a frequency where the phase of the signal fed back through the circuit and other circuits is an integer multiple of 0 degrees or 360 degrees.

By the way, each base of the transistor 45.48 and each base of the transistor 56.59 are connected to the positive and negative outputs of the differential amplifier 72, respectively, so the output voltage of the differential amplifier 72 causes the transistor 45° When the collector current of transistors 45 and 48 increases, the current of transistors 56 and 59 decreases, and conversely, when the collector current of transistors 45 and 48 decreases, the current of transistors 56 and 59 increases. The respective collector currents of the transistors 45 and 48 and the respective collector currents of the transistors 56 and 59 are amplified signals having a phase difference of 90 degrees from the surface acoustic wave delay line.

Therefore, the signals added by resistors 49 and 51 are:
It changes by 90 degrees depending on the output voltage of the differential amplifier 72.

As a result, the phase of the signal fed back to the surface acoustic wave delay line 63 also changes, and the oscillation frequency changes depending on the output voltage of the differential amplifier 72.

Next, in the circuit of FIG. 4, transistors 46 and 47
Since the collector current is the remaining current after subtracting the current flowing through the transistors 45 and 48 from the collector current of the transistors 41 and 42, respectively, it is inversely proportional to the amplification degree of the first variable amplification amplifier. Also, transistor 46.4
Since the resistor 50 is connected between the collector of the transistor 7 and the power supply terminal 52, the collector potential of the transistor 46, 47 is inversely proportional to the collector current. As a result, the collector potential of transistors 46, 47 is proportional to the amplification of the first variable amplification amplifier. By the way, transistor 46
．． Since the negative and positive output voltages of the differential amplifier 20 are applied to the bases of the transistors 47 and 45.48, when the control voltage applied to the control terminal 73 increases, the transistors 46.4
The base potential of transistors 45 and 48 decreases, and the base potential of transistors 45 and 48 increases. When the base potential of transistors 46 and 47 decreases, the collector current decreases and the collector potential increases. Since this potential is negatively fed back to the negative input of the differential amplifier 20, the transistor 46
．． The base potential of 47 rises and the transistor 945.48
The base potential of decreases. This series of actions ultimately leads to
The collector potential of the transistors 46 and 47 becomes the same as the control voltage applied to the control terminal and becomes stable. That is,
Feedback control is performed so that the collector potential of the transistors 46 and 47 changes in proportion to the control voltage 9
Note that the alternating current components of the oscillation frequencies of the collector currents of the transistors 46 and 47 have a phase difference of 180 degrees l6 due to the differential operation of the transistors 41 and 42, so when they are added at the resistor 50, they cancel each other out, and the resistor 50 The current that flows through is only a DC component. Therefore, transistor 46.4
Since the voltage generated at the collector of 7 is also a DC voltage, a low-pass filter like the embodiment shown in FIG. 1 is not required.

The fact that the collector potential of the transistors 46 and 47 is proportional to the control voltage means that the amplification degree of the first variable amplification amplifier changes in proportion to the control voltage. Also, the bases of transistors 46 and 47 and the transistor 56
．． Since the bases of transistors 45 and 48 are connected to the bases of transistors 57 and 58, the amplification of the second variable amplification amplifier is opposite to that of the first variable amplification amplifier. In other words, it changes in inverse proportion to the control voltage.

When the feedback control is performed normally, the control voltage and the DC potential of the collector of the transistor 46, 47 are the same, so if the resistance value of the resistor 50 is decreased, the current flowing through the resistor 50 in response to a change in the control voltage is The amount of change in current, that is, the amount of change in the collector currents of transistors 46 and 47 increases. As a result, the amount of change in oscillation frequency with respect to the control voltage increases. In this way, resistance 60
The sensitivity of the oscillation frequency to the control voltage can be adjusted by the resistance value.

As described above, according to the embodiment shown in FIG. 4, the sensitivity of the oscillation frequency to the control voltage can be set arbitrarily.

Furthermore, since two surface acoustic wave delay lines are used, a voltage controlled oscillator that is extremely stable and has little phase noise can be constructed.

Further, the embodiment shown in FIG. 4 does not require a variable capacitance element, inductance, large capacitor, etc., and is therefore extremely suitable for integrated circuit implementation. Therefore, similar to the embodiment shown in FIG. 1, the embodiment shown in FIG. It can be configured with two chips, and it is possible to configure an ultra-small voltage controlled oscillator.

In all the embodiments and modifications described above, the feedback-controlled voltage, that is, the collector potential of the transistors 3 and 46 and 47, and the control voltage are at the same potential. However, depending on the purpose of use, it is desirable to be able to set the control voltage within an arbitrary range. In such a case, by connecting a voltage shift circuit or a DC voltage source to the positive input or negative input of the differential amplifier 20.72, a potential difference can be created between the feedback-controlled voltage and the control voltage. can be caused. This potential difference can be arbitrarily set by the voltage soft amount of the voltage shift circuit or the voltage of the DC voltage source.

Control voltage can be set to any range.

Alternatively, in all the above embodiments and modifications, it is assumed that the two signals obtained from the first output interdigital electrode and the second output interdigital electrode of one surface acoustic wave delay line have a phase of 90 degrees l4. However, the present invention is not limited to this, and can operate with any phase difference. Then, the range of change in the oscillation frequency can be changed depending on the phase difference. Therefore, the acoustic distance between the input interdigital electrode of the surface acoustic wave delay line and the first interdigital electrode, and the acoustic distance between the input interdigital electrode and the second interdigital electrode are 1. It is not limited to those having different wavelengths by /4. However, if the phase difference is 0 degrees, the oscillation frequency will not change, and if it is 180 degrees, it will not be possible to obtain an intermediate phase between the two signals, resulting in an operation in which the two frequencies do not oscillate. , the object of the present invention cannot be achieved.

Note that although it is preferable to implement the present invention by integrating circuits other than the surface acoustic wave delay line, the purpose of the present invention can be sufficiently achieved even if implemented using individual transistors and resistors. .

The embodiments and modifications of the present invention have been described above, but in short, the present invention includes the following without departing from the gist thereof:
It can be implemented with various modifications.

〔Effect of the invention〕

As explained above, according to the voltage controlled oscillator of the present invention,
The sensitivity of the oscillation frequency to the control voltage can be set arbitrarily. Thus, a voltage controlled oscillator that is extremely stable and has little phase noise can be constructed. Furthermore, since it can be configured with two chips, a semiconductor substrate chip and a piezoelectric substrate chip, it is possible to provide an ultra-small voltage controlled oscillator.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram showing one embodiment of the present invention, FIG. 2 is a circuit configuration diagram showing a modification of the embodiment of FIG. 1, and FIG. 3 is another modification of the embodiment of FIG. 1. FIG. 4 is a circuit diagram showing another embodiment of the present invention, and FIG. 5 is a circuit diagram showing a conventional example. 1.3, 4, 8, 9.10...transistor 41, 4
2.45.46.47.48...Transistor 53, 5
4.56.57.58.59...Transistor 2.4
4... Ground terminal 5, 6.18.19.24.25... Resistance 49, 50
．． 51.68.69.70.71...Resistance 7.52.
...Power terminals 11, 60...Amplifiers 12, 61.62...8-power terminals 13, 63...Surface acoustic wave delay lines 14, 64...Input interdigital electrodes 15, 6
5...First output interdigital electrode 16, 66
・Second output interdigital electrode 17, 67...
Bias circuit 20, 72...Differential amplifier 21, 73...Control terminal 22...Low pass filter 23, 26...Capacitor 43, 55...DC current source agent Noriyuki Chika, patent attorney Kikuo Takehana Figure 1 Figure 2

Claims (1)

[Claims] (1) The phase obtained by the surface acoustic wave delay line is different2
means for changing the phase of the two signals by respectively amplifying and adding the two signals with variable amplification amplifiers; and means for feeding back the phase-changed signal to the surface acoustic wave delay line; Feedback control is performed so that the amplification degree of the variable amplification amplifier changes in proportion to the control voltage, and the amplification degree of the other variable amplification amplifier changes in inverse proportion to the control voltage. Voltage controlled oscillator.