JPH0415666B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of a MOS type solid-state image sensor.

Charge transfer devices can be broadly divided into charge coupled devices (hereinafter referred to as charge coupled devices).
CCD) and bucket brigade devices; however, in this invention, the CCD will be mainly described.

Since CCD was announced in 1970, it has been based on conventional advanced integrated circuit technology, and has been rapidly developed as CCD has progressed. It became. In particular, solid-state image sensors using CCDs
Along with MOS-type image sensors, they have many characteristics such as low power consumption, small size and light weight, and can be highly integrated, and their development has been rapid in recent years. However, these solid-state image sensing devices have a drawback in that their characteristics are impaired by blooming and smear phenomena. This is a phenomenon in which excess charge generated inside the element when imaging a subject with high illuminance diffuses within the substrate, and as a result, charge overflows to adjacent picture elements or registers, spoiling the reproduced image. It was a shortcoming. In order to eliminate this drawback, attempts have been made to absorb excess charge by arranging a diffusion layer called an overflow drain between picture elements, but this structure essentially does not allow high density. However, there were disadvantages such as impossibility and poor utilization of the amount of incident light.

FIG. 1a shows a cross-sectional view of the main parts of a conventional CCD solid-state image sensor. In FIG. 1a, 1 is a semiconductor substrate having one conductivity type, and in this example, a P-type semiconductor is shown. Reference numeral 2 denotes a semiconductor region having a conductivity type opposite to that of the semiconductor substrate 1, and a PN junction is formed between the semiconductor region and the semiconductor substrate to form a so-called photodiode. A semiconductor region 3 having a conductivity type opposite to that of the semiconductor substrate 1 constitutes a buried channel.

4 indicates a transfer gate region formed by a surface channel. 5 is a transfer electrode formed to cover the buried channel 3 and the transfer gate region 4; 6 is an insulating film; 7 is a channel stopper;
indicates a light shield electrode such as aluminum.

Next, the operation of this element will be explained.

FIG. 2 shows a part of the drive waveform for driving this element, and here the vertical drive pulse waveform applied to the transfer electrode 5 is shown. This vertical drive pulse has three levels, and becomes a high level VH during the vertical blanking period VB, and becomes a pulse with an amplitude VM that reciprocates between the intermediate level and the low level during the valid period.

FIGS. 1b and 1c show the potential distribution inside the device shown in FIG. 1a when the vertical pulse is at high, medium, and low levels.

First, in FIGS. 1b and 1c, 11 and 14 are the potentials of photodiode 2, 12, 15, and 16.
is the potential of transfer gate region 4, 1
3, 17, and 18 indicate channel potentials of the embedded channel 3, respectively. When the vertical drive pulse becomes high level at time _t0 in FIG. 2, the potentials of the transfer gate region 4 and the buried channel 3 are set to deep potentials such as 12 and 13, as shown in FIG. 1b, and the photodiode 2 The signal charges existing in the channel 3 are read out to the vertical shift register constituted by the embedded channel 3. At the same time, the photodiode 2 is set to a potential 11 determined by the potential 12 of the transfer gate region 4. Next, the signal charge already read out within the vertical effective period is transferred vertically by a pulse that goes back and forth between the intermediate level and the low level with an amplitude VM shown in FIG. In this case, the photoelectrically converted charges are accumulated. In Figure 1c, time t ₁ or t ₂
The diagram shows the potential diagram for .

The potential of the transfer gate region or buried channel region is as shown by solid lines 16 and 18 at the intermediate level at time t ₁ and at time t ₂
At a low level, it becomes like the dotted lines shown at 15 and 17.

Incidentally, as the photoelectrically converted charges are accumulated, the potential 14 in the photodiode region becomes shallower. When the incident light is strong, the photodiode potential 14 becomes shallower than the transfer gate region potential 16, and excessively generated charges overflow into the shift register, causing blooming. Further, in the element having the structure shown in FIG. 1, charges generated by light that has entered deeply into the semiconductor substrate 1 are diffused in all directions, and as a result, smear occurs due to leakage into the shift register. In this way, conventional elements exhibit blooming,
It was impossible to suppress the smear. For this reason, attempts have been made to reduce blooming and smear by arranging a diffusion layer called an overflow drain between each picture element, but as already mentioned, this structure does not essentially solve the problem.

SUMMARY OF THE INVENTION An object of the present invention is to provide a new solid-state image sensor that eliminates the above-mentioned conventional drawbacks.

According to the present invention, a semiconductor light receiving section is formed on a semiconductor substrate having one conductivity type, has the same conductivity type as the semiconductor substrate, and is for photoelectrically converting incident light, and a signal charge photoelectrically converted in the light receiving section. A solid-state imaging device comprising: a shift register for transferring a signal; a transfer gate for electrically separating or coupling the light receiving section and the shift register; and means for driving the shift register and the transfer gate. and a transfer gate is formed on a first well having a conductivity type opposite to that of the semiconductor substrate, and at least a part of the region immediately below the light receiving portion is formed of a semiconductor region having the same conductivity type as the semiconductor substrate, and this semiconductor region A second well of the same conductivity type as the first well is provided in the substrate on the opposite side of the first well, and the light receiving portion and the semiconductor substrate are connected to each other via the semiconductor region, A solid-state imaging device is obtained, characterized in that, at least during operation, a reverse bias is applied between the first and second wells and the substrate to deplete the semiconductor region.

The present invention will be described in detail below with reference to the drawings.

FIG. 3a shows an embodiment according to the present invention and shows a sectional view of the main part of the device. In FIG. 1a, 21 is a semiconductor substrate having one conductivity type, and in this embodiment, an N-type substrate is shown. Reference numerals 22 and 23 denote semiconductor regions formed on the semiconductor substrate 21 and having a conductivity type opposite to that of the semiconductor substrate.
Well. 24 is a region sandwiched between P-wells 22 and 23, and is a region between photodiode 2 or substrate 21.
This is a semiconductor region having the same conductivity type as . Other numbers are the same as shown in FIG. 1a.

The feature of this device is that, unlike the conventional device shown in FIG. 1a, the substrate is of N type, and the active region is formed on a P-well except for a part of the photodiode. Furthermore, in this device, at least a part of the area directly below the photodiode is a P-well.
It consists of a semiconductor region 24 sandwiched between 22 and 23, and this region has the same conductivity type as the substrate 21 or the photodiode 2. Next, the operation of this device will be explained.

The same driving pulses as shown in FIG. 2 can be used for this element. During operation of this device, a reverse bias voltage V _SUB is always applied between the P-wells 22 and 23 and the substrate 21 . This V _SUB
The value of must be sufficient to deplete the region 24. FIG. 3b shows the photodiode region and the potential distribution immediately below the photodiode region in a cross section taken along the dashed line A-A' in FIG. 3b. The potential shown in Figure 3b is shown with the P-well as a reference potential, where the solid line 30 is the potential distribution, V _PD is the photodiode region potential, and V _SUB is the reverse bias voltage applied to the P-well and the substrate. value, indicating the potential of the substrate. Also
V _B indicates the shallowest potential in region 24 on A-A'. This value of V _B is the value of P adjacent to area 24.
-Determined by the extension of the depletion layer spreading from wells 22 and 23 or by the V _SUB voltage, and during operation, P
-Always deeper than the well potential. Furthermore, this potential V _B is set to always be deeper than the potential 16 of the transfer gate region when the drive pulse voltage is at an intermediate level.

When photoelectric conversion is performed due to optical input, signal charges are accumulated in the photodiode area, and at the same time the potential is
V _PD also becomes shallower.

At this time, the potential V _PD is the potential 16 of the transfer region when the drive pulse voltage is the intermediate register.
When the value reaches 16, excess charge leaks into the shift register and causes blooming, but in this device, the value of V _B is always controlled to be larger than potential 16, so the excess charge flows into the shift register. V _B before overflow
It overcomes the potential of , and is swept out to the substrate 21 side.
As a result, blooming is suppressed.

Furthermore, since a reverse bias voltage is always applied between the P-wells 22 and 23 and the substrate 21, the potential of the region 24 is always deeper than the potential of the adjacent P-wells 22 and 23. As a result, charges generated directly below the photodiode, mainly in the region 24, are diffused in the lateral direction and do not leak into the P-well and further into the buried channel 3, thereby suppressing smear.

Furthermore, it is clear that this element can essentially achieve higher density and higher sensitivity than an element in which an overflow drain is arranged between picture elements.

As described above, according to the present invention, it is possible to suppress blooming and smear and obtain a high-density, high-sensitivity solid-state imaging device.

[Brief explanation of drawings]

FIGS. 1a to 1c show cross-sectional views of the main parts of a conventional solid-state image sensing device and the potential distribution inside the device. FIG. 2 is an example of the drive waveform of the solid-state image sensor, and FIGS. 3a and 3b are cross-sectional views of the main parts of an embodiment of the solid-state image sensor according to the present invention, and the potential distribution inside the device along the broken line A-A'. It is. 1 to 3, 1 and 21 are semiconductor substrates, 2 is a photodiode, 3 is a buried channel, 4 is a transfer gate region, 5 is an electrode, 2
2 and 23 are semiconductor regions having a conductivity type opposite to that of the semiconductor substrate 21.

Claims (1)

[Claims] 1 Formed on a semiconductor substrate having one conductivity type,
A semiconductor light receiving section having the same conductivity type as this semiconductor substrate and for photoelectrically converting incident light, a shift register for transferring the signal charge photoelectrically converted in this light receiving section, and the light receiving section and shift register are electrically connected to each other. In the solid-state imaging device, the solid-state imaging device has a transfer gate for separating or coupling the semiconductor substrate, and a means for driving the shift register and the transfer gate, wherein the shift register and the transfer gate are formed in a first well having a conductivity type opposite to that of the semiconductor substrate. At least a part of the region immediately below the light receiving portion is formed of a semiconductor region of the same conductivity type as the semiconductor substrate, and a first well is formed in the substrate on the opposite side of the first well with this semiconductor region in between. A second well of the same conductivity type as the well is provided, and the light receiving portion and the semiconductor substrate are connected to each other via the semiconductor region, and at least during operation, the first well and the semiconductor substrate are connected to each other through the semiconductor region.
A solid-state imaging device, characterized in that the semiconductor region is depleted by applying a reverse bias between the second well and the substrate.