JPH04155930A - Production of semiconductor device - Google Patents

Abstract

PURPOSE:To enhance EG capability and sufficiently eliminate contamination with gettering method by dry processing at the time of providing a contact aperture to achieve improvement of leak characteristic of P-N<+> junction of N<+> drain by executing laser annealing through irradiation of low energy excimer laser after rotary coating of a phosphorus-doped silicon oxide film on the lower surface of a semiconductor substrate. CONSTITUTION:A field oxide film 2, a gate oxide film 3, a polysilicon film 4 are formed on the surface of a P type silicon substrate 1. Next, phosphorus is diffused to the rear surface of silicon substrate 1 leaving the polysilicon film 5 and the oxide film 6. Next, a gate electrode 9 consisting of the polysilicon, a protection oxide film 10, an N<+> type source 11, an N<+> type drain 12 and an interlayer insulating film 14 are formed. In this timing, the polysilicon film 5, oxide film 6 disappear due to thermal oxidation, etc., exposing the rear surface of the silicon substrate 1. Therefore the rear surface of silicon substrate 1 is rotatably coated with the phosphorus-doped SOG film 15 and allows irradiation of low energy excimer laser from above the SOG film. Thereby, phosphorus excessively diffuses at the rear surface of silicon substrate 1, generating crystal defect 16. Accordingly, contaminating impurity in the element forming region is reduced and the element characteristic is improved by the gettering effect.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing semiconductor devices, and in particular extrinsic gettering, which is a process of removing heavy metals and crystal defects harmful to semiconductor devices.
Lettering).

[Conventional technology]

Extrinsic gettering (
EG) is being carried out.

If the crystal lattice on the back surface of the semiconductor substrate is damaged before or during the formation of circuit elements and then subjected to heat treatment, crystal defects are induced and contaminant impurities such as heavy metals are captured. Therefore, the higher the crystal defect density, the higher the EG ability.

Damage to the crystal lattice is carried out by physically damaging the back surface of the semiconductor substrate, by ion implantation, by distorting the crystal lattice by over-diffusion of dopants, or by a combination of these methods.

Physical damage methods include 5i02 and A 1 a03.
There are methods such as bombarding the back surface of the semiconductor substrate with fine grains and laser irradiation. Although it is very simple, it has the disadvantage of contamination due to fine particles used for damage or missing parts of the damage.

Phosphorus is often used in the ion implantation method and the dopant overdiffusion method. Although there is no particulate contamination, the processing process is complicated, and heavy metal contamination during ion implantation and thermal diffusion becomes a problem. There are defects in which crystal defects that have been introduced are likely to be reduced or eliminated by repeated heat treatments during the manufacturing process. Therefore, when a strong EG effect is required, the E
It is necessary to add G processing to strengthen it.

In this way, considering the advantages and disadvantages of each, EG treatments are combined in accordance with the required EG strength and process.

Next, the manufacturing process of an N-channel MO8FET according to the prior art will be explained with reference to FIGS. 3(a) to 3(e).

First, as shown in FIG. 3(a), a field oxide film 2, a gate oxide film 3, and a polysilicon film 4 are formed on the surface of a P-type silicon substrate 1. At this time, an oxide film 6 and a polysilicon film 5 are also formed on the back surface.

Next, as shown in FIG. 3(b), after removing the polysilicon film 5 and oxide film 6 on the back surface, phosphorus is diffused for 30 minutes. Crystal defects 16 were generated on the back surface of the silicon substrate 1 due to excessive diffusion of phosphorus.

Next, as shown in FIG. 3(C), a gate electrode 9 made of polysilicon, a protective oxide film 10, an N'' type source 11,
An N+ type drain 12 and an interlayer insulating film 14 are formed.

Next, as shown in FIG. 3(d), contacts are opened, wiring lines 18 and 19, and a surface protection film 20 are formed to form the MOSFET.
ET is completed.

[Problem to be solved by the invention]

The method of excessively diffusing a dopant into the back surface of a semiconductor substrate is often used as a heat treatment step in the circuit element manufacturing process.

However, this method has the disadvantage that if more than the required amount of dopant is diffused into the circuit element formation region, the element characteristics will change. To prevent this, it is necessary to carefully select the process to avoid the influence of dopant diffusion, or to form a protective film on the circuit element.

However, if the order of manufacturing steps is fixed, the effects of EG may not always be obtained when necessary.

Furthermore, the deposition and removal of the protective film requires many additional steps, which not only complicates the device manufacturing process, but also causes surface damage to the device area and introduces new contamination. There are problems such as causing

As semiconductor integrated circuits become faster and more highly integrated, the manufacturing process tends to be lower in temperature, and the diffusion temperature of dopants is lowered. Therefore, a problem arises in that the amount of dopant diffused into the semiconductor substrate decreases and the diffusion depth becomes shallower, resulting in a decrease in the number of induced crystal defects and a decrease in the EG effect.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes the steps of depositing a phosphorus-doped silicon oxide film on the lower surface of a semiconductor substrate, and irradiating the silicon oxide film with an excimer laser.

[Effect]

In the present invention, a phosphorus-doped SOG film is spin-coated at room temperature and then laser annealed by irradiation with a low-energy excimer laser.

Most of the excimer laser passes through the SOG film, but most of it is absorbed by the silicon substrate due to its large absorption coefficient.

Therefore, the temperature near the surface of the silicon substrate becomes high, and SO
Phosphorus contained in the G film diffuses into the substrate.

Excimer laser has an extremely short irradiation time for each pulse, and the laser energy absorption layer is limited to the vicinity of the surface.
The temperature of the entire substrate does not increase, and the device characteristics do not change.

Further, since phosphorus is directly taken into the substrate by solid phase diffusion, it does not evaporate from SOG[I and diffuse into the element region. Therefore, there is no need to form a protective film for preventing diffusion in the element region.

The irradiation laser energy is optimally 0.1 to 0.4 J/cm Q11 pulse, since it is sufficient to diffuse phosphorus and does not damage the substrate surface due to melting and evaporation.

In addition, in order to diffuse excessively into the silicon substrate, SOG
The phosphorus concentration of the film is required to be 2 mol % or more, and desirably 20 mol % or less in order to obtain laser transparency and heat resistance.

〔Example〕

Regarding the first embodiment of the present invention, FIGS. 1(a) to (e)
Explain with reference to.

First, as shown in FIG. 1(a), a field oxide film 2 and a gate oxide film 3 are formed on the surface of a P-type silicon substrate 1, and then a polysilicon film 4 is grown by CVD. At this time, an oxide film 6 and a polysilicon film 5 are formed on the back surface.

Next, as shown in FIG. 1(b), a POC film is formed while leaving the polysilicon film 5 and oxide film 8 formed on the back surface of the silicon substrate 1. Phosphorus diffusion is performed using gas at 900° C. for 30 minutes. At this time, phosphorus does not diffuse into the silicon substrate 1, so no crystal defects occur on the back surface.

Next, as shown in FIG. 1(C), a gate electrode 9 made of polysilicon, a protective oxide film 10, an N+ type source 11,
An N" type drain 12 and an interlayer insulating film 14 are formed. At this time, the polysilicon film 5 and oxide film 6 formed on the back surface of the silicon substrate 1 are eliminated by repeated thermal oxidation and etching, and the back surface of the silicon substrate 1 is removed. is exposed.

Next, as shown in FIG. 1(d), an SOG film 15 with a phosphorus concentration of 6 mo and 1% is spin-coated on the back surface of the silicon substrate 1.
From above, the energy density of KrF as a laser source is 0.
Irradiate with an excimer laser of IJ/cm2 epulse. Phosphorus was excessively diffused on the back surface of the silicon substrate 1, and crystal defects 16 were generated.

Finally, as shown in FIG. 1(e), contacts are opened, wiring 18, 1θ, and a surface protection film 20 are formed to form the MOSFET.
ET is completed.

The reverse bias leakage characteristic of the P-N" junction formed between the silicon substrate and the N3 type drain of this MOSFET was measured and found to be approximately 10-13A/mm2, compared to the leakage level of approximately 10-"A/mm2 in the conventional example. improved by two digits.

Furthermore, after exposing the back surface of the silicon substrate, it was subjected to light etching for 3 minutes and observed under an optical microscope, and the number of remaining crystal defects was compared.

As a result, a much higher density of residual crystal defects was observed at 2×10 5 defects/cm 2 in this example, compared to 8×10′ defects/cm 2 in the conventional example.

In the conventional example, it is thought that the crystal defects introduced by phosphorus diffusion were reduced by repeating the heat treatment in the post-process.

Therefore, in the latter half of the MO8FET manufacturing process, applying this example has a higher EG ability, and can sufficiently getter the contamination caused by the dry processing during contact opening, so that the P-
This is thought to have improved the leakage characteristics of the N'' junction.

Next, regarding the second embodiment of the present invention, FIGS.
This will be explained with reference to (d).

First, as shown in Figure 2(a), the crystal plane is (100
), after forming a field oxide film 2 and a protective oxide film 10 on a P-type silicon substrate 1 with a specific resistance of 15 Ω·cm,
A trench that will become a capacitor region is formed.

Next, arsenic ions are implanted to form an N+ type layer 13 on the wall surface of the trench.

Next, as shown in FIG. 2(b), an SOG film 15 with a phosphorus concentration of 10 mol% is spin coated on the back surface of the silicon substrate 1.
X e CI! An excimer laser with an energy density of 0.4 J/cm 2 ·pulse is applied as a laser source to diffuse phosphorus into the silicon substrate 1 and generate crystal defects 16 .

Next, as shown in FIG. 2(C), a capacitive film 17 is formed on the trench wall surface, a polysilicon film 21 that will become a storage gate is embedded, and an insulating film 7, a gate oxide film 3,
Gate electrode 9, isolation II film 8, N″″ type source 11, N+
A mold drain 12 is formed.

Finally, as shown in FIG. 2(d), an interlayer insulating film 14 and wiring 18 are formed to complete a DRAM memory cell consisting of one transistor and one capacitor.

When the memory retention time of the memory cell thus produced was measured, it was found to be 20 to 25% longer than that of a cell without an SOG film and no XeC laser irradiation. Good product rate is about 8%
It's improving.

Contamination during dry processing during trench formation and during ion implantation to form an N1 type layer on the trench wall surface causes subsequent E
This is thought to be due to gettering and reduction in G processing.

〔Effect of the invention〕

A phosphorus-doped silicon dioxide film (SOG) is deposited on the back side of the silicon substrate.
After spin-coating the film, it is irradiated with a low-energy excimer laser. Crystal defects are generated on the back surface of the silicon substrate due to excessive diffusion of phosphorus, and the gettering effect of these can reduce contaminating impurities in the device formation region and improve device characteristics.

Since there is no need to form a protective film on the circuit element formation surface, there is no contamination and the manufacturing process is not complicated.

Since there is no heat treatment that would change the device characteristics and there is no dopant infiltration into the device region, there are no restrictions on the location where the EG treatment is performed. By performing it immediately before the required process, the gettering effect can be efficiently obtained. This is a very clean, flexible, and simple EG processing method.

[Brief explanation of drawings]

FIGS. 1(a) to (e) are cross-sectional views showing the first embodiment of the present invention in the order of steps, and FIGS. 2(a) to (d) are cross-sectional views showing the second embodiment of the present invention in the order of steps. Figure 3 (a) to (d)
1 is a cross-sectional view showing a manufacturing process of a MOSFET according to the prior art. DESCRIPTION OF SYMBOLS 1... P-type silicon substrate, 2... Field oxide film, 3... Gate oxide film, 4.5... Polysilicon film, θ... Oxide film, 7, 8... Insulating film , 9... Gate electrode, 10... Protective oxide film, 11... N+ type source, 12... N+ type drain, 13... N+ type drain,
14... Interlayer insulating film, 15... SOG film, 16...
・Crystal defect, 17...Capacitive film, 18.19...Wiring, 20...Surface protection film ・21°-11J 71J'''
Mem・dai 9 people's dialect, Susumu Ouchihara l Figure 2 Figure 3 Figure 3

Claims (1)

[Claims] 1. In the step of forming a circuit element on the upper surface of the semiconductor substrate, a step of depositing a phosphorous-doped silicon oxide film on the lower surface of the semiconductor substrate, and a step of irradiating the silicon oxide film with an excimer laser A method for manufacturing a semiconductor device, comprising: 2. The phosphorus content concentration of the phosphorus-doped silicon oxide film is 2 to 20 m
2. The method of manufacturing a semiconductor device according to claim 1, wherein 3. Excimer laser irradiation energy is 0.1 to 0.4
2. The method for manufacturing a semiconductor device according to claim 1, wherein the pulse is J/cm^2·pulse.