JPH04151721A - High speed data transferring system for plural processor system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] (Summary) Regarding a high-speed data transfer method in a multi-processor system that does not share real memory but shares an external storage device, the data area that has been paged out to the external storage device can be transferred to a sending user. The purpose is to send data to the receiving user's space without page-in to the space, and to enable the receiving user's space to receive only the data necessary for actual processing. In a system consisting of a plurality of coupled processors, each of the plurality of processors is managed by the system program of each of the processors, and transmits data stored in a data area in the real memory of each of the processors to the external storage device. A temporary data area for temporary storage before page-out, and one or more virtual storage areas managed by the system program to determine whether the data to be sent is on the external storage device or another processor. virtual memory management information for managing the transmitted data by distinguishing whether it is in the temporary data area managed by the system program of To configure a receiving processor to receive only necessary data without page-in to a transmission space.

[Industrial application field]

The present invention relates to a data transfer method in a system consisting of a plurality of processors, and more particularly to a high-speed data transfer method in a multi-processor system that does not share real memory but shares an external storage device.

[Prior Art and Problems to be Solved by the Invention] FIG. 7 shows a conventional example of a data transfer system in a system consisting of a plurality of processors. In the figure, processors 1a, l
b, . . . , In are interconnected by a communication path 2, and each processor Ia.

System programs 3a, 3b, . . . , 3n exist in lb, . . . , 1n, respectively.

In FIG. 7, data held in user space 4a in processor 1b is transferred to user space 4b in processor lb.
Consider the case of sending to. Here, it is assumed that the data transmitted from the user space 4a is no longer needed on the processor la side after being transmitted to the user space 4b. Since the processors 1a and 1b do not have real memory that can be used jointly, the system program 3a must use the system Data transfer will be performed using the communication channel 2 managed by the program.

In the conventional example shown in FIG. 7, for example, if the data area in the user space 4a is paged out and stored in an external storage device provided corresponding to each processor, Although the data is no longer needed in the transmission space 4a, there is a problem in that it is necessary to page the transmission data once into the data area 5 of the user space 4a in order to send the data to the communication channel 2.

Furthermore, even if all of the transmitted data is not necessarily required in the receiving user space 4b, the transmitting user space 4a side
Because we are unable to determine what data we need,
Another problem is that all data needs to be transmitted.

The present invention transmits a data area that has been paged out in an external storage device to the receiving side's user space without page-in to the sending side's user space, and also transmits only the data necessary for actual processing on the receiving side's user space. The purpose is to enable reception.

[Means to solve the problem]

FIG. 1 is a Pronk diagram of the principle of the present invention. In the figure, a plurality of processors 1a and 1b share an external storage device 7 and are interconnected by a communication path 2.

It is a principle block diagram of a high-speed data transfer method in a system consisting of...

In FIG. 1, each of a plurality of processors 1a, 1b,...
Temporary data areas 8a, 8b, . . . are buffers, for example, and each processor la.

It is managed by the system program of lb, . Also, virtual memory management information 9a,
9b, . . . represent each processor 1a, lb, .
..., and corresponding to one or more virtual storage areas in each processor, whether the transmission data is on the external storage device 7 or if the system program of another processor in the system This is for managing transmission data by distinguishing whether it is in the managed temporary data area.

[Function] In the present invention, only the data required on the receiving processor side is sent without page-in of the sending data that has already been paged out to the external storage device 7 into the sending space on the sending processor side. Sent.

That is, when the transmission data is on the external storage device 7, external page management information indicating where the external page is located on the external storage device is sent to the receiving processor, and the receiving processor side stores the external page in the receiving buffer area. The external page management information sent as the corresponding virtual memory management information is written, and when the receiving processor accesses the receive buffer area due to actual processing needs and a page fault occurs, the external page management information is written according to the contents of the external page management information. Data is paged in from the external storage device 7.

Furthermore, when the transmission data is not in the external page on the external storage device on the transmission processor side, the transmission data on the real memory is moved to the temporary data area 8a, 8b, . . . and the contents of the data area are stored in the external storage device 7. A forced pageout to is scheduled, after which the sending processor's identifier and the virtual address of the temporary data area are sent to the receiving processor.

On the receiving processor side, the processor identifier and virtual address sent as virtual memory management information are written, and when a page fault occurs due to access to the receiving buffer area, data transmission to the sending processor is performed depending on the contents of the virtual memory management information. Upon request, the sending processor side sends external page management information indicating the external page of the external storage device 7 to which the sending data has been paged out based on the virtual address, and the receiving processor side sends external page management information based on the contents of the external page management information. Page-in processing from the external storage device 7 is performed.

As described above, according to the present invention, data can be transmitted without paging in the data area that has been paged out on the sending space side, and only data necessary for actual processing can be received on the receiving space side. becomes possible.

[Embodiment] FIG. 2 is an explanatory diagram of the basic concept of the data transfer method of the present invention. The mechanism of the data transfer method according to the present invention will be explained using the figure.

In the present invention, as the data transfer process (2), virtual memory management information is initialized based on the identifiers of the processors making up the system in order to enable a plurality of processors to share the external storage device. This initialization indicates, for example, which slot of the external storage device each processor uses. Next, as process (2), if an external page valid for the transmission data area on the sending processor side exists on the external storage device, external page management information indicating the external page is sent to the receiving side.

On the other hand, if there is no valid external page for the real memory in which the transmitted data is stored, the process is as follows: The transmitted data on the real memory near the CPU is managed by the system program and can be paged out. Moved to temporary data area. That is, the transmission data is moved from the real memory to the buffer for the temporary data area.

A forced pageout of the contents of the temporary data area to external storage is then scheduled, and the identifier of the sending processor and the virtual address of the temporary data area are sent to the receiving side. Subsequently, in process (2), information regarding the external page corresponding to the transmission data area on the real memory is deleted from the virtual memory management information on the transmission side, and the processing on the transmission side is temporarily terminated.

FIG. 2(a) is an explanatory diagram of an external page rejection method on the sending side. Virtual memory management information 11 is held in the system program IO on the sending side, but if there is an external page 14 valid for the sending data area 12 in the external storage device 13, the above-mentioned process The virtual memory management information 11 including the external page management information is transmitted to the receiving side in step (2), and the information regarding the external page 14 corresponding to the transmission data area 12 is deleted from the virtual memory management information in step (2).

FIG. 2(b) is an explanatory diagram of the movement of transmission data to the temporary data area when there is no valid external page for the transmission data area 12. In the above-mentioned process (2), the data in the transmission data area 12 is moved to the temporary data area 15, and then forced page-out of the contents to the external page 14 on the external storage device 13 is scheduled.

On the reception processor side, the real memory and external page corresponding to the reception buffer area are discarded as process (2), and the state is set immediately after the virtual storage area has been acquired. As will be described later, the receiving side processing program refers to the data required in the actual processing and obtains the data using page fault and page-in logic. If real memory exists at this time, a page fault will not occur, and the actual memory that already exists, ie, garbage, will be referenced.

In addition, if you forcibly perform a page-in from an external storage device while keeping the real memory that exists at the time of data reception, the page-in process will be wasted if the data is not referenced, so this process In (2), the real memory and external pages corresponding to the reception buffer area are discarded.

Next, in process (2), external page management information sent from the sending processor side or a processor identifier and virtual address managed by the system program on the sending processor side are written as virtual memory management information in the receiving buffer area.

FIG. 2(C) is an explanatory diagram of the writing process of external page management information. In the receiving side system program 16, external page management information of the external page 19 in the external storage device 13 is written as the virtual memory management information 17 corresponding to the receiving buffer area 18 in process (2). This completes the processing before data reference on the receiving processor side.

When the receiving processor side needs data transferred from another processor as the program processing progresses, the system program on the receiving processor side accesses the receiving buffer area as a process, but the real memory and external pages corresponding to the receiving buffer area are A page fault occurs because the virtual storage area is rejected, and the system program performs the following processing depending on the contents of the virtual memory management information corresponding to the virtual storage area.

That is, when external page management information is set as virtual memory management information, normal page-in processing of data from the external storage device is performed. Furthermore, if the identifier and virtual address of the sending processor are set as virtual memory management information, a data transfer request is made to the system program of the sending processor.

In this case, the receiving processor is notified of external page management information indicating the external page on the external storage device as a result of forced page-out based on the virtual address of the temporary data area as a process. Page-in processing from the storage device is performed. At this time, if the page-out by process (2) has not been completed, the external page management information will not be transmitted until the page-out is completed.

FIG. 3 is an embodiment of the virtual memory management system of the receiving processor according to the present invention. In this embodiment, the state of virtual memory is divided into five states (1) to (5) and managed. In the present invention, the state of the virtual memory for the reception buffer area is temporarily changed to the state immediately after virtual memory acquisition in (1) through process (2), and then (4) through process (2).
) or transition to state (5) is performed. State (4) corresponds to the case where external page management information is set as virtual memory management information, and state (5) corresponds to the case where data exists in another processor and the identifier of the sending processor and virtual page management information are set as virtual memory management information. Corresponds when the address is set.

FIG. 4 is an example of state transition of each data area. Figure (a) shows the state transition of the transmission data area in the transmission side processor.The state before data transmission is one of (2) to (4), and after data transmission, the above-mentioned process A transition to state (1) is made. However, since the contents of the real memory are moved to the temporary buffer area in the system program by the process (2) performed for the state (2), the state transition of the data itself will be described below as the state transition of the temporary buffer area.

FIG. 4(b) is an explanatory diagram of the state transition of the temporary buffer as a temporary data area within the system program. The state of the real memory attached to the transmission buffer area, that is, the state before the data in the actual data area is stored in the temporary huffer is (1), and the state of the temporary huffer is changed to the actual state of (2) by the above process. Via the state with memory, (4
) has no real memory and transitions to a state with external memory. Note that the temporary huffer is newly acquired for data management.

FIG. 4(C) is an explanatory diagram of the state transition of the receiving buffer in the receiving processor. This figure shows the state transition before and after the receiving side system program writes the virtual memory management information 17 to the receiving buffer area 18 in FIG. 2(C). The initial state of the receive buffer is (1) to (4)
), and the state of the reception buffer transits to the state (4) or (5) via the state immediately after acquiring the virtual storage area in (1) by the above-mentioned processes (1) and (2). Here, the transition to state (5) corresponds to the case where the sending buffer state is (2) in FIG. 4(a), that is, there is no valid external page; )
A transition is made.

FIG. 5 is a format of an embodiment of virtual memory management information. This virtual memory management information also serves as the aforementioned external page management information, and is managed for each virtual memory by the system program within each processor. Its contents include, for example, a flag indicating the presence or absence of the corresponding real memory;
Basically, the page address of the real memory, a flag indicating the presence or absence of external storage, and the external page slot number are used, but in the present invention, the transmission data may exist not on the external storage device but on another processor. , a field indicating it is added at the end.

Furthermore, in the present invention, an external page slot N is provided in order to share the external storage device among multiple processors.

The processor identifier and slot number are used as the

The slot number management method is common to all processors and starts from O for each processor. For example, the slot number O for processor #i is #1.0, and the slot number 0 for processor #j is #j,O.

FIG. 6 is an example of page-in of a data area required on the receiving processor side. In the present invention, as described above, instead of transmitting all the data (only the data area required on the receiving processor side is referenced.
In Figure (a), a processing program 20 on the receiving processor side prepares a data receiving buffer 21 for data reception and requests a system program 22 to receive data. The system program 22 receives and writes only the virtual memory management information corresponding to the virtual storage area of the reception buffer 21 from the transmitting processor through the above-mentioned process (3), thereby basically completing the transmission and reception of data between the processors.

In FIG. 6(b), when data is required in the processing of the processing program 20 on the receiving processor side, a specific data area 23 corresponding to the data receiving buffer 21 is
is referenced, but a page fault occurs because the real memory and external page corresponding to this area have been discarded by the above-mentioned process (2).

Then, page-in 24 from the external storage device to the page referenced in FIG. 6(C) is performed, and the processing of the processing program 20 is completed. Even when processing is completed, no reference is made to the reception buffer area corresponding to data unnecessary for program processing, and no unnecessary data is paged in from the external storage device.

[Effects of the Invention] As explained in detail above, according to the present invention, there is no need to page in the data that has been paged out to the external storage device into the transmission space, thereby improving the usage efficiency of the real memory of the transmitting processor. In addition, since only the data actually required by the processing program on the receiving side is transferred, it greatly contributes to improving data transfer efficiency.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention. FIG. 2 is a diagram explaining the basic concept of the data transfer method of the present invention. FIG. 3 is a diagram showing an embodiment of the virtual memory management method of the receiving processor. The figure shows an example of the state transition of each data area. Figure 5 shows the format of an example of virtual memory management information. Figure 6 shows page-in of the data area required on the receiving processor side. FIG. 7 is a diagram showing a conventional example of a data transfer method in a multiple processor system. 1a, lb...Processor 2...Communication path, 7.13...External storage device, 8a 8b 15...Temporary data area.

Claims (1)

[Claims] 1) A plurality of processors (1a, 1b, . . . ) that share an external storage device (7) and are connected by a communication path (2).
In the system, each of the plurality of processors (1a, 1b, . . . ) is managed by a system program of each processor, and transmits transmission data in a data area in the real memory of each processor to the external storage. Temporary data areas (8a, 8b, . . . for temporary storage before page-out to the device (7))
) and managed by the system program, 1
Corresponding to each of the three or more virtual storage areas, whether the transmission data is on the external storage device (7) or the temporary data area (8a, 8b) managed by a system program of another processor is determined.
,...) for managing the transmitted data by distinguishing between the pages stored in the external storage device (7) on the transmitting processor side. A high-speed data transfer method in a multi-processor system, characterized in that only data required by a receiving processor is received without page-in of transmitted data that has been sent out to a transmission space. 2) When the transmission data on the sending processor side is in an external page on the external storage device (7), the sending processor sends external page management information indicating the external page to the receiving processor, and the sending data information regarding the external page corresponding to the data area on the real memory of the processor is deleted from the virtual memory management information (9a, 9b, . . . ), and the receiving processor deletes the information regarding the external page corresponding to the data area on the real memory of the processor corresponding to the receiving buffer area and the The contents of the external page on the external storage device (7) are discarded, the external page management information sent as virtual memory management information corresponding to the receiving buffer area is written, and the system program of the receiving processor performs actual processing. 2. A page-in process for data from the external storage device (7) is performed according to the contents of the external page management information when the receiving buffer area is accessed as necessary and a page fault occurs. A high-speed data transfer method for multi-processor systems. 3) When the sending data on the sending processor side is not in the external page on the external storage device (7), the sending processor stores the sending data on the real memory in the temporary data area (8).
a, 8b, ...) and schedule a forced pageout of the contents of the temporary data area to the external storage device (7). The virtual memory management information (9a, 9
b, . The processor identifier and virtual address sent as virtual memory management information are written, and when the system program of the receiving processor accesses the receiving buffer area due to actual processing needs and a page fault occurs, the virtual memory is stored in the virtual memory. an external page that requests the sending processor to send data based on the content of the management information, and that the sending processor indicates an external page on the external storage device (7) to which the sending data has been paged out based on the virtual address; 2. A high-speed system in a multi-processor system according to claim 1, characterized in that management information is transmitted, and the receiving processor performs page-in processing of data from the external storage device (7) according to the contents of the external page management information. Data transfer method.