JPH04130668A - thin film transistor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to thin film transistors (T P
T) Regarding equipment.

[Conventional technology]

FIGS. 3A and 3B show structural examples of thin film transistors according to the prior art. This thin film transistor is used in an active matrix circuit as shown in FIG.

FIG. 2 schematically shows a planar structure of an active matrix substrate. On the substrate, gate lines G1, G2,
G3, . . . run, and source lines S1, G2, G3, . Drain pads D11, D12...D21, D corresponding to each intersection
22...D31, D32... are arranged. These drain butts form, for example, drive electrodes of a liquid crystal cell. Source line 5i corresponding to each drain pad
(i=1.2.3...) and gate line Gj (j=
1.2.3...), an insulated gate field effect transistor Tij is arranged between the insulated gate field effect transistor Tij and applies the voltage of the source line Si to the drain pad Dij according to the signal of the gate line Gj.

These insulated gate field effect transistors T11, T1
2...T21, T22...T31, T32... are formed of thin film transistors using amorphous silicon, for example, as shown in FIGS. 3(A) and 3(B).

FIG. 3(A) is a plan view showing the pattern of a part of the area in FIG. 2, and FIG.
- It is a sectional view along VB.

As shown in FIG. 3(B), this thin film transistor consists of a gate electrode 2 on a glass substrate 1, a SiN layer on the gate electrode 2,
, 5iOi or the like, a two-layer amorphous silicon (a-8i) semiconductor layer 4 having high resistivity and low resistivity, source/drain electrodes 5.6, and train pads 7. Gate electrode 2 is connected to gate lines G1, G2, G3
...is connected to one of the... Further, the source electrode 5 is connected to one of the source lines S1, G2, G3, . . . .

FIG. 4 shows the peripheral portion of this thin film transistor device in detail. In the central portion 11 of the thin film transistor device 10, an active matrix circuit as described in FIGS. 2 and 3 is provided.

The gate lines G1, G2, G3... are short-circuited by a gate shorting line 13, and the source lines S1, G2
, G3 . . . are short-circuited by a source short-circuit line 14. Further, the gate short circuit line 13 and the source short circuit line 14 are short-circuited by a gate/source short circuit line 15. This is because if both of them are in a floating state, charge accumulation occurs due to static electricity, and a short circuit between the source electrode and gate electrode (hereinafter referred to as S-G short) occurs in a part that should be insulated. This is to prevent it.

[Problem to be solved by the invention]

In such a thin film transistor device, it is necessary to check whether an S-G short circuit has occurred during the substrate manufacturing process, and if a defect is found, it must be corrected. but,
Since the gate short-circuit line 13 and the source short-circuit line 14 are short-circuited by the gate/source short-circuit line 15, it is only possible to check for an S-G short in this state. Therefore, by cutting the gate/source short line 15 with a laser or the like, the source lines S1, G2, . . . and the gate lines G1, G2, .
I was doing a G short check.

However, after the S-G short check, the gate line G
1, G2, . . . and the source lines s1, G2, .

In order to prevent a new S-G short from occurring, it is necessary to reconnect the cut portion of the gate/source short circuit line 15 in the next process, which complicates the process. Further, even if the cut portion of the gate/source short line 15 is reconnected in this manner, there is a possibility that an S-G short may occur between the S-G short check and the connection of the cut portion.

The purpose of the present invention is to prevent new SG shorts from occurring due to static electricity after an SG short check, and to reconnect the gate/source after an SG short check in a simple process. An object of the present invention is to provide a thin film transistor device that can perform the following steps.

[Means to solve the problem]

According to the thin film transistor device of the present invention, the first connection line short-circuits the gate electrode and the second connection line short-circuits the source electrode.
and a fourth connection line connected to the first connection line, and a fourth connection line connected to the second connection line and intersecting the fourth connection line. a fifth connection line having an intersection;
An insulating film is provided at this intersection and insulates the fourth connection line and the fifth connection line.

[Effect]

Initially, the gate electrode and the source electrode are short-circuited by the third connection line, thereby preventing the S-G short circuit from occurring due to static electricity or the like. By cutting the third connection line, an S-G short check can be performed.

After the S-G short check, for example, a laser can be irradiated to the intersection of the fourth connection line and the fifth connection line to short-circuit the fourth connection line and the fifth connection line at this intersection. can. By short-circuiting the fourth connection line and the fifth connection line, the gate electrode and the source electrode are short-circuited again, and generation of S-G short due to static electricity or the like is prevented.

〔Example〕

FIG. 1 is a plan view showing a pattern around a substrate of a thin film transistor device according to an embodiment of the present invention. In FIG. 1, an active matrix circuit as described in FIGS. 2 and 3 is provided in a central portion 21 of a thin film transistor device 20. As shown in FIG. Gate line G1, G2,
G3... is gate short line (first connection line) 2
3, and the source lines S1, S2, S
3... is the source short circuit line (second connection line) 24
shorted by. Further, the gate short circuit line 23 and the source short circuit line 24 are connected to the gate/source short circuit line (
It is short-circuited by the third connection line) 25. The above configuration is similar to the conventional example shown in FIG.

Gate short circuit line 23 to gate/source short circuit line 2
5, gate correction line (fourth connection line) 2
6 is extended. Three source correction lines (fifth connection line) 27, 27', 2 from the source short line 24
7' is extended. Insulating films 28, 28' and 28' are provided at the intersections of the gate correction line 26 and the source correction lines 27, 27' and 27', respectively. The gate correction line 26 and the source correction line 27.27' are formed at each intersection by the insulating films 28.28' and 28'.
, 27'.

The pattern of such a thin film transistor device 20 can be formed, for example, as follows.

A conductive film is formed on a glass substrate, and a gate electrode is patterned. At the same time, gate lines G1, G2, G3...
・Gate correction line 2 along with gate short circuit line 23 etc.
Pattern 6. Next, place SiN on top of the gate electrode.
Yo, a gate insulating film of 510M or the like is formed. At the same time as the gate insulating film is formed, an insulating film 2 is formed on the gate correction line 26.
8.2g', 28' is formed. Two layers of high resistivity and low resistivity amorphous silicon (a-
8i) Patterning the semiconductor layer into an island shape.

Furthermore, an electrode metal layer is formed and source/drain electrodes are patterned. At the same time, source lines S1, S2,
The source correction lines 27, 27', 27' are patterned together with S3..., the source short circuit line 24, etc. Next, a transparent conductive film is formed and a drain pad is patterned. Finally, the upper part of the semiconductor layer (low resistivity layer) is etched to form a channel.

In the thin film transistor device 20 of FIG. 1, the gate electrode and source electrode of each transistor are short-circuited by a gate/source shorting line 25. Therefore, occurrence of S-G short circuit due to static electricity or the like is prevented.

When performing the SG short check, for example, a laser is irradiated to cut the AA' portion of the gate/source short circuit line 25 to insulate the gate/source. After the S-G short check, for example, a laser is irradiated to a point B at the intersection of the gate correction line 26 and the source correction line 27' to destroy the insulating film and short-circuit the upper and lower lines 26 and 27'. As a result, the gate/source can be short-circuited again.

Furthermore, when performing the S-G short check again, the source correction line 27' may be similarly cut at the c-c' portion with a laser, and after the check is completed, the laser may be irradiated to the intersection point.

By forming a plurality of source correction lines 27 or gate correction lines 26 in this way, the SG short check can be performed multiple times. Since S-G is always short-circuited except during S-G short check, there is no S-G short circuit or fluctuation in TPT characteristics due to static electricity.

Note that the shape, number, etc. of the gate correction line 26 and the source correction line 27 are arbitrary. It is sufficient that they are in an insulated state with the insulating film 28 interposed therebetween. In addition, in the latter half of the process, the gate/source short circuit line 25 is cut, but the gate correction line 26 and the source correction line 27 are cut from the cut portion.
is preferably formed on the outside.

Further, there are no particular restrictions on the shape or size of the pattern of these correction lines, and since they are located outside the display area, there is no need to newly create a photomask or the like.

For example, a pattern can be easily formed using masking tape or the like.

The present invention can be applied to liquid crystal display devices (LCD) and electroluminescence devices (EL) in general using thin film transistors (TPT).

Although the present invention has been described above along with examples, the present invention is not limited to these. For example, it will be obvious to those skilled in the art that various changes, improvements, combinations, etc. are possible.

〔Effect of the invention〕

As explained above, according to the present invention, even if the gate/source is once insulated for S-G short check, the intersection of the gate correction line and the source correction line can be irradiated with a laser. Since the gate/source can be easily shorted, new SG shorts due to static electricity after the SG short check can be prevented from occurring.

In addition, S-G short check and laser gate/
All cutting and shorting between sources can be done on one bench. Therefore, the influence of static electricity generated when setting and resetting the device board on the workbench is eliminated, and the occurrence of S-G short circuit is prevented.

Furthermore, shorting between the gate and source after the SG short check is very easy.

[Brief explanation of drawings]

FIG. 1 is a plan view showing an embodiment of the present invention, FIG. 2 is a diagram schematically showing an active matrix circuit, and FIGS. 3 (A) and (B) are parts of a conventional active matrix thin film transistor. Plan view and cross-sectional view thereof FIG. 4 is a plan view showing the peripheral portion of a substrate of a conventional thin film transistor device. In the figure, 1 substrate 2 gate electrode 3 gate insulating film 4 semiconductor film 5 source electrode 6 drain electrode T11-T13, T21-T23, T31-T33, T2O, T41 insulated gate field effect transistor D1-D3, D11-D13, D21 ~23, D31~
D33 Drain pads 01-G3, G10, Gll Gate lines S1-S3, S10. S11 Source line 13.23 Gate short line 14.24 Source short line 15.25 Gate/source short line Gate correction line 27. 27'27' Source correction line 28. 28'28' Insulating film

Claims (1)

[Claims] (1) In a thin film transistor device having a plurality of thin film transistors formed by stacking a gate electrode layer, a gate insulating film, a channel layer, and a source/drain electrode layer on a substrate, each gate electrode of the plurality of thin film transistors is short-circuited. a first connection line; a second connection line that short-circuits each source electrode of the plurality of thin film transistors; a third connection line that short-circuits the first connection line and the second connection line; a fourth connection line connected to the first connection line; a fifth connection line connected to the second connection line and having an intersection that intersects the fourth connection line; and a fifth connection line provided at the intersection. and an insulating film that insulates the fourth connection line and the fifth connection line.