JPH04124700A - Method for adjusting display device - Google Patents

Abstract

PURPOSE:To position and display data given from the outside at a desired position on a display means by measuring the start of a video signal for adjusting a position in a vertical direction on a screen or vertical time till completion time and positioning the screen of the display means based on the measured time. CONSTITUTION:Horizontal time WT from the fall of a horizontal synchronizing signal HS till the start of the data in one horizontal operation period is counted so as to obtain a value M corresponding to a value N, then horizontal time WH corresponding to the value M is measured. The time WT corresponding to the value N corresponds to the up-and-down positions r2 on an effective screen 24 on the screen 23 of a liquid crystal display means 17 and the horizontal time WH corresponding to the value M corresponds to a space r1. The values N and M are measured in a processing circuit 26 and given to a control circuit 19. Therefore, in the case of displaying the data stored in a frame memory 18 by the use of the means 17, the spaces r1 and r2 are decided based on the values N and M so that the effective screen 24 may be positioned in the center of the screen 23 of the means 17.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for adjusting a display device, and more particularly, for displaying output data of a personal computer or the like by means of a cathode ray tube display means or alternatively by means of a liquid crystal display means. The present invention relates to a method of adjusting a display device that can be connected interchangeably to perform display.

Prior Art A typical prior art is shown in FIG. A signal source 1 such as a personal computer derives a video signal containing the data to a line 2, a vertical synchronizing signal VS to a line 3, and a horizontal synchronizing signal H3 to a line 4, and outputs a video signal containing the data to a line 4, and a cathode ray tube display means. 5, and in order to be able to display this data on the liquid crystal display means 6, the screen data is stored in the frame memory 7 as disclosed in, for example, Japanese Patent Laid-Open No. 62-92995. Once written, the data stored in the frame memory 7 is read out in synchronization with the oscillation diagram 18 consisting of a phase lock loop 1 frequency synthesizer and displayed on the liquid crystal display means 6.

With reference to FIGS. 8 and 9, the prior art will be described and the present invention will be described in detail. The liquid crystal display means 6 is
#! It is assumed that the configuration has picture elements of 640×480 vertical dots. The data derived from the signal source 1 to the line 2 is data for displaying each dot of the cathode ray tube display means 5 and the liquid crystal display means 6, and the period of the basic dot clock is Tck, and the data is derived to the line 4. When it is assumed that the horizontal synchronizing signal HS has a period TH of FIG. After the time WH (-M-Tck, where M is a natural number) from the fall of , there is the first data, and the time 640
The data ends after Tck. Therefore, the blank signal shown in FIG. 8 (3) indicating the valid period of data for the horizontal synchronizing signal HS is set at a time WH from the falling edge of the horizontal synchronizing signal H3.
By later setting it to a high level as shown in FIG. 8 (3) and then setting it to a low level after the time B640 Means 6 allows positioning of the screen in the horizontal direction, that is, in the left and right directions.

The vertical synchronization signal has a period TV as shown in FIG. 9 (1).
The horizontal synchronizing signal is as shown in FIG. 9 (2). As shown in Figure 9 (3), the data is period 2 (-4
The data is generated at 80X Tt(), the first data exists after a time WV (=NTH1, where N is a natural number) from the fall of the vertical synchronization signal, and the data ends at 480XTHf&.

Therefore, with respect to the vertical synchronizing signal VS, the blank signal shown in Figure 9 (4) indicating the valid period of data is set to high level after a time WV from the fall of the vertical synchronizing signal, and then 48
By setting it to low level after 0 x TH,
It can indicate the validity period of data. Using this blank signal, the screen on the liquid crystal display means 6 can be positioned vertically.

In order to display a video signal on the liquid crystal display means 6, in the vertical direction, the blank signal shown in FIG.
It is necessary to set the video signal after a time WV has elapsed since the fall of the vertical synchronization signal derived from the vertical synchronization signal as the display rM start position of the iI image on the liquid crystal display means 6. Otherwise, the image displayed by the liquid crystal display means 6 will be displayed shifted to the top or bottom of the screen of the liquid crystal display means 6. Similarly, if the blank signal shown in FIG. , it is necessary to match the valid period of data on the liquid crystal display means 6. In other words, the video signal from the signal source 1 is displayed at the desired position on the screen of the liquid crystal display means 6 at the time WH has elapsed since the fall of the horizontal synchronization signal. ! must be displayed. Otherwise, the image displayed on the liquid crystal display means 6 will be displayed shifted to the left or right with respect to the screen.

The period and timing of the horizontal synchronization signal, vertical synchronization signal, and data signal from the computer, which is signal source 1, are as follows:
Varies depending on computer type and operating mode. Therefore, for example, when different signals from the signal sources 1, which are a plurality of computers, are displayed on the liquid crystal display means 6, a blank signal in the vertical direction shown in FIG. In order to make the horizontal blank signal shown in FIG.
It is necessary to set M correctly.

In the prior art, as shown in FIG. 7, each signal from the signal source 1, which is a usable computer, is checked in advance and the value N is stored in the memory 8.

The processing circuit 9 examines the period and polarity of the vertical synchronization signal VS and horizontal synchronization signal (S) input from lines 3 and 4, and supplies the results to the control circuit 10. Check and determine what type of computer the signal source 1 is and what operating mode it is in, select and read the corresponding value N from the memory 8, and apply it to the control port I@10. The oscillation circuit 8 reproduces the basic dot clock from the input horizontal synchronization signal H3.The data stored in the frame memory 7 is read out at a timing suitable for display on the liquid crystal display means 6. be done.

Problems to be Solved by the Invention In such prior art, it is difficult to store values N corresponding to all types of computers that are signal sources 1 in the memory 8, and when a new type of computer is connected. In this case, an appropriate value N cannot be set in the control circuit 10.

Means for Solving the Problems The present invention receives a position adjustment video signal including at least a corner of one screen and vertical and horizontal synchronization signals synchronized with the position adjustment video signal from the outside, and performs position adjustment. This is a method for adjusting a display device, characterized in that the vertical time WV from the start or end of the vertical direction on the screen of the video signal for use is measured, and the screen of the display means is positioned based on this time Wv. .

Operation According to the present invention, a position adjustment video signal and vertical and horizontal synchronization signals synchronized therewith are received from an external signal source such as a microcomputer, and this position adjustment video signal has data. The position adjustment video signal may be a horizontal line that spans the entire area to be displayed or the entire length of the top portion where the data is displayed, and includes at least the corners. This position adjustment video signal is a video signal for one screen, which is one frame or one field. By using such a position adjustment video signal and a vertical synchronization signal and a horizontal synchronization signal synchronized therewith, the vertical time WV in the vertical direction on the screen of the position adjustment video signal, that is, up to the start or end of the vertical direction, is determined. The screen of a display means such as a liquid crystal display means is positioned based on the time WV thus measured. In this way, it is possible to display data, for example in a central position, on a display means such as a liquid crystal display means.

Note that by measuring the vertical time WV and horizontal time WH mentioned above,
The positioning may be performed in the vertical direction and the horizontal direction on the screen of the display means.

Embodiment FIG. 1 is an overall block diagram of an embodiment of the present invention. A position adjustment video signal and a video signal of data to be displayed are led out to a line 13 from a signal source 12 such as a microcomputer, and a vertical synchronization signal VS synchronized with the video signal is led out to a line 14. A horizontal synchronization signal H3 synchronized with the video signal is led out to line 15. The data from this signal source 12 is transmitted to the cathode ray tube display means 1.
Displayed by 6. The data displayed by this cathode ray tube 16 can also be displayed by liquid crystal display means 17. The data contained in the video signal for one screen, which is one frame or one field, from the signal source 12 is stored in the frame memory]8 by the control circuit 19, and is transferred from the signal source 12 to the lines 13 to 12. It is stored at the timing of the signal via 15. This frame memory 1
The data stored in 8 is generated by an oscillation circuit 2 realized by a phase-locked loop frequency synthesizer or the like.
It can be displayed on the liquid crystal display means 17 in synchronization with the output of zero. As mentioned above, this liquid crystal display means 17 has picture elements of 640 horizontal dots x 480 vertical dots, and a reference dot clock synchronized with each picture element is connected to the oscillation circuit 2.
Generated from 0.

FIG. 2(1) is a front view of the screen 21 of the cathode ray tube 16 on which data from the signal source 12 is displayed.

The effective screen 22 on which data is displayed is tank W1×tiIW2, and 11 on the left and right of the screen 21 of the cathode ray tube display means 16.
．． The effective screen 22 is displayed at the center of the screen 21, with Jl-13,12=14, and the space is 12.14 above and below. Such an effective screen 22 is displayed on the liquid crystal display means 17 as shown in FIG. 2 (2).
In order to display the screen 23 at a desired position as indicated by reference numeral 24, for example at the center position,
Left and right spacing rl, r3 and vertical spacing r2. r4 is determined.

A program for the operation of the processing circuit 26 is stored in the memory 40 .

FIG. 3 is a flowchart for explaining the operation of the embodiment shown in FIG. Step j1 to step J
2, the manual operation switch 25 is operated, and the output of the switch 25 is given to the processing circuit 26. This processing circuit 26 provides a control signal C0NT via line 27 to a vertical direction detection circuit 28 in step j3.

FIG. 4 is a block diagram showing a specific configuration of the vertical direction detection circuit 28. The control signal C0NT derived from the processing circuit 26 on the line 27 is a signal that is at a high level for a certain period of time, and during the high level period of this control signal C0NT, the fifth The period is set to be longer than one cycle of the vertical synchronization signal VS shown in FIG. 2. FIG. 5(3) is a signal d shown on line 29 of the vertical direction detection circuit 28 shown in FIG. The stored contents of the circuit 31 are set as shown in FIG. 5(4).

The counter 30 is connected to a line 32 to which an input terminal ET is connected.
When a high level signal a is input to the line 33,
The outputs of the outputs Q1 to Qn are counted up at the rise of the signal applied to the input terminal CK via the input terminal CK. When the signal input to the clear terminal CL is at low level, the outputs Q1 to Qn all become low level and cleared at the rise of the signal applied to the input terminal CK.

The latch circuit 31 receives the outputs Q1 to Qn of the counter 30,
The signal d applied via line 29 to input terminal CKI
At the rising edge of , the signals at the input terminals D1 to Dn are output to the output terminals Qll to Qln.

The D-type flip-flops Fl, F2 have clock input terminals CK2. When a signal is applied to CK3, the signal from the data input terminal is held and output to the output terminal Q. When a low level signal is applied to the clear input terminal CLI, the output Q goes low and is cleared to a bell. flip flop F
The data input terminal 1 is connected to +5 which is at high level.

Further, data is inputted from the signal source 12 via the line 13 to the clock input terminal CK2. This data is a position adjustment video signal at the time of position adjustment, and this position adjustment video signal is applied to the entire effective screen 22 of the screen 21 of the cathode ray tube display means 16 (see FIG. 2 (1) above). This signal is at a high level throughout and is shown in FIG. 6(3).

Clear terminal CL of flip-flop F1 from line 14
A vertical synchronizing signal is derived from I, and this vertical synchronizing signal has the waveform shown in FIG. 6(1).

The horizontal synchronizing signal given to line 15 is as shown in Fig. 6 (2).
It is as shown in FIG.
Given to K3.

The signal a from the inverting output terminal Q of the flip-flop F1 is as shown in FIG. The signal from the output terminal Q of the flip-flop F1 has a waveform shown in FIG. 6(5), and is applied to the data input terminal of the next flip-flop F2. The signal C at the output terminal Q of this flip-flop F2 is as shown in FIG.
The signal is input to the NOR gate 35. The output of the NOR gate 35 is applied to an AND gate 36, and a control signal C0NT is input to the AND gate 36 via a line 27, which remains at a high level during this position adjustment. A
The signal d derived from the ND gate 36 to the line 29 is
It is shown in the above-mentioned FIG. 6 (7), and is applied to the clear input terminal CL of the counter 30 via the inverting circuit 38,
In this way, the counter 30 counts a count value N corresponding to the time from the fall of the vertical synchronizing signal S to the start of data of the position adjustment video signal. The counted value of this counter 30 is as shown in FIG. 6 (8). The latch circuit 31, as shown in FIG. 6(9),
A count value of 0 is latched and stored and provided to the processing circuit 26 from line 37. In this way, step j in Figure 3
4, the value N is measured.

Furthermore, with a similar configuration, the horizontal time WH from the fall of the horizontal synchronizing signal HS to the start of data during the -horizontal operation period is counted, and a value M corresponding to the above-mentioned value N is obtained; The horizontal time W H corresponding to the value M is measured. The time WT corresponding to the above-mentioned value N is the effective screen 2 on the screen 23 of the liquid crystal display means 17 in FIG. 2 (2).
The horizontal time wH corresponding to the upper and lower positions r2 of 4 and the value M corresponds to the interval r1. Such a value N,
M is measured in the processing circuit 26 and given to the control circuit 19 realized by a large-scale integrated circuit or the like. Therefore, when displaying the data stored in the frame memory 18 on the liquid crystal display means 17, the values N, M
Based on this, the effective screen 24 is the screen 23 of the liquid crystal display means 17.
The intervals rl and r2 are determined so as to be at, for example, the center position.

In the above embodiment, the position adjustment video signal is the effective screen 2.
2.24, but in another embodiment of the present invention, such a position adjustment video signal is applied to the corner of the effective screen 22 shown in FIG. 2(1). P] to P4, or alternatively, the most two corners P1. ．． Horizontal line 1-1 connecting with P2
It may be 0, etc. As another embodiment of the present invention, when measuring the vertical time WV or the horizontal time "H",
The time up to the end of the right end of the effective screen 22 in FIG. 2(1) may be measured.

In another embodiment of the invention, only the value N for the vertical spacing r2 is measured and the horizontal spacing r1
The measurement of the value M corresponding to may be omitted.

Effects of the Invention As described above, according to the present invention, video signals received from the outside with different periods and vertical and horizontal synchronization signals synchronized with each other are received, and data given from the outside is processed. can be positioned at a desired position on the display means and displayed, and such an adjustment can be automatically performed, which is an excellent effect. This makes it possible to receive all kinds of external signals and display them on the display means without requiring the memory 8 described in connection with FIG. 7 above.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a display screen 21 of a cathode ray tube display means 16 and a liquid crystal display means 17.
．． 23, FIG. 3 is a flowchart for explaining the operation of the processing circuit 26, and FIG. 4 is a front view of the vertical direction detection circuit 2.
FIG. 5 is a waveform diagram for explaining the general operation of the vertical direction detection circuit 28, and FIG. 6 is a waveform diagram for explaining the operation of the vertical direction detection circuit 28. 7 is a block diagram of the prior art, and FIGS. 8 and 9 are diagrams for explaining in detail the prior art and the present invention shown in FIG. 7. 12... Signal source, 16... Cathode ray tube display means, 17
...Liquid crystal display means, 18...Frame memory, 19.
...Control circuit, 20..Oscillation circuit, 25..Manual operation switch, 26..Processing circuit, 28..Vertical direction detection circuit, 40.Memory agent Patent attorney Number of strokes Figure diagram

Claims (1)

[Claims] A position adjustment video signal including at least a corner of one screen;
Vertical and horizontal synchronization signals synchronized with the position adjustment video signal are received from the outside, and the vertical time WV from the start or end of the position adjustment video signal on the screen in the vertical direction is measured. A method for adjusting a display device, comprising positioning a screen of a display means based on the method.