JPH04100248A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPH04100248A JPH04100248A JP21841890A JP21841890A JPH04100248A JP H04100248 A JPH04100248 A JP H04100248A JP 21841890 A JP21841890 A JP 21841890A JP 21841890 A JP21841890 A JP 21841890A JP H04100248 A JPH04100248 A JP H04100248A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive
- chip
- melting point
- semiconductor device
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 7
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000000853 adhesive Substances 0.000 claims description 21
- 230000001070 adhesive effect Effects 0.000 claims description 21
- 238000002844 melting Methods 0.000 claims description 10
- 230000008018 melting Effects 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 8
- 239000000843 powder Substances 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 150000008065 acid anhydrides Chemical class 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 150000001412 amines Chemical class 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920003986 novolac Polymers 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、プラスチックパッケージの組立工程に使用さ
れる接着剤に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an adhesive used in the assembly process of plastic packages.
［発明の概要］
本発明は、リードフレームをチップに固定する際に、使
用する接着剤を板状の低融点剤にすることを特徴とする
。[Summary of the Invention] The present invention is characterized in that the adhesive used in fixing the lead frame to the chip is a plate-shaped low melting point adhesive.
［従来の技術１
第２図（ａ）、 （ｂ）は、従来の技術による方法を
示したものであり、３はリードフレーム、４はデイスペ
ンサー（吐出器）、５はスタンプ装置、６は接着剤であ
る。[Prior art 1] Figures 2(a) and 2(b) show a method according to the prior art, where 3 is a lead frame, 4 is a dispenser, 5 is a stamp device, and 6 is a stamp device. It is an adhesive.
従来、第２図（ａ）に示したように、デイスペンサー（
吐出器）を用いて接着剤をリードフレームに定量吐出さ
せ塗布する方法、あるいは、第２図（ｂ）に示したよう
に、一定の厚さに引き伸ばされた接着剤をスタンプ装置
を用いて転写する方法が主流であった。Conventionally, as shown in Fig. 2(a), a dispenser (
Alternatively, as shown in Figure 2(b), adhesive is stretched to a certain thickness and transferred using a stamp device. The mainstream method was to
［発明が解決しようとする課題］
しかし、従来の方法では、吐出器の大きさが必ずしもチ
ップサイズに合致しないため、チップ外周まで十分接着
剤が付着しないことや、吐出器から吐出される接着剤量
のバラツキによって、ワードフレームとチップに気泡が
発生する不具合があった。これらの不具合は信頼性上に
も問題があり、インナーワード部とチップを電気的に導
通させるワイヤーボンディング時のボンディングオーブ
ン、あるいは、チップズレと言った問題が起こっていた
。また、発生する気泡によってパッケージの熱抵抗値が
増加し、ボンディング部の合金層が進みすぎるという不
具合が存在していた。[Problems to be Solved by the Invention] However, in the conventional method, the size of the dispenser does not necessarily match the chip size, so the adhesive does not adhere to the outer periphery of the chip sufficiently, and the adhesive dispensed from the dispenser does not necessarily match the chip size. There was a problem where bubbles were generated in the word frame and chip due to variations in the amount. These defects also caused problems in terms of reliability, such as problems such as bonding oven or chip misalignment during wire bonding that electrically connects the inner word portion and the chip. In addition, the thermal resistance of the package increases due to the bubbles generated, and the alloy layer at the bonding portion advances too much.
そこで、本発明の目的とするところは、従来技術のよう
に液状の接着剤を塗布するのではなく、あらかじめ決め
られた大きさと厚さに加工された板状接着剤にすること
によって、工程内のバラツキによって発生する不具合を
起こすことなく、均一な品質提供を可能とするものであ
る。Therefore, the purpose of the present invention is not to apply a liquid adhesive as in the prior art, but to create a plate-like adhesive that is processed to a predetermined size and thickness. This makes it possible to provide uniform quality without causing problems caused by variations in quality.
［課題を解決するための手段］
本発明の半導体装置製造方法は、リードフレームとチッ
プを固定する接着剤を、サイズの加工が容易な板状の低
融点剤にすることを特徴とするものである。[Means for Solving the Problems] The semiconductor device manufacturing method of the present invention is characterized in that the adhesive for fixing the lead frame and the chip is a plate-shaped low melting point agent that can be easily processed to size. be.
［実施例］
第１図は、本発明の実施例における低融点接着剤の側面
図であり、１は半導体チップ、２は本発明の低融点接着
剤、３はリードフレームである。[Example] FIG. 1 is a side view of a low melting point adhesive in an example of the present invention, in which 1 is a semiconductor chip, 2 is the low melting point adhesive of the present invention, and 3 is a lead frame.
以下、半導体装置の製造工程を説明していく。The manufacturing process of the semiconductor device will be explained below.
まずベースレジンとして、フェノールやノボラックエポ
キシなどのプラスチックの一種であるエポキシ主剤を用
意し、これを小さく粉砕する。二の粉砕したエポキシ主
剤に導電性を持たせるため銀や金の粉末フィラーを混入
させる。この時、粉末フィラーの粒径は可能な限り均一
にし、製造過程での偏りを少なくする。次に、融点を降
下させるためビスマスなどの金属粉末を入れ、この粉末
が凝集しないように注意する。さらに、硬化剤としてア
ミンや酸無水物などをベースレジンの５％程度混ぜ合わ
せ、３００°Ｃ以上に加熱、溶解し粉末を均一のものに
する。この後、室温にまで冷却させ、加工性の優れた個
体状の接着剤にする。以上の方法によって低融点を有す
る板状の接着剤が形成される。また実使用時には、板状
に加工された本発明品をチップ真下に位置合わせをし、
上下から加熱することにより接着剤を溶かし固定させる
ことができる。さらに、本発明はチップサイズやパッケ
ージの厚みに応じて、適切な大きさ、厚さへと加工する
ことが可能であり、品質上バラツキの少ないものにする
ことができる。First, an epoxy base resin, which is a type of plastic such as phenol or novolac epoxy, is prepared and ground into small pieces. Second, a powder filler of silver or gold is mixed into the pulverized epoxy base material to make it conductive. At this time, the particle size of the powder filler is made as uniform as possible to reduce deviation during the manufacturing process. Next, metal powder such as bismuth is added to lower the melting point, and care is taken to prevent the powder from agglomerating. Furthermore, about 5% of the base resin is mixed with amine, acid anhydride, etc. as a hardening agent, and the mixture is heated to over 300°C to dissolve and form a uniform powder. Thereafter, it is cooled to room temperature to form a solid adhesive with excellent workability. A plate-shaped adhesive having a low melting point is formed by the above method. In addition, during actual use, the plate-shaped product of the present invention is positioned directly below the chip.
The adhesive can be melted and fixed by heating from above and below. Further, according to the present invention, it is possible to process the chip to an appropriate size and thickness depending on the chip size and the thickness of the package, and it is possible to make the product with little variation in quality.
［発明の効果］
以上述べたように、本発明によればリードフレームとチ
ップを接合する接着剤を低融点でかつ板状のものにする
ことによって、均一な大きさとヌレ性さらに厚さにする
ことが可能となり、信頼性と組立工程での歩留まり向上
に効果がある。さらに低融点、速乾性を実現することに
より工程のインライン化が可能となる。[Effects of the Invention] As described above, according to the present invention, the adhesive for bonding the lead frame and chip is made of a plate-like adhesive with a low melting point, thereby achieving uniform size, wettability, and thickness. This makes it possible to improve reliability and yield in the assembly process. Furthermore, by achieving a low melting point and quick drying properties, in-line processing becomes possible.
第１図は、本発明の実施例における側面図第２図（ａ）
、第２図（ｂ）は従来の半導体装置の側面図
晃１図
半導体チップ
低融点板状接着剤
リードフレーム
定量吐出装置
転写スタンプ装置
従来の接着剤
υ１（久）
１東２聰（Ｌ）FIG. 1 is a side view of an embodiment of the present invention.FIG. 2(a)
, FIG. 2(b) is a side view of a conventional semiconductor device. Semiconductor chip Low melting point plate adhesive Lead frame Quantitative dispensing device Transfer stamp device Conventional adhesive υ1 (Ku) 1 To 2 So (L)
Claims (1)
フレームとチップを固定する接着剤を、板状の低融点剤
にすることを特徴とする半導体装置の製造方法。A method for manufacturing a semiconductor device, which comprises using a plate-shaped low melting point adhesive as an adhesive for fixing a lead frame and a chip in a plastic package assembly process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21841890A JPH04100248A (en) | 1990-08-20 | 1990-08-20 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21841890A JPH04100248A (en) | 1990-08-20 | 1990-08-20 | Manufacturing method of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04100248A true JPH04100248A (en) | 1992-04-02 |
Family
ID=16719604
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21841890A Pending JPH04100248A (en) | 1990-08-20 | 1990-08-20 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04100248A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6458236B2 (en) * | 1997-02-19 | 2002-10-01 | Alps Elctric Co., Ltd. | Apparatus and method for mounting electrical parts |
-
1990
- 1990-08-20 JP JP21841890A patent/JPH04100248A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6458236B2 (en) * | 1997-02-19 | 2002-10-01 | Alps Elctric Co., Ltd. | Apparatus and method for mounting electrical parts |
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