JPH0392046U - - Google Patents
Info
- Publication number
- JPH0392046U JPH0392046U JP15085389U JP15085389U JPH0392046U JP H0392046 U JPH0392046 U JP H0392046U JP 15085389 U JP15085389 U JP 15085389U JP 15085389 U JP15085389 U JP 15085389U JP H0392046 U JPH0392046 U JP H0392046U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- chip
- bonding pad
- chip component
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図は本考案による混成集積回路基板の構造
を示す斜視図、第２図は前記混成集積回路基板の
断面を示す断面図、第３図は前記混成集積回路基
板においてチツプコートが施されていない状態の
内部構造を示す斜視図、そして、第４図及び第５
図は従来技術を説明するための図である。
１１……回路基板、１２……ボンデイングパツ
ド、１３……チツプ部品、１４……ワイヤー配線
、１５……凹状部、１６……半田付ランド、２０
……チツプコート。
FIG. 1 is a perspective view showing the structure of the hybrid integrated circuit board according to the present invention, FIG. 2 is a sectional view showing the cross section of the hybrid integrated circuit board, and FIG. 3 is the hybrid integrated circuit board without chip coating. A perspective view showing the internal structure of the state, and FIGS. 4 and 5.
The figure is a diagram for explaining the prior art. DESCRIPTION OF SYMBOLS 11... Circuit board, 12... Bonding pad, 13... Chip component, 14... Wire wiring, 15... Concave portion, 16... Soldering land, 20
... Chip coat.
Claims (1)
該チツプ部品の周囲の回路基板上にボンデイング
パツドが配置され、前記チツプ部品の電極とボン
デイングパツドとがワイヤー配線により結線され
、更に、前記チツプ部品及びその結線部に絶縁性
のチツプコートが施された混成集積回路基板にお
いて、少なくとも前記ボンデイングパツドのワイ
ヤー配線により結線される部分を含む回路基板上
の領域に凹状部が形成され、該凹状部の中に前記
チツプコートが施されたことを特徴とする混成集
積回路基板。 As chip components are mounted on the circuit board,
A bonding pad is arranged on the circuit board around the chip component, the electrode of the chip component and the bonding pad are connected by wire wiring, and an insulating chip coat is applied to the chip component and its connection portion. In the hybrid integrated circuit board according to the present invention, a recessed portion is formed in a region on the circuit board including at least a portion connected by the wire wiring of the bonding pad, and the chip coat is applied in the recessed portion. Hybrid integrated circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15085389U JPH0392046U (en) | 1989-12-30 | 1989-12-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15085389U JPH0392046U (en) | 1989-12-30 | 1989-12-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0392046U true JPH0392046U (en) | 1991-09-19 |
Family
ID=31697185
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15085389U Pending JPH0392046U (en) | 1989-12-30 | 1989-12-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0392046U (en) |
-
1989
- 1989-12-30 JP JP15085389U patent/JPH0392046U/ja active Pending