JPH0378470A - Thyristor converter - Google Patents

Abstract

PURPOSE:To improve accuracy of current detection and to stabilize the operation by additionally arranging a first-order lag circuit at the output of a current detector for a thyristor converter. CONSTITUTION:A first-order lag circuit is formed of a resistor RF and a capacitor CF and connected between the output terminal of a detecting resistor RS and the input terminal of an arithmetic unit AP. When the time constant of the first-order lag circuit (TF=CF.RF) is set about five times of overlapping interval (u), output signal CFB2 as shown by a dot line is produced and the maximum drop in the overlapping interval (u) is about 0.95Es, which can be substantially neglected. In other words, an output signal CFB2 proportional accurately to the DC current ID can be obtained. Since readjustment is not required for different power supply, when the DC current ID is set, a stabilized thyristor converter can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thyristor converter that has a current detector with improved current detection f11 degrees and operates stably.

[Conventional technology]

FIG. 3 is a circuit diagram showing a conventional thyristor converter,
In the figure, the thyristor converter is connected to the AC power supply, and the thyristors TH1 to TH4 supply DC output current to the field winding of the DC tiller DOM, etc., and the current It consists of a detector 12) and a control circuit (3) based on the output current. In addition, in the current detector (l!1), CT is an AC current transformer (hereinafter referred to as % current transformer) that detects the magnitude of the output current, and 9th is a diode stack that rectifies the output current of this current transformer CT. R8 is a detection resistor that detects the output current of this diode stack DB.

The output signal 01FB of this detection resistor is supplied to the control circuit +31 as a control feedback signal. Furthermore, in the control circuit (3), Ti1l is a reference signal device that sets the current reference ORgF, and P compares the current reference cngr with the control feedback signal OFB.

The arithmetic unit GP for amplifying calculations is a gate pulse generator that generates gate signals for the thyristors TH1 to TH4 based on the output of the arithmetic unit AP.

Next, the operation will be explained. First, the reference signal device VRI is the thyristor converter 1! A current reference 0RET is generated to supply a positive output current ID to the load.

The output current is detected by the current transformer CT, the diode stack DB K is input, and the output signal OF is sent across the resistor R8.
Generate B. Arithmetic unit AP amplifies the difference between current reference cRgr and output voltage fi OFB, and its output is input to gate pulse generator GP. The output of the gate pulse generator GP is applied to each gate of the thyristors TH1 to TH4. As a result, the reactor load current is supplied with an output current set by the optical reference CREr.

[Problem to be solved by the invention]

Since the conventional thyristor converter is configured as described above, there is a problem that the current feedback signal CFB does not accurately match the output current. This is the fourth
This will be explained with a diagram. FIG. 4 shows waveforms of various parts when the thyristor converter Il+ is operating at the control angle α. In the figure, eA is the AC voltage waveform, and e is the thyristor T.
Current waveforms of H1 and TH3, work 2 is thyristor '1'H2
゜TH4's lightning waveform is more like a direct current. It is assumed here that the load has a sufficiently large inductance. Furthermore, C is the AC voltage waveform OFB, and the detection resistor Re rectifies this AC II current with the diode stack Ds.
This is the voltage waveform at both ends of .

As shown in FIG. 4, the output signal OFB has a waveform that falls to 0 at -time during the commutation type period (hereinafter referred to as the type period) U of the thyristor.

This is due to the power supply impedance Xr and VC on the AC power supply side, and the larger XL is, the longer this overlapping period U becomes. Also, if the load current becomes larger, the period U becomes larger.

As a result, current reference 0RII and feedback signal C
This results in loss of linearity with FB.

In addition, the source inductance XL differs depending on the power supply situation, and the overlap period U also differs, so the load' is a precautionary measure to set the current. This resulted in problems.

Furthermore, there is a similar description in Japanese Patent Publication No. 59-8592 regarding a conventional xi detection circuit for a thyristor converter.

This invention was made to solve the above-mentioned problems, and aims to provide a thyristor converter that can improve the linearity of the setting standard and feedback signal, reduce the setting error, and operate stably. purpose.

[Means to solve the problem]

The thyristor converter according to the present invention includes thyristors that are connected to an AC power source and output a DC current R, a control circuit that controls the output currents of these thyristors to a set value, and a control circuit that controls the output currents of these thyristors to a set value.
An AC current transformer that detects the current, a diode that converts the output of the AC current transformer into DC, and the [151!
This current detector includes a detection resistor connected to an output terminal, and a first-order lag circuit consisting of a resistor and a capacitor provided between the detection resistor output terminal and the jlilJ 1fft1 circuit input terminal.

[Effect]

In this invention! 1! +5! By adding a first-order lag circuit consisting of a resistor and a capacitor between the output terminal of the detection resistor and the computing unit, the detector has the advantage that even if the voltage across the detection resistor overlaps and drops due to the period, the voltage at the input terminal of the computing unit remains unchanged. It is designed to have almost no drop, eliminate output current setting errors, and ensure stable operation of the thyristor converter.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, the resistor RF and capacitor OF are the first-order lag circuit I.
nk is formed and connected between the output terminal of the detection resistor Ft8 and the input terminal of the arithmetic unit AP.

C! IFBl is the output signal %0FB across the detection resistor R8
2 is the output signal at both ends of the first-order lag circuit, that is, the capacitor OF'. Note that other components that are the same as those shown in FIG. 3, 1c, are given the same symbol +, and redundant explanation thereof will be omitted.

Next, FIG. 2, which will explain the operation, is a waveform diagram of the output signals 0FBI and 0FB2, where the solid lines are 0FB1. The dotted line indicates 0FB2.

The output signal 0FBI is equal to the detected value l5-TI arch d-Rs (this
where N1 is the number of primary turns of the CT, N is the number of secondary turns of the CT, d is the DC current, and R8 is the resistance value (Ω) of the detection resistor RB, so y decays linearly toward 0. Then I stood up.

Now, the time constant Tr -0F-RIF of the first-order lag circuit (where OF is the capacitance of the capacitor OF @I (3)
For RF, if the resistance value (Ω) of the resistor RF is selected to be about 5 times the overlap period U, the output signal 0FB2 will be as shown at point B in Figure B, and the maximum drop value in the overlap period U will be 0.95 m5. It will be about.

Therefore, the drop in the overlapping period U can be almost ignored. That is, the output (No. 8 0FB2) is almost unaffected by the overlap period U, and a signal faithfully proportional to 1!ti can be obtained.

As a result, when setting the direct current 1i current, there is no need to readjust even if the AC power source is different, and it is possible to provide a thyristor converter that operates stably.

〔Effect of the invention〕

As described above, according to the present invention, by adding a first-order lag circuit to the current detector output FIS of the thyristor converter, it is possible to improve current detection accuracy and obtain a thyristor converter that operates stably. I can do it.

[Brief explanation of drawings]

FIG. 1 shows a Cyrisk conversion WA according to an embodiment of the present invention.
FIG. 8 is an output signal waveform diagram explaining the present invention in detail. FIG. 8 is a circuit diagram showing a conventional thyristor converter. FIG. 4 is a waveform diagram of each part showing the conventional operation. In the figure, 111#t thyristor converter, (21 is a current detector, 13) is a control circuit, CT and AC current transformer, DS
is a diode stack, R8 is a detection resistor, RF is a resistance of the first-order delay circuit, and CF is a capacitor. In the figures, the same symbols indicate the same or equivalent parts. Fig. 3 1 Buili matagu branch Io 4shi 2:'L:fto (tool 3 ?I がPtakyu 0cho also used Kuyudan. Jusarahiro wrinkle (I9l; ``Chimire Circuit Rijiken I;

Claims (1)

[Claims] A thyristor that is connected to an AC power source and outputs DC current.
A control circuit that controls the output current of these thyristors to a set value, an AC current transformer that detects the output current, a diode that converts the output of this AC current transformer to DC, and a diode connected to the DC output end of this diode. A thyristor converter comprising a current detector having a detection resistor and a first-order lag circuit comprising a resistor and a capacitor and provided between the output terminal of the detection resistor and the input terminal of the control circuit.