JPH0366815B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention particularly relates to a method of manufacturing a semiconductor device in which a double-diffused bipolar transistor and a MOS capacitor are formed on the same substrate.

[Prior Art] Conventionally, when manufacturing an NPN bipolar transistor, for example, the emitter region (N-type diffusion layer) of this transistor was formed by using a polycrystalline silicon film containing high-temperature N-type impurities as a diffusion source. There are known methods of carrying out thermal diffusion. In order to make contact between the N-type diffusion layer, which is the emitter region formed in this way, and the wiring, a so-called self-aligned contact technique, which is performed by self-alignment, is used. .

However, when forming a capacitor together with such an NPN transistor on the same semiconductor substrate,
It was impossible to make contact due to such self-alignment. This is because a capacitor formed on a semiconductor substrate has a structure in which a thin oxide film is formed on a diffusion layer in the semiconductor substrate, and a metal layer, such as an aluminum layer, is further formed on this oxide film.

In other words, PEP for making the above contact
(Photo Engraving Process), since the thin oxide film on the capacitor part is exposed (at this time, the aluminum layer has not yet been formed), the thin oxide film on the capacitor part is etched at the same time as the oxide film on the contact part. This is because the capacitor will no longer function as a capacitor.

[Problems to be Solved by the Invention] This invention has been made in view of the above points, and it is possible to easily form a MOS type capacitor together with a double diffusion type bipolar transistor on the same substrate. It is an object of the present invention to provide a semiconductor manufacturing method that allows integrated circuit devices including capacitors to be manufactured easily and effectively.

[Means for Solving the Problems] That is, in the method of manufacturing a semiconductor according to the present invention, first, a collector region and a base region of a double-diffused bipolar transistor are formed on a semiconductor substrate, and one electrode of a capacitor is formed on a semiconductor substrate. a step of forming a first insulating film on the main surface of the semiconductor substrate; and a step of forming a first insulating film on the first insulating film formed in this step.
At least a region where the other electrode of the capacitor is to be formed, a region where the contact is to be formed with the diffusion region, a region where the contact is to be formed with the emitter region of the transistor, and a region where the contact is to be formed with the base region are selectively opened. using the second insulating film as a mask, etching away the first insulating film in the contact formation area for the diffusion region and the emitter region; A high concentration polycrystalline silicon film is formed on at least the region where the other electrode of the capacitor is to be formed, the region where the contact is to be formed with the diffusion region, and the region where the contact is to be formed with the emitter region, excluding the region where the contact is to be formed. a step of performing thermal diffusion using the polycrystalline silicon film formed in this step as a diffusion source to form a contact region within the diffusion region and the emitter region within the base region; Among the first insulating film, the second insulating film, and the polycrystalline silicon film, the exposed first insulating film is etched using an etching solution that can selectively etch the first insulating film. a step of etching away the insulating film of No. 1 and forming a contact portion connected to the base region in a region where a contact is to be formed for the base region; forming a metal layer on the polycrystalline silicon film and on the contact portion; The double-diffused bipolar transistor and the MOS capacitor are formed on the same semiconductor substrate.

[Operation] In the semiconductor manufacturing method as described above, bipolar transistors can be formed on the same semiconductor substrate without etching the insulating film used as the dielectric layer of the capacitor.
Here, the reason why the emitter region is formed by thermal diffusion is that if the emitter region is formed by ion implantation, the damage will be large. This makes it suitable for devices that handle minute currents, such as bipolar transistors. In addition, this manufacturing method brings out the effect of self-alignment, making it easier to improve positional accuracy, and reducing the number of photolithography steps, reducing the amount of masks used. Become.

[Embodiment of the Invention] An embodiment of the invention will be described below with reference to the drawings. Figures 1 to 5 sequentially show the manufacturing process for forming a double-diffused bipolar transistor and a MOS capacitor on the same substrate.
First, as shown in FIG. 1, a P-type silicon substrate 21
N ⁺ type buried layers 22 and 23 are formed.
Once the buried layers 22 and 23 are formed in this way, an N-type epitaxial layer 24 is grown, and a P-type isolation diffusion layer 25 is formed in this N-type epitaxial layer 24 by selective oxidation. . Then, N type diffusion layers 26 and 27 are formed so as to be connected to the N ⁺ type buried layers 22 and 23, respectively. A capacitor is formed in the N type diffusion region 26, and the N type diffusion region 27 is connected to the N ⁺ type buried layers 22 and 23. This is a region where a collector contact is planned to be formed, which is continuous with the collector formed by the buried layer 23. Thereafter, a silicon oxide film (SiO ₂ ) is formed on the surface of this P-type silicon substrate 21 by a thermal oxidation method.
form 28.

Once the silicon oxide film 28 has been formed, as shown in FIG. 2, a predetermined portion of the silicon oxide film 28, that is, a region where a capacitor is to be formed, is etched, and then thermal oxidation is performed. A thin silicon oxide film 29 is then formed on this etched portion. Thereafter, using the resistor film 30 as a mask, P-type impurities, such as boron, are ion-implanted into regions where the P-type diffusion layer is to be formed, corresponding to the base and emitter formation regions of the transistor.

Once boron has been ion-implanted into a predetermined region in this way, a silicon oxide film 31 is formed by the CVD method as shown in FIG. layer 3
Furthermore, a silicon nitride film 33 with a thickness of 900 Å is formed by low-pressure CVD method in the region excluding the region where the capacitor is to be formed and the contact formation regions of the base, emitter, and collector of the capacitor and the transistor. form.

Next, as shown in FIG. 4, the silicon oxide film 29 in the area where the capacitor and emitter are to be formed, as well as the area where one terminal of the capacitor and the collector's contact are to be formed, is removed by photoetching, and then the capacitor is removed by thermal oxidation again. A silicon oxide film 34 with a thickness of 2000 Å is placed in the area to be formed.
This silicon oxide film 34 is
It came to be used as a dielectric layer in capacitors.

That is, a first insulating film is formed by the silicon oxide films 28, 31, and 34, and this first insulating film has a region where an emitter is to be formed, a capacitor, and a collector where a contact is to be formed. Openings are formed corresponding to the respective regions. Then, a silicon nitride film 33, which is a second insulating film, is formed on the first insulating film by removing the opening and further excluding the region where the capacitor is to be formed. , an opening is formed in the second insulating film corresponding to a region of the base where a contact is to be formed.

Once the first and second insulating films have been formed in this way, high-concentration N-type polycrystalline silicon is deposited to a thickness of 2000 Å by low-pressure CVD, and a capacitor is formed by dry etching using photoresist. In addition, high concentration N is applied only to the areas where the capacitor, emitter, and collector contacts are planned to be formed.
A type polycrystalline silicon film 35 is formed.

In this case, as shown in FIG. 6, the overlapping region A of the silicon nitride film 33 and the high concentration N-type polycrystalline silicon film 35 is set to be, for example, 2 μm or more, so that even if mask misalignment occurs, the thin silicon oxide film 3
4 is always covered with the silicon nitride film 33 or the high concentration N-type polycrystalline silicon film 35.

In this way, the high concentration N-type polycrystalline silicon film 3
5 is formed, the high concentration N-type polycrystalline silicon film 3 formed especially in the area where the contact is to be formed.
5 as a diffusion source, N-type diffusion layers 36 are formed corresponding to each contact formation area.
form. Thereafter, in order to form a contact hole for the P-type diffusion layer 32, this semiconductor substrate is placed in an etching solution that selectively etches the silicon oxide film forming the first insulating film. In this case, since the first insulating film except for the region where the contact hole is to be formed is entirely covered with the silicon nitride film 35 or the high concentration N-type polycrystalline silicon film 35, the fifth As shown in the figure, only the portion of the first insulating film corresponding to the contact hole of the P-type diffusion layer 32 serving as the base region is etched, and the base contact hole 37 is formed in self-alignment. At the same time, a thin silicon oxide film formed on the surface of the high concentration N-type polycrystalline silicon film 35 is also removed.

Then, a high concentration N-type polycrystalline silicon film 35 formed in the contact region corresponding to the capacitor region and the N-type diffusion layer 36, and a region including the contact region of the P-type diffusion layer 32 are coated with a metal such as, for example, an aluminum alloy. forming the wiring 38;
A double diffused bipolar transistor 40 is formed on the same substrate 21 as the MOS capacitor 39.

In the semiconductor device manufactured in this way, P is used as the base of the bipolar transistor.
When forming the contact hole 37 of the type diffusion layer 32, the area other than this contact area, including the silicon oxide film 34 constituting the MOS type capacitor, is covered with a high concentration N-type polycrystalline silicon film 35 or a silicon nitride film 33. Therefore, the contact hole 37 is formed by self-alignment using an etching solution that selectively etches the silicon oxide film. At the same time, a thin silicon oxide film naturally formed on the surface of the highly doped N-type polycrystalline silicon film 35 is also removed. Therefore, the highly doped N-type polycrystalline silicon film that will form one electrode of the capacitor 39, and the highly doped N-type polycrystalline silicon film that will form the contacts of this capacitor 39 and the emitter and collector regions of the bipolar transistor 40. It is now possible to make good contact with the metal wiring 38 in each crystalline silicon film, and the MOS capacitor 3 can be connected to the bipolar transistor 40 without adding PEP to form a contact hole as in the conventional case.
9 will be formed. At this point, the MOS type capacitor 39 is covered with the metal wiring 38 made of aluminum alloy, so even if it is exposed to X-rays or other radiation, the thin silicon oxide film 34
No level is formed inside the silicon oxide film 34 or at the interface between the silicon oxide film 34 and the N-type diffusion layer 26, and changes over time such as leakage current and breakdown voltage deterioration are prevented from occurring.

In the above embodiment, it was explained that the insulating film constituting the MOS type capacitor 39 was composed of the thin silicon oxide film 34 formed after forming the P type diffusion layer 32, but this is not a P type capacitor. A thin silicon oxide film 29 formed before forming the diffusion layer 32 may be used. In addition, in the embodiment, since the polycrystalline silicon film constituting the MOS capacitor 39 is used as a diffusion source for the emitter (N-type diffusion layer 36) of the NPN bipolar transistor, the highly concentrated N-type polycrystalline silicon film 35 is However, if the film is to be used as a diffusion source for a P-type diffusion layer of a PNP transistor or the like, a high-concentration P-type polycrystalline silicon film may be used.

[Effects of the Invention] As described above, according to the method of manufacturing a semiconductor according to the present invention, a MOS capacitor can be formed together with a double-diffused bipolar transistor on the same semiconductor substrate. In this case, the emitter region is formed by a diffusion layer by thermal diffusion, and the contact in the base region is formed by self-alignment. If the emitter region is formed by, for example, ion implantation, the damage may be greater, but by forming it by thermal diffusion as described above, shallow parts can be formed with high precision. Therefore, it can be an effective configuration for an element that handles a minute current, such as a bipolar transistor. Further, since the contacts are formed by self-alignment, positional accuracy can be easily improved and the number of steps using masks such as photolithography can be reduced. In the MOS capacitor formed at the same time as the bipolar transistor, the insulating film serving as the dielectric layer was not etched at all, and in the etching process for forming the contact portion connected to the base region, The thin silicon oxide film naturally formed on the surface of the polycrystalline silicon film can also be removed at the same time.
This enables easy and highly accurate formation on the same substrate as a bipolar transistor.

[Brief explanation of drawings]

1 to 5 are cross-sectional configuration diagrams for sequentially explaining the manufacturing process of a semiconductor device according to an embodiment of the present invention, and FIG. 6 is a high-concentration N-type polycrystalline silicon in the step of FIG. 1d. FIG. 3 is a diagram showing a part of a part where a film is formed. 21...P-type silicon substrate, 22, 23...
N ⁺ type buried layer, 24...N type epitaxial layer, 26, 27... N type diffusion layer, 28 to 29, 3
1, 34... silicon oxide film (first insulating film),
32...P type diffusion layer, 33...Silicon nitride film (second insulating film), 35...High concentration N type polycrystalline silicon film, 36...N type diffusion layer, 37...Contact hole (base) , 38...metal wiring, 39...
...MOS type capacitor, 40...bipolar transistor.

Claims (1)

[Claims] 1. A step of forming a collector region and a base region of a double-diffused bipolar transistor on a semiconductor substrate, and also forming a diffusion region that will become one electrode of a capacitor; a step of forming a first insulating film, and on the first insulating film formed in this step,
At least a region where the other electrode of the capacitor is to be formed, a region where the contact is to be formed with the diffusion region, a region where the contact is to be formed with the emitter region of the transistor, and a region where the contact is to be formed with the base region are selectively opened. using the second insulating film as a mask, etching away the first insulating film in the contact formation area for the diffusion region and the emitter region; A high concentration polycrystalline silicon film is formed on at least the region where the other electrode of the capacitor is to be formed, the region where the contact is to be formed with the diffusion region, and the region where the contact is to be formed with the emitter region, excluding the region where the contact is to be formed. a step of performing thermal diffusion using the polycrystalline silicon film formed in this step as a diffusion source to form a contact region within the diffusion region and the emitter region within the base region; Among the first insulating film, the second insulating film, and the polycrystalline silicon film, the exposed first insulating film is etched using an etching solution that can selectively etch the first insulating film. a step of etching away the insulating film of No. 1 and forming a contact portion connected to the base region in a region where a contact is to be formed for the base region; forming a metal layer on the polycrystalline silicon film and on the contact portion; A method for manufacturing a semiconductor device, comprising the step of: forming a double-diffused bipolar transistor and a MOS capacitor on the same semiconductor substrate.