JPH0351889B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a supercharge control device for supercharging engine intake air, and more particularly to a supercharge control device that accurately responds to acceleration requests of a vehicle. .

Conventional supercharge control is performed in response to the position of the accelerator, so depending on the position of the accelerator, supercharging may not occur even though supercharging is necessary, or conversely, supercharging may not occur. There was a problem in which supercharging did not stop even though it was not necessary.

Therefore, an object of the present invention is to solve the above problem, that is, to enable control that accurately detects the need for supercharging, such as during acceleration, and performs supercharging only in this case. . In accordance with this objective, the control device of the present invention determines the necessity of supercharging or the necessity of stopping supercharging by detecting the rate of change over time of the accelerator opening, and outputs a corresponding control signal.

That is, the supercharge control device according to the present invention includes means for detecting a temporal change rate of the accelerator opening degree, and a signal representing the temporal change rate of the accelerator opening degree from the detecting means. Comparison calculation processing means comprising a comparison means for comparing with a predetermined value and a calculation processing circuit for processing the signal from the comparison means, and a mechanism for controlling the supercharging action of the supercharger based on the signal from the comparison calculation processing means. The comparison calculation processing means generates a supercharging signal when a temporal change rate of the accelerator opening reaches a predetermined positive value, and generates a supercharging signal when a predetermined time elapses after generation of the supercharging signal or when the accelerator is opened. It is characterized in that the supercharging stop signal is generated when the temporal rate of change in temperature reaches a predetermined negative value, whichever comes first.

The accelerator opening degree is detected by the opening degree of the throttle valve or the depression angle of the accelerator pedal, and the rate of change in the accelerator opening degree over time is determined in the direction in which the throttle valve opening degree increases, that is, the depression angle of the accelerator pedal increases. The direction is set as the positive direction.

In this device, the means for detecting the rate of change over time of the accelerator opening is composed of, for example, a differentiation circuit composed of a potentiometer and a capacitor that are interlocked with the accelerator, and the comparison and arithmetic processing circuit of the comparison arithmetic processing means is composed of an operational amplifier and a logic circuit. The driving means of the supercharging control mechanism can be composed of a solenoid mechanism that opens and closes a throttle provided in a bypass passage parallel to the supercharger.

In the supercharge control device configured in this way, when the accelerator pedal is depressed faster than a predetermined value regardless of the position of the accelerator, the output of the differentiating circuit becomes a predetermined value or more, and the comparison arithmetic circuit controls the drive circuit for a predetermined period of time. Generates a signal to activate. For this purpose, the solenoid mechanism closes the supercharger bypass throttle to a predetermined degree, and supercharging is started and maintained for a predetermined time by means such as a timer, and then turned off.

Furthermore, when it is necessary to stop supercharging, a sudden release of the accelerator pedal is generally performed, but in the present invention, if the speed of release of the accelerator pedal exceeds a predetermined value, can be detected and generate a supercharging stop signal.

The degree of supercharging (throttle opening degree) after the start of supercharging is controlled by separately known means in accordance with the amount of depression of the accelerator pedal.

Furthermore, although the above device indirectly increases the supercharging effect by closing the throttle in the bypass circuit, it is of course possible to use other supercharging throttle mechanisms. It is also possible to control directly.

According to the above configuration, since the supercharge responds not to the position of the accelerator pedal but to the rate of change in the accelerator opening, it is possible not only to reliably satisfy the driver's acceleration request but also to improve fuel efficiency.

Embodiments of the supercharger control device according to the present invention will be described below with reference to the accompanying drawings, but in order to facilitate understanding of the present invention, related devices of the supercharger controlled by the present device will be explained. . In FIG. 1, between the air cleaner 1 and the engine 2, there is a compressor 3 and a carburetor 4.
are arranged in sequence, and a passage 5 between the compressor 3 and the carburetor 4 is communicated with the atmosphere via a control valve 6 and a relief valve 7, and the compressor 3 is constantly driven by the engine 2 via a belt 8. It's becoming like that. When supercharging is not required, the valve 6 is opened to release the compression pressure of the compressor 3, and when supercharging is required, the valve 6 is closed depending on the degree of supercharging.

The intake system shown in FIG. 2 is a pre-carburetor type in which a carburetor 4 and a compressor 3 are disposed between an air cleaner 1 and an engine 2. The compressor 3 is rotationally driven via a belt 8 and a clutch 9. When supercharging is not required, bypass pipe 5'
The valve 6 inside is opened, but when supercharging is required, the bypass pipe 5' is closed in a controlled manner by the valve 6.

In FIG. 3, the accelerator pedal 10 is interlocked with the rotary shaft 12 of the potentiometer 11,
When the pedal 10 is depressed, it rotates counterclockwise in the figure, for example by a rack and pinion mechanism (not shown). As shown in the figure, one side of the fixed terminal of the potentiometer 11 is grounded and the other side is applied with the power supply voltage +V _DD , so the stepping angle θ
A voltage proportional to is output to the sliding contact.

A capacitor 16 is connected between the junction 15 of the voltage dividing resistors 13 and 14 and the potentiometer 11, and a differential circuit is formed by this capacitor 16 and the contact 14. As shown on the right side of FIG. 4, a voltage V _DD /2 and a voltage (v∝dθ/dt) proportional to the time rate of change of the pedal depression angle are generated.

The next-stage comparison circuit includes a first comparator 17 and a second comparator 18. The above-mentioned V _DD /2+dθ/dt is applied to the inverting input terminal of the first comparator 17, and the connecting resistors 19 and 20 are applied to one non-inverting input terminal.
A voltage V ₁ (V ₁ >V _DD /2) divided by V 1 is applied. Therefore, as shown on the left side of FIG. 2, when the pedal depression speed is high and V _DD /2+dθ/dt is greater than V ₁ , the output of the first comparator 17 changes from H level to L level.

On the other hand, also at the inverting input terminal of the second comparator 18.
V _DD /2+dθ/dt is applied to one non-inverting input terminal, and a voltage V ₂ (<
V _DD /2) is applied. Therefore, the accelerator pedal release speed is greater than the constant speed, and V _DD /2
When +dθ/dt becomes lower than V ₂ as shown on the right side of FIG. 4, the output of the second comparator 18 changes from L level to H level.

Although the second comparator 18 is also shown in FIG. 3, this second comparator can be omitted when the drive signal is deenergized only by timer control, which will be described later.

The logic operation circuit 25 to which the output terminals of the first and second comparators 17 and 18 are input executes the program shown in FIG. It can be composed of a multi-circuit 26 and a gate circuit 27.

The one-shot multi-circuit 26 is composed of two NAND circuits 26a and 26b as shown in the figure.
When an L level pulse is input to the trigger input terminal, an H level pulse is output to the next stage gate circuit 27 during a period determined by the time constant of the resistor 26c and capacitor 26d.

The output of the second comparator 18 is input to the other input terminal of the gate circuit 27 .

A pulse is output from this logic operation circuit 25 for a certain period of time after the pulse is output from the one-shot multi-circuit 26. During this period, the second comparator 18
When a pulse is output from the terminal, no pulse is generated at the output terminal.

The drive circuit provided at the next stage includes a switching transistor 30 whose base is connected to the output terminal of the logic operation circuit 25, a solenoid 31 connected in series to the collector of the transistor 30, and a switching transistor 31 connected to the collector of the transistor 30 in series. The core 32 is connected to an arm 36 fixed to a shaft 35 rotatably supporting the throttle 34 of the control valve 6 in the bypass pipe 5' as shown. There is.

Therefore, when a pulse is applied to the base, the transistor 30 becomes conductive and the solenoid 31 is accordingly energized in a controlled manner by a predetermined amount, so that the core 32 is attracted and the throttle 34 is moved in the direction of closing the bypass pipe 5'. Rotate to. Therefore, the supercharging effect of the supercharger becomes high.

That is, if the depression speed of the accelerator pedal 10 is equal to or higher than a predetermined value, the throttle 34 is closed for a predetermined period of time by the circuit operation described above, and supercharging is performed.
If the accelerator pedal 10 is released at a predetermined speed or higher during this period, supercharging is stopped regardless of the above period.

[Brief explanation of drawings]

1 and 2 are schematic diagrams showing an intake system provided with a supercharger, FIG. 3 is a circuit diagram showing a supercharger control device according to the present invention, and FIG. 4 is a schematic diagram showing an intake system equipped with a supercharger. A waveform diagram showing the waveform applied to the input terminal of the operational amplifier of the second comparator, Fig. 5 is a circuit diagram showing an example of the arithmetic circuit of Fig. 1, and Fig. 6 shows a program executed in the arithmetic circuit. It is a flowchart. 10... accelerator pedal, 11... potentiometer, 17... first comparator, 18... second comparator, 25... arithmetic processing circuit, 30...
...Switching transistor, 31...Solenoid, 33...Bypass pipe, 34...Throttle.

Claims (1)

[Claims] 1. A means for detecting the temporal rate of change in the accelerator opening, a comparing means for receiving a signal representing the temporal rate of change in the accelerator opening from the detecting means, and comparing the input signal with a predetermined value. and a means for driving a mechanism for controlling the supercharging action of the supercharger using the signal from the comparison calculation processing means, the comparison calculation processing means having a calculation processing circuit for processing signals from the comparison calculation processing means. The processing means generates a supercharging signal when the temporal rate of change in the accelerator opening reaches a predetermined positive value, and generates the supercharging signal after a predetermined time has elapsed after generation of the supercharging signal, or when the temporal rate of change in the accelerator opening reaches a predetermined negative value. A supercharger control device that generates a supercharging stop signal at the earliest of the following conditions: