JPH0344337U - - Google Patents
Info
- Publication number
- JPH0344337U JPH0344337U JP10332089U JP10332089U JPH0344337U JP H0344337 U JPH0344337 U JP H0344337U JP 10332089 U JP10332089 U JP 10332089U JP 10332089 U JP10332089 U JP 10332089U JP H0344337 U JPH0344337 U JP H0344337U
- Authority
- JP
- Japan
- Prior art keywords
- channel
- sleep time
- display
- segment number
- sleep
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004622 sleep time Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000002093 peripheral effect Effects 0.000 description 1
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Description
第１図は本考案の一実施例のブロツク構成図、
第２図は第１図の一部の詳細を示す拡大図、第３
図は第１図の要部の周辺部分を示す結線図、第４
図は第３図のマクイロコンピユータの各出力信号
波形を示すタイミングチヤート、第５図は第３図
におけるセグメントデータと表示数字との関係を
示す説明図、第６図は第３図におけるスリープタ
イムの設定動作のフローチヤート、第７図は第３
図におけるスリープタイムの取消動作のフローチ
ヤート、第８図は第６図の動作による数字表示器
の表示例を示す図、第９図は第７図の動作による
数字表示器の表示例を示す図である。
１……マイクロコンピユータ、３……７セグメ
ント数字表示器、ＫＴ……スリープタイマキー、
ＫＳ……設定キー、７……タイマ。
FIG. 1 is a block diagram of an embodiment of the present invention.
Figure 2 is an enlarged view showing some details of Figure 1;
The figure is a wiring diagram showing the peripheral parts of the main parts in Figure 1, and Figure 4.
The figure is a timing chart showing each output signal waveform of the microcomputer in Figure 3, Figure 5 is an explanatory diagram showing the relationship between segment data and display numbers in Figure 3, and Figure 6 is the sleep time in Figure 3. The flowchart of the setting operation, Fig. 7 is the 3rd
FIG. 8 is a diagram showing an example of display on the numeric display according to the operation shown in FIG. 6; FIG. 9 is a diagram showing an example of display on the numeric display according to the operation shown in FIG. 7. It is. 1...Microcomputer, 3...7 segment numeric display, KT...Sleep timer key,
KS...setting key, 7...timer.
Claims (1)
数字表示器を用いたチヤンネル表示装置において
、スリープタイマキーの操作により前記セグメン
ト数字表示器に前記チヤンネルに代えて複種類の
スリープタイムを順次表示するスリープタイム表
示手段と、このスリープタイムの表示時に設定キ
ーが操作されることによつてその操作時点に表示
中のスリープタイムを設定し且つ前記セグメント
数字表示器をチヤンネル表示に復帰させるスリー
プタイム設定手段とを備えてなることを特徴とす
るチヤンネル表示装置。 In a channel display device using a segment number display that displays the currently selected channel, a sleep time display that sequentially displays multiple types of sleep time on the segment number display instead of the channel by operating the sleep timer key. and sleep time setting means for setting the sleep time being displayed at the time of the operation and returning the segment number display to channel display when a setting key is operated when the sleep time is displayed. A channel display device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10332089U JPH0344337U (en) | 1989-09-01 | 1989-09-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10332089U JPH0344337U (en) | 1989-09-01 | 1989-09-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0344337U true JPH0344337U (en) | 1991-04-24 |
Family
ID=31652166
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10332089U Pending JPH0344337U (en) | 1989-09-01 | 1989-09-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0344337U (en) |
-
1989
- 1989-09-01 JP JP10332089U patent/JPH0344337U/ja active Pending