JPH0343839Y2 - - Google Patents

Description

[Detailed explanation of the idea] This invention relates to servo circuits such as VTRs.

In VTRs used for broadcasting and as high-end machines, the rotation of a rotating magnetic head is synchronized with an external synchronization signal. In this case, conventionally, a servo loop for phase control is performed by comparing the phase of the rotational position detection signal of the rotating magnetic head with an external vertical synchronization signal, and a separate system is used to control the rotational frequency detection signal of the rotating magnetic head and an external horizontal synchronization signal. A servo loop for speed control based on phase comparison with a signal is provided, and the phase control loop first drives the rotational phase into a certain range, and then switches to a speed control loop with better characteristics.

However, since this has two servo loops of different systems, the configuration becomes complicated. Furthermore, if the gain of the phase control loop is increased in order to reduce the error in the rotational phase, hunting tends to occur, and if the gain is decreased to avoid this, the rise characteristics deteriorate, making circuit design extremely difficult.

This invention is designed to eliminate these drawbacks.

In this invention, only a speed control loop based on phase comparison between the rotational frequency detection signal and the first reference signal is provided as the servo loop. Then, the phase comparison output between the position detection signal and the second reference signal
Phase control is performed by modulating the frequency of the reference signal.

FIG. 1 shows an example of a servo circuit according to this invention. Reference numeral 1 denotes a motor, which is directly connected to, for example, the rotating shaft of a rotating magnetic head. Reference numeral 2 denotes a frequency generator, which is attached to the shaft of the motor 1 and provides detection pulses of the rotational frequency of the motor 1 and therefore the rotating magnetic head. That is, if the number of teeth of the frequency generator 2 is G and the rotational frequency of the motor 1 is ₀ , a pulse FG with a frequency of G· ₀ is obtained from the frequency generator 2.
3 is a pulse generator which generates a pulse when the rotating magnetic head reaches a certain rotational position.

Then, the external synchronization video signal from the terminal 4 is supplied to the synchronization signal separation circuit 5, and as shown in FIGS. 4A and 4B, a vertical synchronization pulse VD and a horizontal synchronization pulse HD are obtained. This horizontal sync pulse
HD is supplied to the PLL circuit 6, and as shown in FIG. 4C, a pulse VN is obtained which is synchronized with the horizontal synchronizing pulse HD and whose frequency is N times the horizontal frequency _H.
That is, the oscillation pulse of the voltage controlled oscillator 7 whose oscillation center frequency is set to N· _H is divided into 1/N by the frequency divider 8, and the phase of the divided pulse is compared with the horizontal synchronizing pulse HD by the phase comparator 9. The voltage controlled oscillator 7 is controlled by the comparison error voltage. Further, this oscillation pulse VN is frequency-divided by 1/M by a frequency divider 10 to obtain a reference pulse CM having a frequency of N/M _H.

Reference numeral 11 denotes a speed control loop, in which a rotational frequency detection pulse FG with a frequency of G· ₀ from the frequency generator 2 is connected in phase with a base pulse CM of a frequency of N/M _H from the frequency divider 10 in a phase comparator 12. The comparison error voltage is given to the motor 1 through the drive circuit 13, and the detection pulse FG is the reference pulse.
The rotational speed of the motor 1 is controlled so as to be synchronized with CM, so that _G.0 = N/M _H.

For NTSC signals, for example, G=75, N=
4, M = 14. Therefore, the rotation frequency ₀ of motor 1 is ₀ = N/G・M _H = 4/75×14 _H = 1/262.5 _H , or the field frequency of 60 Hz. is,
The motor 1 and therefore the rotating magnetic head are made to rotate once in one field.

In this case, since the frequency of pulse VN is _4H , there are 1050 pulses in one field. Also, since the frequency of the reference pulse CM is 4/14 _H , one period corresponds to 3.5 horizontal periods, and the frequency generator 2
Corresponds to one tooth of

On the other hand, 20 is a window pulse generation circuit, and from the vertical synchronizing pulse VD and pulse VN, three types of wind pulses each having a fixed temporal relationship with respect to the vertical synchronizing pulse VD are obtained.

That is, the counter 21 receives the vertical synchronization pulse VD.
If 1050/2 pulses VN are counted after being reset at , the pulse CA is obtained from the counter 21 at an intermediate point after the vertical synchronizing pulse VD, as shown in FIG. 4D. And R.S.
The flip-flop circuit 24 generates a vertical synchronization pulse.
Set by VD, reset by pulse CA,
From the circuit 24, as shown in FIG. 4 E and F, it becomes "1" from the vertical synchronizing pulse VD to an intermediate point, and becomes "0" from the intermediate point to the vertical synchronizing pulse VD. square wave pulse RA,
and its inverse pulse are obtained.

On the other hand, when the counter 22 counts 1043 pulses VN after being reset by the vertical synchronizing pulse VD, that is, at a point seven pulses VN before the vertical synchronizing pulse VD, as shown in FIG. 4G,
A pulse CB is obtained from the counter 22. Also,
When the counter 23 counts seven pulses VN after being reset by the vertical synchronizing pulse VD, that is, at a turning point seven pulses VN from the vertical synchronizing pulse VD, as shown in FIG.
More pulse CC can be obtained. Then, the RS flip-flop circuit 25 is set by the pulse CB,
After being reset by the pulse CC, the circuit 25 generates the vertical synchronizing pulse VD as shown in FIG. 4 I and J.
The first wind pulse WX and its inverted pulse have a pulse width of 14 pulses VN centered on
You can get WX.

Furthermore, the above-mentioned pulse RA and the pulse are supplied to the AND circuit 26, and from this, as shown in FIG.
A second wind pulse WY having a pulse width from a point seven times after VD to a point in the middle of the vertical synchronizing pulse VD is obtained, and the above-mentioned pulse and the pulse are supplied to the AND circuit 27, and from this , as shown in Figure 4L, the vertical synchronization pulse VD
The pulse from the vertical sync pulse VD from the middle point of
A third wind pulse WZ is obtained having a pulse width up to 7 times before VN.

The pulse width of the first wind pulse WX is equal to 14 pulses VN and corresponds to one cycle of the reference pulse CM, and therefore corresponds to one tooth of the frequency generator 2.

Then, the rotational position detection pulse obtained from the pulse generator 3 is delayed for a certain period of time by the delay circuit 14 as necessary, and the delayed rotational position is detected by the above-mentioned wind pulses WX, WY and WZ in the comparison circuit 30. Vertical synchronization pulse of pulse PG
The phase relative to VD is detected. Then, the frequency division ratio 1/M of the frequency divider 10 is changed by the output of the comparison circuit 30, and the frequency of the reference pulse CM obtained from the frequency divider 10 is modulated.
As shown in Figure M, the delayed detection pulse PG is a wind pulse centered on the vertical synchronization pulse VD.
The rotational phase of the motor 1 is controlled so that it falls within the pulse width of WX.

That is, the D flip-flop circuit 31 receives the wind pulse WZ as the D input, the detection pulse PG as the clock input, and the inverted pulse of the wind pulse WX as the reset pulse.
supplied to In addition, the wind pulse WY is used as the D input, and the detection pulse PG is used as the clock input.
The D flip-flop circuit 32 is supplied with the output DT of the D flip-flop circuit 32 as a D input, the wind pulse WX as a clock input, and the detection pulse PG as a reset input.
3. Then, the outputs DS and DU of the D flip-flop circuits 31 and 33 are supplied to the frequency divider 10, and the frequency division ratio of the frequency divider 10, 1/M, becomes 1/15 when the output DS becomes "1". When the output DU becomes "1", it is reduced to 1/13, and when neither the output DS nor DU becomes "1", it is reduced to 1/14 as described above.

Vertical synchronization pulse VD, wind pulse WX, its inverted pulse, wind pulse WY and WZ
The relationships are as shown in FIG. 5 A, B, C, D, and E. Now the delayed detection pulse
As shown by a and b in Figure F, PG leads the vertical synchronizing pulse VD in phase and becomes a wind pulse.
When it enters the pulse width of WZ, the output DS of the D flip-flop circuit 31 becomes "1" at the time of this detection pulse, as shown in G in the figure.
It returns to "0" at the rising edge of the inversion pulse immediately after that. When the output DS becomes "1" in this way, the frequency division ratio of the frequency divider 10 is changed from 1/14 to 1/15 during that period, and therefore the frequency of the reference pulse CM is changed to 4/14. _H to 4/15 _H , and the motor 1 is decelerated by the control loop 11.

In this case, the time when the output DS becomes "1" and the frequency division ratio becomes 1/15 is the vertical synchronization pulse of the detection pulse PG.
Since it corresponds linearly to the phase difference with respect to VD, the error voltage obtained from the phase comparator 12 of the control loop 11 also corresponds linearly to the phase difference, as shown by the straight line portion 51 in FIG. Therefore, the motor 1 is decelerated in accordance with this phase difference, and the rotational phase of the motor 1 is controlled so that the detection pulse PG falls within the pulse width of the wind pulse WX.

On the other hand, the delayed detection pulse PG is
As shown in c, d, e, the vertical synchronization pulse VD
When the phase lags behind the window pulse WY and enters the pulse width of the wind pulse WY, the output DT of the D flip-flop circuit 32 changes to the first c
becomes "1" at the time of the detection pulse of D, and D
The output DU of the flip-flop circuit 33 is
As shown in FIG. 2, during the period in which the output DT is "1", it becomes "1" at the rising edge of the wind pulse WX, and returns to "0" at the time of the detection pulse immediately thereafter. When the output DU becomes "1" in this way, the frequency division ratio of the frequency divider 10 is changed from 1/14 to 1/13 during that period, and therefore the frequency of the reference pulse CM is changed to 4/14. _H to 4/13 _H , and the motor 1 is accelerated by the control loop 11.

In this case, the time when the output DU becomes "1" and the frequency division ratio becomes 1/13 linearly corresponds to the phase difference between the detection pulse PG and the vertical synchronization pulse VD, so
The error voltage obtained from the phase comparator 12 of the control loop 11 is also as shown by the straight line portion 52 in FIG.
The motor 1 corresponds linearly to this phase difference, so the motor 1 is accelerated in accordance with this phase difference, and its rotational phase is controlled so that the detection pulse PG falls within the pulse width of the wind pulse WX.

As described above, this invention has one servo loop, which simplifies the configuration. Moreover, in this invention, the frequency of the reference pulse CM is changed to drive the rotation phase into a certain range while the servo is kept locked by the reference pulse CM based on the horizontal synchronization pulse HD and the rotation frequency detection pulse FG. Since it is a servo motor, it has the advantage that the response of the servo by the rotational frequency detection pulse FG is good, and the rise and damping characteristics of the phase control are also improved.

In the example shown in Fig. 1 above, the detection pulse PG is a wind pulse WX centered on the vertical synchronization pulse VD.
The phase of the detection pulse PG with respect to the vertical synchronization pulse VD may change within the pulse width of the window pulse WX.

That is, the vertical synchronization pulse VD, the wind pulse WX and the pulse VN obtained from the PLL circuit 6
have a relationship as shown in FIG. As mentioned above, the pulse width of the wind pulse WX is 14 pulses VN and 1 of the reference pulse CM.
This period corresponds to one tooth of the frequency generator 2. The numbers of the pulses VN are assigned for convenience to represent periods obtained by dividing the pulse width of the wind pulse WX into 14 equal parts. In the case of the example shown in FIG. 1, the detection pulse PG is controlled to fall within the pulse width of the wind pulse WX, but it is not determined in which of the periods divided into 14 equal parts this pulse width.

By the way, when the servo is locked as described above, the time from the detection pulse PG of the rotational frequency detection pulse FG to the detection pulse PG is determined by the mounting position of the pulse generator 3 and remains constant. Become. If this time corresponds to, for example, 8.5 pulses VN, and if the detection pulse PG comes in the 11th period within the pulse width of the wind pulse WX, as shown by the solid line in FIG. The reference pulse CM and the rotational frequency detection pulse FG synchronized therewith are located at the positions indicated by solid lines in the figure. In this case, the detection pulse PG is within the pulse width of the wind pulse WX.
If it is detected that the 11th period has come and the reference pulse CM is moved to the position three pulses before the pulse VN as shown by the broken line in the figure, the rotational frequency detection pulse FG will also change as shown in the figure. Therefore, the detection pulse PG also comes to the position shown by the broken line in the figure three pulses before the pulse VN, that is, the 8th period within the pulse width of the wind pulse WX. .

The example in Figure 2 focuses on this point, and the detection pulse
It detects in which period within the pulse width of the wind pulse WX the PG comes, and modulates the phase of the reference pulse CM accordingly to ensure that the phase of the detection pulse PG with respect to the vertical synchronization pulse VD is always accurate. It is made to remain constant.

That is, in this example, the pulse VN obtained from the PLL circuit 6 is supplied to a frequency divider 41 of 1/M, which is separate from the frequency divider 10. However, the frequency division ratio 1/M of this frequency divider 41 is always constant, which is 1/14 in the above case, and the output of this frequency divider 41 is 4-bit 2
Extracted as a hex code. Therefore, the output code of the frequency divider 41 is 1, 2, 3, . . . 14, 1, converted into decimal numbers for each pulse VN.
2,... changes. In this case, the vertical sync pulse
The frequency divider 41 is reset by VD, and the output code of the frequency divider 41 changes at the time of the vertical synchronization pulse VD.
It is restricted to, for example, 8 when converted into a decimal number. 7th
Figures A to C show the relationship between the vertical synchronizing pulse VD, the window pulse WX, and the pulse VN, and the number attached to the pulse VN indicates the state of the output code of the frequency divider 41.

The output code of this frequency divider 41 is then supplied to the latch circuit 42, and the wind pulse WX
and detection pulse PG are supplied to the latch circuit 42,
The detection pulse PG is a wind pulse as described above.
When it comes within the pulse width of WX, the output code is latched by the detection pulse PG. The latch output is then supplied to a decoder 43.
The output of CM is applied to a frequency divider 10, so that the interval of the reference pulse CM mentioned above is changed only once in response to the latch output.

For example, as shown on the left side of Fig. _7D1 , the reference pulse CM is set at intervals of 14 pulses VN,
If the output code of the frequency divider 41 is obtained when converted to 3 in decimal and the detection pulse PG falls within the pulse width of the wind pulse WX and comes in its 11th period, then the latch circuit In 42,
The output code, which is 11 when converted into a decimal number, is latched, and as a result, the time from the rotational frequency detection pulse FG obtained immediately before the detection pulse PG to the detection pulse PG is 8.5 pulses VN as described above. Since it is 14+(8-11)=11,
The interval between the reference pulses CM from the frequency divider 10 is set to 11 pulses VN only once as shown in the figure. Therefore, as shown on the right side of _D1 in the figure, the reference pulse CM is obtained from now on when the output code of the frequency divider 41 becomes 14 in decimal.
Correspondingly, the control loop 11 causes the rotational frequency detection pulse FG to come to a point where the output code of the frequency divider 41 becomes 14 in decimal notation, and in the next field, the detection pulse PG comes to be in the 8th period within the pulse width of the wind pulse WX.

As shown on the left side of Figure _7D2 , the reference pulse CM
The output code of frequency divider 41 is converted into decimal number and is 11.
If the detection pulse PG falls within the pulse width of the wind pulse WX and comes in its fifth period, then in decimal form it becomes 5.
The output code that becomes latches, which causes 14
Due to the relationship +(8-5)=17, the interval between the reference pulses CM is set to 17 pulses VN only once as shown in the figure. Therefore, as shown on the right side of Figure _D2 ,
From now on, the reference pulse CM will be obtained when the output code of the frequency divider 41 is converted to 14 in decimal, and in the next field, the detection pulse PG will similarly be the pulse width of the wind pulse WX. It will come in the 8th period.

Thus, according to the example of FIG. 2, the reference pulse
By modulating the phase of CM, the detected pulse
The rotational phase of the motor 1 is controlled so that the phase of PG with respect to the vertical synchronization pulse VD is always accurately constant.

Note that this invention can be applied not only to the rotation control of a rotating magnetic head, but also to the rotation control of a capstan during playback, in which case the above-mentioned rotational position detection pulse
Control pulses reproduced from tape are used instead of PG.

[Brief explanation of drawings]

1 and 2 are system diagrams of an example of the servo circuit of this invention, and FIGS. 3 to 7 are diagrams for explaining the same. 1 is a motor, 2 is a frequency generator, 3 is a pulse generator, 5 is a synchronous signal separation circuit, 6 is a PLL circuit,
10 is a frequency divider, 11 is a speed control loop, 20 is a wind pulse generation circuit, and 30 is a comparison circuit.

Claims (1)

[Claims for Utility Model Registration] A phase-locked loop is driven in synchronization with an external horizontal synchronizing signal, and the output pulse signal obtained by the phase-locked loop is divided by a frequency dividing circuit to be used as a reference signal. In a servo circuit configured to control the rotation of the motor by comparing the signal with the rotational frequency detection signal of the motor, the external A first wind pulse having a predetermined width centered on the vertical synchronization signal, a second wind pulse located ahead of the first wind pulse, and a third wind pulse located behind the first wind pulse. a wind pulse, and when the rotational position detection signal of the motor is within the second or third wind pulse, the frequency of the reference signal is modulated by changing the frequency division ratio of the frequency dividing circuit. . A servo circuit, characterized in that the rotational phase of the motor is controlled by always positioning the rotational position detection signal within the first window pulse.