JPH0338819A - Detection of position inside semiconductor device - Google Patents
Detection of position inside semiconductor deviceInfo
- Publication number
- JPH0338819A JPH0338819A JP1174785A JP17478589A JPH0338819A JP H0338819 A JPH0338819 A JP H0338819A JP 1174785 A JP1174785 A JP 1174785A JP 17478589 A JP17478589 A JP 17478589A JP H0338819 A JPH0338819 A JP H0338819A
- Authority
- JP
- Japan
- Prior art keywords
- mark
- semiconductor device
- shape
- wiring
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 238000001514 detection method Methods 0.000 title claims abstract description 9
- 238000000034 method Methods 0.000 claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 claims abstract description 5
- 238000001459 lithography Methods 0.000 claims description 4
- 239000002184 metal Substances 0.000 abstract description 2
- 150000004767 nitrides Chemical class 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000003517 fume Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、リソグラフィー工程を有する半導体装置の
製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device including a lithography process.
本発明は、半導体装置製造過程において、曲線部を含む
マークを形状認識により検出することにより、精度の良
い位置検出を可能としたものである。The present invention enables highly accurate position detection by detecting marks including curved portions through shape recognition during the semiconductor device manufacturing process.
従来の技術は例えば第２図ｔｉ１１． （ｂ）に示すよ
うに、直線で構成されたマークのいずれかを用いていた
。For example, the conventional technique is shown in FIG. 2 ti11. As shown in (b), one of the marks composed of straight lines was used.
このように、半導体装置内の配線パターン等のパターン
は、直線を基調とした形状をしているため、従来のマー
クでは周囲の配線パターンと形状が似ている場合が生し
得るため、形状認識によるパターン検知時に、誤検知が
起こりやすいという問題があった。In this way, patterns such as wiring patterns in semiconductor devices have shapes based on straight lines, so conventional marks may have similar shapes to surrounding wiring patterns, so shape recognition is difficult. There was a problem in that false detections were likely to occur when detecting patterns.
上記問題点を解決するために、本発明では配線パターン
では用いられることの少ない１ＩｉＩ線を基調としたマ
ークを用いることにより、誤検知を防止する位置検出方
法を採用した。In order to solve the above problems, the present invention employs a position detection method that prevents false detection by using marks based on 1IiI lines, which are rarely used in wiring patterns.
上記の様なマークを用いることにより、マークと他パタ
ーンとの図形認識」二の区別がつきやすくなり、正確に
マークを検知することができる。By using the above-mentioned marks, it becomes easier to distinguish between marks and other patterns, and marks can be detected accurately.
以下にこの発明の実施例を図面に基づいて説明する。半
導体装置の製造過程のリソグラフィー工程において、半
導体基板上に第１図（ａｌ、 （ｂｌ、 （Ｃ１といっ
た曲線を基調とするマークのうち一種を形成する。リソ
グラフィー工程の種類に応して、このマークはシリコン
上の酸化膜１窒化膜あるいは配線用金属膜のパターンな
どとして形成される。ただし、フォトリソグラフィー工
程によりパターニングする時、マスクの作成上の容易性
により全体としては曲線パターンに近い形状をしていて
も拡大してみると、複雑な多角形形状を形成している場
合もあり得る。Embodiments of the present invention will be described below based on the drawings. In the lithography process of the manufacturing process of semiconductor devices, one type of mark based on the curves shown in FIG. 1 (al, (bl, (C1) is formed on the semiconductor substrate. is formed as a pattern of an oxide film, a nitride film, or a metal film for wiring on silicon.However, when patterning is performed by a photolithography process, the shape as a whole is close to a curved pattern due to the ease of mask creation. However, if you enlarge it, you may find that it forms a complex polygonal shape.
以」−の様に形成されたマークを形状認識技術により検
出する。−船釣な形状認識はパターンを詳細な格子形状
に分割し、光の反射信号を強弱によって２４直化するこ
とにより、マークのパターンを検出する。従って、第３
図（ａｌの様なパターンの部分に対しては、第３図（ｂ
ｌの様な複雑なパターンとして検出されることになる。Marks formed as shown below are detected using shape recognition technology. - Shape recognition in a practical way detects mark patterns by dividing the pattern into detailed grid shapes and converting the reflected light signal into 24-digit signals depending on the strength and weakness. Therefore, the third
For pattern parts like Figure (al), see Figure 3 (b).
It will be detected as a complex pattern like l.
この様に、半導体装置内の配線パターンには存在しない
ような複雑な形状として認識されるため、フメトリソグ
ラフィ工程における下層と上層とアライメンＩ・や測定
機における測定場所検出の為の基準点設定に用いること
ができる。In this way, since it is recognized as a complex shape that does not exist in the wiring pattern in a semiconductor device, it is necessary to set a reference point for lower and upper layers and alignment I in the fume lithography process and for detecting a measurement location in a measuring machine. It can be used for.
この発明は以上説明したよ・うに半導体装置配線として
は用いられにくい田１線バクーンを用い形状認識を行う
ことにより、誤検知することなく正確に位置検出を行う
ことができる。As described above, the present invention performs shape recognition using a single line barcoon, which is difficult to be used for semiconductor device wiring, thereby making it possible to accurately detect a position without erroneous detection.
第１図ｆａｔ〜（Ｃ１は本発明の実施例のマーク形状を
示す平面図、第２図ｔａｇ、 （ｂｌは従来のマーク形
状を示す平面図、第３図（ａｌは本発明のマークの形状
の部分の一例を示す平面図、第３図ｆｂ）は第３図（ａ
ｌを形状認識により検出したときの形状を示す平面図で
ある。
以」ニFig. 1 fat~(C1 is a plan view showing the mark shape of the embodiment of the present invention, Fig. 2 tag, (bl is a plan view showing the conventional mark shape, Fig. 3 (al is the plan view of the mark shape of the present invention) A plan view showing an example of the part shown in FIG. 3 (fb) is shown in FIG.
FIG. 3 is a plan view showing a shape when l is detected by shape recognition. I”d
Claims (1)
曲線を基調とするマークを形成する工程と、このマーク
を形状認識技術により検出し、半導体装置の位置情報を
得る工程とを有する位置検出方法。In the lithography process of the semiconductor device manufacturing process,
A position detection method comprising a step of forming a mark based on a curve, and a step of detecting the mark using shape recognition technology to obtain position information of a semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1174785A JPH0338819A (en) | 1989-07-05 | 1989-07-05 | Detection of position inside semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1174785A JPH0338819A (en) | 1989-07-05 | 1989-07-05 | Detection of position inside semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0338819A true JPH0338819A (en) | 1991-02-19 |
Family
ID=15984629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1174785A Pending JPH0338819A (en) | 1989-07-05 | 1989-07-05 | Detection of position inside semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0338819A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002373844A (en) * | 2001-06-14 | 2002-12-26 | Seiko Instruments Inc | Method for measuring alignment deviation |
| US9796536B2 (en) | 2011-04-26 | 2017-10-24 | De Beers Uk Ltd. | Automatic gemstone orientation |
-
1989
- 1989-07-05 JP JP1174785A patent/JPH0338819A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002373844A (en) * | 2001-06-14 | 2002-12-26 | Seiko Instruments Inc | Method for measuring alignment deviation |
| US9796536B2 (en) | 2011-04-26 | 2017-10-24 | De Beers Uk Ltd. | Automatic gemstone orientation |
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