JPH0325073B2 - - Google Patents

Description

TECHNICAL FIELD The present invention relates to a facsimile device having a pixel density conversion mechanism.

(Prior Art) Conventionally, when communicating between facsimile apparatuses having different pixel densities, if the pixel density cannot be matched to the other apparatus, the recorded image will be reduced or enlarged. There are several ways to solve this problem.
The simplest method is to periodically thin out or insert the number of pixels necessary for conversion from the original pixels on a line-by-line basis. Although this method has a simple algorithm and hardware configuration, white spots and blurring are noticeable and the image quality is greatly degraded.

Methods for reducing image quality deterioration include the logical sum method, majority voting method, OPC method, and SPC method, which determine the pixel signal level of a converted pixel by taking into account the information of the previous or next line of the original pixel. The algorithms become more complex and the hardware configuration becomes larger. Furthermore, a method using this method to simplify the algorithm has been proposed, but it has the drawback that the deterioration of image quality becomes noticeable when the conversion rate becomes large.

(Objective of the Invention) The present invention uses a method of determining the image signal level of a converted pixel by considering image data information for two lines of the original pixel, the previous line and the next line, for the converted pixel. In order to reduce the hardware scale and reduce the white spots, isolated black points, and jitter that cause image quality deterioration, we applied It is an object of the present invention to provide a facsimile apparatus having a pixel density conversion mechanism that reduces the above-mentioned drawbacks and reduces image quality deterioration by placing emphasis on the correlation in the sub-scanning direction and the diagonal direction.

(Structure of the Invention) According to the present invention, a memory circuit capable of storing binary image signals for three lines, and two
Conversion of value image signal The logical product of two binary image signals in the main scanning direction of the four original pixels surrounding the pixel, the logical product of the two binary image signals in the sub-scanning direction, and the two binary image signals in the diagonal direction a circuit that calculates the AND of signals;
The pixel density conversion includes an arithmetic circuit that calculates a logical sum of the results obtained by the arithmetic circuit, and determines whether the pixel signal of the converted pixel is a black level or a white level depending on whether the result is 0 or 1. A facsimile device having a mechanism is obtained.

(Example) Next, an example of the present invention will be described with reference to the drawings. Figure 1 explains the algorithm of the present invention, and shows how to change the pixel density from 10 pel/mm to 8 pel/mm.
This is the case when converting to mm. From the original pixel,
The formula for determining the image signal level of a converted pixel when converted to a converted pixel is shown below. V is the image signal of each converted pixel (△), v is the image signal of the original pixel (〇)
Then, V on each coordinate is Vi,j=vi,j・vi,j Vi _{+1 ,j=vi +1 ,} j・vi ₊₂ ,j Vi,j ₊₁ =vi,j ₊₁・vi, j ₊₂ Vi ₊₁ , j ₊₁ = vi ₊₁ , j ₊₁・vi ₊₂ , j ₊₁ +vi ₊₁ , j ₊₁・
vi ₊₁ , j ₊₂ +vi ₊₁ , j ₊₁・vi ₊₂ , j ₊₂ +vi ₊₂ ,
j ₊₁・vi ₊₁ , j ₊₂ +vi ₊₂ , j ₊₁・vi ₊₂ , ₂₊₂ +vi ₊₁ ,
j ₊₂・vi ₊₂ , j ₊₂ ...Equation (1) is obtained.

Here, "." indicates a logical product operator, and "+" indicates a logical sum operator. Further, the image signal has a black level of 0 and a white level of 1. If the value of V obtained from equation (1) is 0, the image signal at that point is black, and if it is 1, it is white.

The algorithm shown in equation (1) starts from 12pel/mm.
When the conversion rate to 8pel/mm is relatively large and two or more black image signals exist consecutively in the main scanning direction, sub-scanning direction, and diagonal direction of the original pixel, the image signal of the converted pixel is Since it is a black signal, white spots are reduced. Furthermore, when the original pixel is one black point, the image signal of the nearest converted pixel becomes a white point, which has the effect of suppressing the increase in isolated black points and the effect of reducing the jaggedness of line segments due to jitter and the like. Pixel density conversion can be performed by sequentially applying this calculation.

An embodiment of the invention is shown in FIG. Image signal 1 is
After being synchronized line by line using the image signal clock 2 and the synchronization signal 3, each line is led to the line memory circuit 5 via the selector circuit 4, where three lines are stored. At this time, write control to the memory 5 is performed by the write address counter circuit 13, the write control circuit 11, and the selector circuits 10 and 15.

After three lines have been stored, the read address counter circuit 14 and the read control circuit 12
The image signal 6 read out from the line memory 5 is shifted by a 1-bit shift circuit 7 for each line, and then subjected to the calculation of equation (1) in the arithmetic circuit 8 to obtain a converted image signal 9.

In addition, Figure 3 shows the pixel density from 8 pel/mm to 12 pel/mm.
The algorithm for converting to mm is explained, and the formula for determining the image signal level of the converted pixel when converting from the original pixel to the converted pixel is shown below.
When P is the image signal of the converted pixel and p is the image signal of the original pixel, P on each coordinate is Pi, j=pi, j・pi, j Pi ₊₁ , j=pi, j・pi ₊₁ , j＋pi ₊₁ ，j・pi ₊₁ ，
j ₊₁ Pi ₊₂ , j＝pi ₊₁ , j・pi ₊₂ , j＋pi ₊₁ , j・pi ₊₁ ,
j ₊₁ Pi, j ₊₁ = pi, j・pi, j ₊₁ + pi, j ₊₁・pi ₊₁ , j ₊₁ Pi ₊₁ , j ₊₁ = pi, j, pi ₊₁ , j+pi, j・pi,j ₊₁ +
pi, j・pi ₊₁ , j ₊₁・pi ₊₁ , j・pi ₊₁ , j ₊₁ +
pi ₊₁ , j・pi, j ₊₁ +pi ₊₁ , j ₊₁・pi, j ₊₁ Pi ₊₂ , j ₊₁ = pi ₊₁ , j・pi ₊₂ , j+pi ₊₁ , j・pi _{+ 1} ,
j ₊₁ +pi ₊₁ ,j・pi ₊₂ ,j ₊₁ +pi ₊₂ ,j・pi ₊₂ ,
j ₊₁ +pi ₊₂ ,j・pi ₊₁ ,j ₊₁ +pi ₊₁ ,j ₊₁・
pi ₊₂ , j ₊₁ Pi, j ₊₂ = pi, j ₊₁・pi, j ₊₂ + pi, j ₊₁・pi ₊₁ , j ₊₁ Pi ₊₁ , j ₊₂ = pi, j ₊₁・pi ₊₁ ,j ₊₁ ＋pi,j ₊₁・pi,j ₊₂
+pi, j ₊₁・pi ₊₁ , j ₊₂ +pi ₊₁ , j ₊₁・pi ₊₁ , j ₊₂
+pi ₊₁ , j ₊₁・pi, j ₊₂ +pi, j ₊₂・pi ₊₁ , j ₊₂ Pi ₊₂ , j ₊₂ =pi ₊₁ , j ₊₁・pi ₊₂ , j ₊₁ +pi ₊₁ ，j ₊₁・
pi ₊₁ , j ₊₂ +pi ₊₁ , j ₊₁・pi ₊₂ , j ₊₂ +pi ₊₂ ,
j ₊₁・pi ₊₂ , j ₊₂ +pi ₊₂ , j ₊₁・pi ₊₁ , j ₊₂ +
pi ₊₁ , j ₊₂ + pj ₊₂ , j ₊₂ ...Equation (2) At this time, if the value of P obtained from Equation (2) is 0, the image signal at that point is black, and if it is 1, it is white. shall be. This algorithm can be implemented by simply changing the circuit shown in FIG. 2 to a form corresponding to the calculation method (2) of the calculation circuit 8.

(Effects of the Invention) As explained above, the present invention converts a converted pixel into a black signal when there are two or more black signals in the main scanning direction, sub-scanning direction, and diagonal direction of each original image signal, and blacks out isolated points. Since the signal is a white signal, there are no white spots, and by suppressing the increase in black isolated points and jitter, it is effective in reducing image quality deterioration.

[Brief explanation of drawings]

Figure 1 is a diagram explaining the conversion algorithm from pixel density 12 pel/mm to 8 pel/mm, Figure 2 is a block diagram of an embodiment of the present invention, and Figure 3 is a pixel density of 8 pel/mm.
It is a figure explaining the conversion algorithm from to 12 pel/mm. 1...Binary image signal (original image signal), 2...
...Picture signal clock, 3...Picture signal synchronization signal, 4...
... Selector circuit, 5 ... Line memory circuit, 6 ... Memory readout image signal, 7 ... 1-bit shift register circuit, 8 ... Arithmetic circuit, 9 ... Converted image signal, 10 ... Selector circuit, 11 ...Write control circuit, 12...Read control circuit, 13...
...Write address counter circuit, 14...Read address counter circuit, 15...Selector circuit.

Claims (1)

[Claims] 1. A memory circuit that can store 3 lines of binary image signals, and a logical product of two binary image signals in the main scanning direction of 4 original pixels surrounding a converted pixel of the binary image signal stored in the memory circuit. and 2 in the sub-scanning direction.
a circuit that calculates an AND of two binary image signals, a logical product of two diagonal binary image signals, and an arithmetic circuit that calculates a logical sum of the results obtained by the arithmetic circuit; A facsimile device having a pixel density conversion mechanism characterized in that a pixel signal of a converted pixel is determined as a black level or a white level depending on whether it is 0 or 1.