JPH03244032A - Bit conversion system per word - Google Patents

Abstract

PURPOSE:To improve the interchangeability of application programs and to reduce the manhour of transfer by setting the idle bits to the architecture data on a computer having a large bit number per word at every prescribed bit. CONSTITUTION:The idle bits are set to the architecture data on the computer having a large bit number per word at every prescribed bit. For instance, the bit address conversion is applied to the character data 1 of a 36-bit/word computer so that the idle bits are set at every fixed number of bits in terms of hardware. Thus, the data 1 is converted into an image 2 of the 32-bit/word integer type data. Then the arithmetic processing 3 is carried out. In such a constitution, the interchangeability of application programs is improved and the manhour of transfer is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a bit-per-word conversion method, and in particular, for the compatibility of scientific and technical calculation application programs, for example, 32 bits/word and 36 bits/word conversion method. This paper relates to a hardware-based bit-per-word conversion method for improving computation compatibility between computers with different architectures.

[Conventional technology]

Conventionally, when porting an application program from this type of 32-bit/word machine to a 36-bit/word machine, the source program had to be manually inspected when referring to a piece of data with different attributes during arithmetic processing. and was converting the data.

[Problem to be solved by the invention]

In the conventional method described above, it is necessary to manually examine the source program and convert the relevant parts. Therefore, there are disadvantages in that the number of man-hours for porting the program increases and the logic of the source program itself is also changed.

[Means to solve the problem]

The bit conversion method per word of the present invention is a bit change method when performing arithmetic processing between computer architectures having different numbers of bits per word. It is constructed by setting predetermined bits and empty bits in the architecture data.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

First, an overview of the present invention will be explained.

The outline of the present invention is, for example, regarding arithmetic processing on a 36-bit/word computer, there are two instruction systems: instructions that operate in 32-bit mode and instructions that operate in 36-bit mode. If you have a 36-bit/word computer and want to perform arithmetic processing compatible with a 32-bit/word computer, you need to convert the bit addresses using hardware so that the application program can perform arithmetic processing using a 32-bit/word image. It's a Nishida thing. Also, in this case, the compiler generates an object program having 32-bit mode arithmetic processing instructions.

FIG. 1 is an explanatory diagram of a bit conversion method according to an embodiment of the present invention. Reference numeral 1 in FIG. 1 is an expanded image of character data in memory in a 36-bit/word computer. Normally, in such a format, it is impossible to use character data as integer data for arithmetic processing.

Therefore, as shown in expansion image 2, the bit address is converted so that an empty bit is provided for every fixed number of bits in hardware, and the data is converted into an image of 32 bits/word integer type data so that calculation processing can be performed. Make it. Also,
This conversion process is performed in the application program before and after a part where arithmetic processing is performed on character data as integer data. If the compiler option to use this compatibility feature is specified, the compiler will
Generate an object program that uses moodware instructions as described above.

Here, in the expansion image I of character data in the memory of a 36-bit/word computer, bit addresses θ, 9, 18, 27 and no hits are assumed to be absent, and bit addresses 1 to 8.10 to 17.19 to 26
．． Bits 28 to 35 are converted and mapped to bit addresses θ to 7, 8 to 15, 16 to 23, and 24 to 31, respectively, and processing is performed with the image shown in FIG. 1. Therefore, it is possible to process the data of the expanded image 3 of 32 bits/word.

Also, when compiling the application program,
If you specify the compile option in the job description language to use this compatible function as shown in Figure 2, the compiler will generate an object program that performs the bit conversion instruction shown in Figure 1 in the part where bit f conversion is required. do.

〔Effect of the invention〕

As explained above, the present invention is applicable to application programs developed on 32-bit/word machines (particularly
ORTRAN) to a 36-bit/word machine, and when using certain data with different attributes such as character data and integer data, it is necessary to manually convert the data that was currently modified manually. , Application 5- This has the effect of improving program compatibility and reducing the number of porting steps. Further, by using the same method, it is also possible to treat character data as real number data. Furthermore, 36
When converting from a bit/word to a 32-bit word, overflow may occur depending on the data, but if this is a restriction and an overflow error notification is issued, portability becomes possible.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing an example of bit conversion according to the present invention, and FIG.
The figure is an explanatory diagram of compile options that specify compatible functions of the present invention. 1-3...Development image.

Claims (1)

[Claims] In a bit change method when performing arithmetic processing between computer architectures that have different numbers of bits per word, empty bits are added for each predetermined bit in the data of a computer architecture that has a large number of bits per word. A bit-per-word conversion method characterized by the following: