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JPH03240826A - Arithmetic unit applying logarithm expressing numerical computing method having scaling function - Google Patents

Arithmetic unit applying logarithm expressing numerical computing method having scaling function

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Publication number
JPH03240826A
JPH03240826A JP3813390A JP3813390A JPH03240826A JP H03240826 A JPH03240826 A JP H03240826A JP 3813390 A JP3813390 A JP 3813390A JP 3813390 A JP3813390 A JP 3813390A JP H03240826 A JPH03240826 A JP H03240826A
Authority
JP
Japan
Prior art keywords
output
input
adder
numerical
calculation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3813390A
Other languages
Japanese (ja)
Inventor
Tomio Kurokawa
黒河 富夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP3813390A priority Critical patent/JPH03240826A/en
Publication of JPH03240826A publication Critical patent/JPH03240826A/en
Pending legal-status Critical Current

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  • Image Processing (AREA)

Abstract

PURPOSE:To use the conversion tables and the addition/subtraction tables as they are and to widen the range of the handling numerical value by providing an input adder between an input conversion tables and a computing element and an output adder between a computing element and an output conversion table respectively. CONSTITUTION:The input data X1,...,Xn on the fixed decimal points are converted into the logarithms via an input conversion table 1 to calculate fj (X1,...,Xn). At the same time, an input adder 2 adds together -K1,...,-Kn and a computing element 3 applying a logarithm expressing numerical computing method performs the due calculation. An output adder 4 adds the proper value, e.g., gj (K1,...,Kn) to the calculation result of the element 3. Then this addition value is converted into the number of fixed decimal points via an output conver sion table 5. Thus, the original output result fj (K1,...,Kn) can be obtained.

Description

【発明の詳細な説明】 (産業上の利用分野) コンピュータなどの装置において画像データ、音宙デー
タ、座標データ等の数値データの計算におけるより広い
数値データの取り扱い及び入カデタと出力データのスケ
ーリングに関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Field of Application) Related to the handling of a wider range of numerical data and the scaling of input and output data in the calculation of numerical data such as image data, acoustic space data, and coordinate data in devices such as computers. .

(従来の技術) 対数表現数値演算法とテーブル変換による固定少数点数
の演算法(例えば、文献:黒河冨夫、水越剛成、”画像
の高速精密幾何学変換−一対数表現数値演算法の利用−
一  グラフィックスとCADシンポジウム論文集(情
報処理学会)、pp。
(Prior art) Logarithmic representation numerical calculation method and fixed point number calculation method using table conversion (for example, literature: Tomio Kurokawa, Tsuyoshi Mizukoshi, "High-speed precise geometric transformation of images - Utilization of logarithmic representation numerical calculation method -
1 Graphics and CAD Symposium Proceedings (Information Processing Society of Japan), pp.

217−226.1989)は演算速度などの点で非常
に有効デある。しかし、数値表現のためのビット数が限
られている場合、演算精度を上げるためのビット数を増
やすと数値のダイナミックレンジが小さくなる欠点があ
る。
217-226.1989) is very effective in terms of calculation speed. However, when the number of bits for numerical expression is limited, increasing the number of bits to improve calculation precision has the disadvantage that the dynamic range of the numerical value becomes smaller.

対数表現数値演算法について: 対数表現数値演算法においては、数値は式(1)のよう
に表現される。
Regarding the logarithmic representation numerical calculation method: In the logarithmic representation numerical calculation method, a numerical value is expressed as shown in equation (1).

sdOdl−dmfl−fn      (1)ここで
s、di、fjはOまたは1でSは数値の符号、d一部
とf一部の間には少数点があるとし、従って、d一部は
整数部、f一部は少数部である。
sdOdl-dmfl-fn (1) Here, s, di, fj are O or 1, S is the numerical sign, and there is a decimal point between part d and part f, so d part is an integer. Part, f part is a minority part.

対数の底は暗黙の値で1より大きい数aである。The base of the logarithm is an implicit value, a number a greater than 1.

式(1)は式(2)の値を表す。Equation (1) represents the value of equation (2).

カデータ及び出力データの柔軟なスケーリングを±ad
OdI°°°dmf1°”fn  (2)従って、d一
部とf一部は少数部のある固定小数点数で数値の指数で
ある。よって、この表現法による正の最大値は 正の最小値は である。従って、絶対値が式(3)より大きい数、また
は式(4)より小さい数は表せない。
±ad flexible scaling of data and output data
OdI°°°dmf1°"fn (2) Therefore, dpart and fpart are fixed-point numbers with decimal parts and are exponents of numbers. Therefore, the maximum positive value according to this representation is the minimum positive value Therefore, a number whose absolute value is larger than Equation (3) or smaller than Equation (4) cannot be expressed.

(発明が解決しようとする課題) 本発明は上記従来法の欠点を解消するもので、従来の対
数表現数値演算法の変換テーブル及び加算減算テーブル
をそのまま使用して、扱う数値の範囲を広くすることを
目的とする。また同時に入行なうことを目的とする。
(Problems to be Solved by the Invention) The present invention solves the drawbacks of the conventional method described above, and widens the range of numerical values handled by using the conversion table and addition/subtraction table of the conventional logarithmic expression numerical operation method as they are. The purpose is to The aim is to enter the university at the same time.

(問題を解決するための手段及び作用)図1は本発明の
演算装置である。ここでの計算はXI、、、、、Xnを
入力して、例えばfj(XI、、、、、Xn) を計算するものである。XI、、、、  Xnは固定少
数点の入力データでそのまま変換テーブル(1)により
対数へ変換してfj(XI。
(Means and operations for solving the problem) FIG. 1 shows an arithmetic device according to the present invention. The calculation here is to input XI, . . . , Xn and calculate, for example, fj(XI, . . . , Xn). XI...

Xn)を計算すると、その計算途中結果が、使用してい
る数値システム、すなわち、式(2)の範囲では表せな
くなる場合(オーバーフロ、またはアンダーフロ)があ
る。そのような場合、予め入力データXI、、、、、X
nをそれぞれ2K1.、、  2Kn で割ったがごとく、入力加算器(2)で、それぞれ、−
Kl、、、、、 −Knを加算しておき、対数表現数値
演算法による演算器(3)で計算を行なうとオーバーフ
ロやアンダーフロを起こさせなくすることができる。結
果は(4)の出力加算器により適当な値、例えば、gj
(Kl、、、、、Kn )を加えた後、出力変換テーブ
ル(5)により固定小数点数に変換すれば本来の出力結
果(fj(K1、 、 、 、 、 Kn) )を得る
ことができる。
When calculating Xn), the intermediate result of the calculation may not be able to be expressed within the numerical system used, that is, the range of equation (2) (overflow or underflow). In such a case, the input data XI, , , X
n respectively 2K1. ,, As if divided by 2Kn, - in the input adder (2), respectively.
By adding Kl, . The result is converted to an appropriate value by the output adder in (4), for example, gj
After adding (Kl, , , , Kn), the original output result (fj(K1, , , , Kn)) can be obtained by converting to a fixed-point number using the output conversion table (5).

(発明の実施例) 実施例1 本発明を使った8分円の描画計算について説明する。そ
の装置を図2で示す。
(Embodiments of the Invention) Example 1 A calculation for drawing an octant using the present invention will be explained. The device is shown in FIG.

対数表現数値演算法による固定少数点数の計算による8
分円の描画は円の式(5)、 を直接計算することにより行なう。しかし、限られた語
長で計算精度を維持しようとするとあまり大きな数は扱
えない。つまり、あまり大きな円は描けない。例えば、
16ビツトの語長で、a=2゜m二4.n=10である
とすると、表現可能な最大数は216である。従って、
式(6)によりYの最大値は28二256となり、これ
より大きい半径の円は描けない、しかし、式(7) で示すがごとく、入力値RやXを25で割ったがごとく
変換すると(図2では入力加算器(2)でKを加算する
処理、この例では、Kl=Kn=K) 、大きなRやX
の入力も可能であるこの8分円の描画例の場合図1は図
2で示すように具体化され簡略になる。図1の箱(1)
から(5)は、それぞれ図2の箱(1)から(5)に対
  − V[7璽「 (6) 応する。計算結果は出力加算器(4)においてKが加算
され出力変換テーブル(5)により本来の結果が得られ
る。即ち、従来の方法で計算したときにオーバーフロや
アンダーフロが起こらなかった場合とおなし結果かえら
れる。即ち、精度は変わらないと言うことである。
8 by calculating fixed decimal points using logarithmic expression numerical arithmetic method
The arc is drawn by directly calculating the circle equation (5). However, if you try to maintain calculation accuracy with a limited word length, you cannot handle very large numbers. In other words, you can't draw a very large circle. for example,
With a word length of 16 bits, a=2゜m24. If n=10, the maximum number that can be represented is 216. Therefore,
According to equation (6), the maximum value of Y is 282256, and a circle with a radius larger than this cannot be drawn.However, as shown in equation (7), if you convert the input values R and X as if they were divided by 25, (In Figure 2, the process of adding K in the input adder (2), in this example, Kl=Kn=K), large R or
In the case of this drawing example of an octant circle, which also allows input of , FIG. 1 is simplified and concretely shown in FIG. 2. Box (1) in Figure 1
to (5) correspond to boxes (1) to (5) in Figure 2, respectively. 5) allows the original result to be obtained. In other words, the result is the same as when overflow or underflow did not occur when calculation was performed using the conventional method. In other words, the accuracy remains unchanged.

図1において箱(2)と箱(4)を除くと従来の対数表
現数値演算法を使用した固定少数点ブタの計算装置とな
る。従って、入力変換テーブル(1)、対数表現数値演
算法による演算器(3)の中にある加減算テーブル及び
、出力変換テーブルの内容を変える必要はない。
In FIG. 1, if boxes (2) and (4) are removed, it becomes a fixed-point pig calculation device using the conventional logarithmic expression numerical arithmetic method. Therefore, there is no need to change the contents of the input conversion table (1), the addition/subtraction table in the arithmetic unit (3) based on the logarithmic expression numerical arithmetic method, and the output conversion table.

テップ)にも対応でき、更に、出力加算器により、適当
な値を加算することにより、出力値を要求に応じてスケ
ーリングできる。
Furthermore, an output adder allows the output value to be scaled as required by adding an appropriate value.

これら入力加算器及び出力加算器で加える値(K1等)
は整数である必要はなく、小数点以下に値を持つ固定少
数点数でもよい。
Values added by these input adders and output adders (K1, etc.)
does not have to be an integer; it can be a fixed-point number with values below the decimal point.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の演算装置の構成図、第2図は円の描画
計算のための演算装置の具体例の構成図である。 (発明の効果) 本発明により、対数表現数値演算法を使って、固定少数
点数の計算をする場合、計算精度(相対精度)を落とす
ことなく広い範囲の数値を扱うことができる。
FIG. 1 is a block diagram of a computing device according to the present invention, and FIG. 2 is a block diagram of a specific example of a computing device for calculation of drawing a circle. (Effects of the Invention) According to the present invention, when calculating a fixed decimal point number using a logarithmic expression numerical calculation method, a wide range of numerical values can be handled without reducing calculation accuracy (relative accuracy).

Claims (1)

【特許請求の範囲】[Claims] 1、対数表現数値演算法による演算器(3)において、
入力変換テーブル(1)と該演算器(3)の間に入力加
算器(2)を備え、該演算器(3)と出力変換テーブル
(5)の間に出力加算器(4)を持つことを特徴とする
演算装置
1. In the arithmetic unit (3) using the logarithmic expression numerical arithmetic method,
An input adder (2) is provided between the input conversion table (1) and the arithmetic unit (3), and an output adder (4) is provided between the arithmetic unit (3) and the output conversion table (5). A computing device characterized by
JP3813390A 1990-02-19 1990-02-19 Arithmetic unit applying logarithm expressing numerical computing method having scaling function Pending JPH03240826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3813390A JPH03240826A (en) 1990-02-19 1990-02-19 Arithmetic unit applying logarithm expressing numerical computing method having scaling function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3813390A JPH03240826A (en) 1990-02-19 1990-02-19 Arithmetic unit applying logarithm expressing numerical computing method having scaling function

Publications (1)

Publication Number Publication Date
JPH03240826A true JPH03240826A (en) 1991-10-28

Family

ID=12516940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3813390A Pending JPH03240826A (en) 1990-02-19 1990-02-19 Arithmetic unit applying logarithm expressing numerical computing method having scaling function

Country Status (1)

Country Link
JP (1) JPH03240826A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0635680A (en) * 1992-06-03 1994-02-10 Internatl Business Mach Corp <Ibm> Digital circuit computing logarithm and method of operating computer system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0635680A (en) * 1992-06-03 1994-02-10 Internatl Business Mach Corp <Ibm> Digital circuit computing logarithm and method of operating computer system

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