JPH03237750A - Lead frame for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To acquire a stable lead frame of good adhesion, solderability, and appearance by partially providing a Pd plating layer to both an inner lead part and an outer lead part. CONSTITUTION:In a Cu alloy lead frame, a Pd strike plating layer is provided for improving adhesion to the entire of a lead frame which is provided with an Sn-Ni plating layer which relates to a nickel alloy foundation plating layer for improving acid resistance. Thereafter, an outer lead part 3 and an inner lead 5 are provided with a Pd plating layer 18 through an outer lead opening part 16 and an inner lead opening part 17 using a silicon rubber mask 15. The Pd plating film has good wire bonding properties by an Au wire and good solderability; therefore, it is possible to substitute it for Ag plating of a conventional inner lead part and solder plating of an outer lead part only by providing a Pd plating film on a lead frame.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a lead frame for a semiconductor integrated circuit, and particularly to a lead frame for a semiconductor integrated circuit suitable for reducing manufacturing man-hours, stabilizing quality, and increasing reliability. This invention relates to lead frames for circuits.

[Conventional technology 1] First, a conventional lead frame for semiconductor integrated circuit (hereinafter referred to as I
The C lead frame will be explained with reference to FIGS. 3 and 4.

Figure 3 is a plan view showing the structure of an IC lead frame in the film, and Figure 4 is an IC using the lead frame in Figure 3.
It is an enlarged sectional view of C package.

In Fig. 3, 1 is a lead frame, 2 is an outer frame part, and 3 is a lead frame.
is the outer lead part, 4 is the dam bar, 5 is the inner lead part, and 7 is the IC chip! 8 is the pilot hole, 9 is the 3n-N+ (tin) hole on the entire surface of the lead frame.
nickel> alloy plating layer; 10 indicates the ACI (silver) plating layer at the tip of the inner lead.

That is, an IC lead frame generally includes an IC chip mounting section 7, an inner lead section 5, an outer lead section 3, an outer frame section 2, and the like.

The method for manufacturing an IC package is as shown in FIG.
After bonding the IC chip 13 onto the C chip mounting part 7, the electrode part of the IC chip 13 and the AQ plating layer 10 of the tip part 6 of the inner lead 5 are bonded with an ultrafine wire 1 made of An (gold) or the like.
Wire bonding in step 2. After that, mold resin 1
It is molded with 4.

Furthermore, in order to improve the adhesion when mounting the IC package on a printed circuit board, after cutting the outer frame part 2 of the lead frame 1, a 5n-
A solder plating layer 11 is provided through the Ni alloy plating layer to complete the IC package.

However, with this method, after assembly, the outer
During the hot-dip plating in which part 1 is immersed, heating exceeding 200° C. is performed, which may result in thermal shock, which may cause cracks in the resin mold related to the molding resin. Moreover, this method has poor productivity and high cost. Furthermore, the flux used during hot-dip plating contaminates the IC package, outer leads, etc., which causes a decrease in the reliability of the IC.

To solve these problems, lead frames have recently been developed in which the inner leads are coated with a plating layer and the outer leads are coated with a solder plating layer before the IC package is assembled. There is.

In addition, as related to these technologies, for example, Japanese Patent Application Laid-Open No. 150656/1983 discloses a lead frame in which palladium plating is applied only to the tip of the outer lead part, but the outer lead part and the inner lead part are plated with palladium. There was no suggestion of palladium plating on any of the parts.

[Problems to be Solved by the Invention] Among the above-mentioned conventional techniques, there are two types of manufacturing processes, particularly those in which an AO plating layer is provided on the inner lead portion and a solder plating layer is provided on the outer lead portion. be.

In the first manufacturing process, Ag is applied to the tip 6 of the inner lead 5.
This is a method in which a plating layer 10 is provided, and then the outer lead portion 3 is plated with solder.

However, in this method, since solder plating is performed after AQ plating, the plating surface is contaminated with organic matter in the solder plating, reducing adhesion and lowering the reliability of the IC. Therefore, in order to improve adhesion, the AQ plating surface should be
It was necessary to remove the film by a length of .mu.m or more, and the life of the stripping solution was short, which was economically disadvantageous. Further, there was a problem that the appearance deteriorated due to the excessive distance of Ag.

In the second manufacturing process, a solder plating layer 11 is first provided on the outer lead portion 3 of the lead frame 1, and then an AO
Copper strike plating was applied to improve plating adhesion. Next, apply Ag only to the tip 6 of the inner lead 5.
This is a method in which a plating layer 10 is provided and the Cu strike plating is peeled off so as to remove the Cu strike plating on the solder.

However, during this stripping, the j'l that had entered the stripping solution
Ion or Ag bleeding from the side of the mask during plating
Due to the plating solution, AQ is substituted and precipitated on the solder, resulting in a problem that the appearance of the solder deteriorates.

The present invention has been made to solve the problems of the prior art described above, and has good productivity, can reduce costs, has good adhesion and soldering properties, and has a good appearance. The purpose of this invention is to provide a highly reliable lead frame for semiconductor integrated circuits.

[Means for Solving the Problem] In order to achieve the above object, the structure of the lead frame for a semiconductor integrated circuit according to the present invention is as follows: In the lead frame for a semiconductor integrated circuit, a nickel alloy base plating layer is provided on the entire surface of the lead frame, and a palladium plating layer is provided on the inner lead portion and the outer lead portion through the nickel alloy base plating layer. It is something that has been established.

The technical idea behind the development of the present invention is to replace the conventional Ag plating and solder platter with good solderability (solder wettability) while maintaining good adhesion (wire bondability). This was achieved by plating (palladium), and was partially plated with expensive Pd.

The technical means will be described in more detail as follows.

As a result of examination as in the examples described below, it was confirmed that the thickness of the Pd plating is 0.1 μm or more to provide good adhesion and soldering properties.

In addition, a Cu alloy or a C alloy is used as the lead frame material.In order to reduce costs, a Pd plating layer is partially applied to only the inner lead part and the outer lead part of the entire lead frame surface. I decided to set it up.

The Pd plating film has good adhesion to Au wire (wire bonding property) and good soldering properties, so simply providing the PD plating film on the lead frame can replace the conventional Ag plating on the inner lead part. It can be used as an alternative to solder plating on the mounting and outer lead parts.

[Effect] The operation of the above conventional means is as follows.

The gist of the present invention is to partially (
(Optional) A Pd plating layer is provided on both the inner lead part and the outer lead part.

Therefore, in the present invention, the first 'l' of the prior art described above is solved.
'80 Peeling treatment of plating surface in J construction process, or
The execution of Cu strike plating and its peeling process in the second @I manufacturing process could be omitted, and a significant time reduction in the second manufacturing process could be achieved. At the same time, it has become possible to produce lead frames of stable quality with excellent adhesion (wire bondability), solderability, and appearance.

[Examples] Examples of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 is an enlarged sectional view of an IC package using a lead frame according to an embodiment of the present invention, and FIG. 2 is a plan view of a mask used for manufacturing the lead frame.

In FIG. 1, the same reference numeral 8 as in FIG. 4 is the same as that of the prior art, so the explanation thereof will be omitted.

Further, the shape of the IC lead frame, which is the subject of the following experimental explanation, is the same as that shown in FIG. 3.

Example 1 A 5n-Ni plating layer related to the nickel alloy base plating layer was added to the Cu alloy lead frame by approximately 0.2 to improve acid resistance.
A PD strike plating layer was provided on the entire surface of the lead frame with a thickness of .mu.m to improve adhesion. The plating conditions are as follows.

Pd Strike plating solution: Paradox Strike II
(EEJA) Metal Pd degree: 0.5(1)/j Temperature
: 40°C Current density: 5A/dm2 Anode: Platinum-plated titanium plate Then, using a silicone rubber mask 15 as shown in FIG. 2, outer lead openings 16 and inner lead openings 17 shown by hatching were formed. A plating layer 18 shown in FIG. 1 is applied to the outer lead part 3 and the inner lead part 5 via
has been established.

Various types of Pd-plated 1Ii1B with a thickness of 0.01, 0.05°, 0.1 and 1.3 μm were prepared and compared experimentally.

The plating thickness was measured using a fluorescent X-ray film thickness meter. The plating conditions are as follows.

Pd plating solution: Paradex 110 (EL: JA) Metal pd concentration: 25 g/J) Temperature: 260°C Current density: 2Δ/dm2 Anode: Platinum-plated butane plate Next, as Comparative Example 1, a conventional technology A solder plating layer was provided on the outer lead portion of a lead frame in which a 5n-Ni plating layer of about 0.2 μm was provided on a certain Cu alloy lead frame. The plating conditions are as follows.

Solder plating solution: Soldarex E CEEJA) (
Sn70%, Pd30%> Temperature = 25°C Current density: 30A/dm2 Anode: Platinum-plated titanium plate Next, Cu strike plating was performed in order to improve the 119 Wilt property of /l plating. The plating conditions are as follows.

CnCN: 20o/J KCN: 44Q/1, Rossel salt:
40Q/A, Temperature: 55° C. Current density: 2A/dm2 Anode: Stainless steel plate After that, an Aq plating layer was provided at the tip of the inner lead. The plating conditions are as follows.

Ao plating solution Nisil Burget 220 (Meltex) Metal ACIII 11 degrees: 65o/n temperature
= 65° C. Current density: 60 A/dm2 Anode: Platinum-plated titanium plate Finally, the AQ and Cu strike plating deposited on the side surface of the inner lead portion was removed by peeling treatment. The peeling conditions were as follows.

Stripping agent: Enstrip S (Meltex) 30a/j NaCN: 50Q/fJ Temperature: 40°C Stripping time: 20 seconds Next, as Comparative Example 2, a copper alloy lead with 0.2 μm of 5n-Ni plating was prepared. First, AQ plating was applied to the tips of the inner leads of the frame, and then solder plating was applied to the outer leads. And finally, it was attached to AQ plating. 2μ of AO to remove organic matter from solder plating solution
m peeled off. The plating and peeling conditions were the same as those shown in Comparative Example 1 above.

The characteristics of the lead frame of the example according to the present invention obtained in this manner and comparative examples 1 and 2 according to the prior art were tested (
experiment> and compared.

The comparison items were adhesiveness (wire bondability), solderability (solder wettability), and lead frame appearance, and the experimental results are shown in Table 1.

The conditions for each test item are as follows.

The adhesion (wire bonding) test was conducted at a temperature of 175° C. using ultrasonic waves, and evaluated by the ratio of the number of non-bonded shots to the total number of shots.

Solder wetting time: Use lead frame after heating at 175°C for 8 hours (simulating the heating conditions during the assembly process) Solder bath temperature: 235°C Solder composition: 6:40 Inventive example), when the Pd metallization 7% is 0.1 μm or more, the lead frame of Comparative example 1,
It was found that the lead frame appearance and adhesiveness were superior to Comparative Example 2.

Further, after heating at 175° C., the solder wetting time was measured using a meniscograph. The lead frame of this example is P
It was shown that when the d plating thickness was 0.05 μm or more, the wetting time was further shortened compared to Comparative Example 1.2.

Example 2 A 42% N1 alloy (Fe-12% Ni) was provided with Pd strike plating, and then Pd plating was provided with a thickness of 0.01 to 3 μm. The plating thickness was measured using a fluorescent XWA film thickness meter. Each plating condition is the same as in Example 1 above.

Next, as Comparative Example 3, a lead frame was produced in which the outer lead portion of a 42% N:alloy lead frame was first provided with solder plating, and then the inner lead portion was provided with AQ plating. The plating conditions and other production conditions are the same as in Example 1.

Table 2 shows the results of comparing the characteristics of the lead frame of this example (example of the present invention) obtained in this way and the lead frame of comparative example 3.The test conditions for the comparison items were the same as in example 1. be.

From Table 2, even when the Pd plating base is 42% Ni alloy, the lead frame of this example has a Pd plating thickness of 0.05 μm or more as in Example 1, and has excellent adhesion. It can be seen that the wire bondability (wire bondability), solderability (solder wettability), and appearance are shown.

According to each of the above embodiments, a lead frame with excellent adhesiveness, solderability, and appearance can be obtained.

As detailed above, conventionally, molten solder or electroplating was performed after AQ plating. However, this method has problems such as cracks in the mold resin due to thermal shock, decreased tC reliability due to flux contamination, and poor productivity.

Also, lead frames have been developed in which AQ plating is applied to the inner lead portion and solder plating is applied to the outer lead portion. However, this has a complicated manufacturing process as described below, and requires two types of plating on the functional parts, the inner lead part and the outer lead part, making it difficult to satisfy both appearance and characteristics. .

Conventional technology <1) m fat → pickling - solder plating → CLI strike plating → AU spot plating, → CLJ strike plating, llj peeling → water washing → drying (2) resin → pickling → Cu strike plating → AO spot plating → solder plating → A0 surface cleaning → washing with water → drying This example (example of the present invention) Resin → Pickling -> p d strike plating → Pd plating In this example, Pd plating 1 This type of plating performs the functions of conventional AQ plating and solder plating, and since it is partial plating, costs can be reduced.

[Effects of the Invention] As explained in detail above, according to the present invention, productivity is good, costs can be reduced, and good adhesion and
Lead frames for semiconductor integrated circuits (IC lead frames) that are easy to solder, have a good appearance, and are highly reliable.
can be provided.

[Brief explanation of drawings]

FIG. 1 is an enlarged sectional view of an IC package using a lead frame according to an embodiment of the present invention, FIG. 2 is a plan view of a mask used for manufacturing the lead frame, and FIG. FIG. 4 is a plan view showing the structure of the lead frame.
4 is an enlarged cross-sectional view of an IC package using the lead frame of FIG. 3. FIG. 1: Lead frame, 2: Outer frame portion, 3: Outer lead portion, 5: Inner lead, 7: IC chip mounting portion, 9: 5n-Ni alloy plating layer 13: IC chip, 18: Pd plating layer. % day number kyotokunitomi

Claims (1)

[Claims] 1. In a lead frame for a semiconductor integrated circuit consisting of an IC chip mounting part, an inner lead part, an outer lead part, and an outer frame part, a nickel alloy base plating layer is provided on the entire surface of the lead frame, and among these, the inner lead part A lead frame for a semiconductor integrated circuit, characterized in that a palladium plating layer is provided on the outer lead portion and the nickel alloy base plating layer via the nickel alloy base plating layer.