JPH03225851A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To prevent increase in power consumption of a redundant rescue product by connecting one part or all of a signal line driving a sense amplifier to the sense amplifier through a fuse. CONSTITUTION:NMOS transistors 11 and 12 of a sense amplifier 1 are connected to a signal line phin and PMOS transistors 13 and 14 are connected to a signal line phip through a fuse 15. Then, if bit lines BL and BL# are short-circuited, a CD path is created from the signal line phip to the signal line phin through the transistors 11-14 after a time t2, thus causing current consumption to increase. Thus, if there are such faulty bit lines, a fuse 15 is cut off after redundancy rescue and the signal line phip and the sense amplifier 1 are cut off, thereby preventing DC path from occurring after a time t2 and preventing current consumption from increasing.

Description

[Detailed description of the invention] <Industrial application field> The present invention relates to a semiconductor memory device.

<Conventional technology> There has been remarkable progress in semiconductor memory devices in recent years, and RA
The density of M, ROM, and other memories is increasing fourfold every three years.

With such miniaturization, the cleanliness of the manufacturing process has steadily improved, but the occurrence of defective circuits is unavoidable, so it is important to provide redundant circuits. Especially in the early stages of mass production, redundant circuits play a large role.

<Problems to be Solved by the Invention> By the way, redundancy relief processing, which replaces defective circuits with normal circuits when they occur, is one of the important processes in the manufacturing process. Since the wiring is not completely separated from normal circuits, there is a problem in that redundant relief products consume more power than completely non-defective products. In particular, if a pair of bit lines connected to the sense amplifier are short-circuited, the signal line at GND level connected to the sense NMO8) transistor and the Vcc connected to the pull-up PMOS transistor The signal line at the level is electrically connected through those transistors and the bit line, and from VCC to GND.
There was a problem in that a DC path was created towards the end, causing an extra current to flow, increasing power consumption.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor memory device in which when a bit line is defective, the defective bit line can be separated from the sense amplifier connected to it, and the power consumption of redundant relief products does not increase. It is about providing.

Means for Solving the Problems> To achieve the above object, a first invention provides a semiconductor memory device having a sense amplifier, in which a part or all of the signal line for driving the sense amplifier is connected to the above through a fuse. It is characterized by following the sense amplifier.

Further, a second invention is a semiconductor memory device having a sense amplifier, characterized in that a bit line connected to the sense amplifier has a cuttable portion.

In this second invention, the cuttable portion may be a fuse.

Further, in the second invention, the cuttable portions can be arranged close to each other for each sense amplifier.

Effect> In the first invention, by cutting the fuse of the sense amplifier connected to the defective bit line, part or all of the signal line is separated from the sense amplifier. Therefore, since no DC path is formed between the signal lines, no extra current flows, resulting in increased power consumption.

In addition, in the second invention, by cutting the cuttable portion of the defective bit line, as in the first invention, no DC path is formed between the signal lines, so no excess current flows, and power consumption is increased. It won't happen.

In addition, if the above cuttable part is a fuse, cutting the fuse of the defective bit line will prevent excess current from flowing and increase power consumption because a DC path cannot be created between the signal lines in the same way as above. There isn't.

Furthermore, if the cuttable portions are arranged close to each other for each sense amplifier, the defective bit lines can be cut all at once, making the cutting process easier.

<Example> Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.

Embodiment of the First Invention FIG. 1 is a circuit diagram showing the main part of a DRAM according to an embodiment of the first invention.

In FIG. 1, l is a sense amplifier, 2 is a memory cell array, φp and φn are signal lines, and BL and BL# are bit lines. As the material for this bit line, for example, polysilicon or tungsten polycide is used.

NMOS transistors 11 and 12 of the sense amplifier 1 above
is connected to the signal line φn, and the PMOS transistors 13 and 14 are connected to the signal line φp via the fuse 15.
is connected to. In addition, the upper bit line BL is
The bit line BL# is connected to the connection between the MOS) transistor 11 and the PMOS) transistor 13, and the bit line BL# is connected to the NMO 8) lannostar 12 and the PMOS) transistor 14.
is connected to the connection part.

FIG. 2 shows changes in the sense signal for operating the circuit shown in FIG. 1.

As shown in FIG. 2, in the standby state, signal lines φp and φn are normally at 1/2V. . bit lines BL and BL# are also precharged to 1/2 Vcc level. Then, when the sensing operation starts at time t1, φn first falls, and mainly the low level side of the bit line is pulled down via the NMOS transistors 11 and 12. Next, at time t, φp rises,
The bit line on the high level side is pulled up via PMOS transistors 13 and 14.

If the bit lines are short-circuited, at time t, the sense amplifier is switched on. Transistor II.

A DC path is created from the signal line φp to the signal line φn via lines 12, 13, and 14, resulting in an increase in current consumption.

Therefore, if there is such a defective bit line, if the fuse 15 is cut off after redundancy relief and the signal line φp and the sense amplifier i are separated, the current consumption will be reduced without any DC path occurring from time t onwards. increase is suppressed.

In this embodiment, the fuse is provided only on the signal line φρ side, but even if the fuse is provided only on the signal line φn side,
A similar effect can be obtained even when provided on both the signal line φp side and φn side.

Note that when a plurality of bit lines are replaced at once by redundancy relief, it is sufficient to provide one fuse for each group. Figure 3 is a circuit diagram showing the main part of the RAM according to the first embodiment of the present invention.

In FIG. 3, 31 is a sense amplifier, 32 is a fuse, 33 is a memory cell array, and BL and BL# are bit lines.

The sense amplifier 31 has the same circuit configuration as the sense amplifier 1 shown in FIG. However, no fuse is provided between the signal line and the sense amplifier.

Therefore, if the bit lines BL and BL# are shorted,
Similar to the case of FIG. 1, a DC path is created from Vcc to GND through these transistors, resulting in an increase in current consumption.

Therefore, if there is such a defective bit line, if the fuse 32 of the defective bit line is cut after redundancy relief and the defective bit line and the sense amplifier 31 are disconnected, the sense amplifier 31 will be disconnected when the sensor is not operating. Therefore, an increase in current consumption can be suppressed without generating a DC bus.

Note that the fuse 32 may be constructed in a layer separate from the bit line, but if the bit line itself can be cut, as long as the space necessary for cutting is secured, it is possible to No need to configure.

4E is a circuit diagram showing the main part of the RAM according to the second embodiment of the present invention.

In the RAM of this embodiment, instead of providing the fuse 32 in the RAM of the first embodiment, the bit lines BL and BL# of each sense amplifier 31 can be easily cut into two lines for each sense amplifier. The portion 34 is laid out as shown in FIG.

Therefore, similar to the RAM of the first embodiment, an increase in current consumption is suppressed, and furthermore, the bit line cutting process is facilitated.

<Effects of the Invention> As is clear from the above, in the semiconductor memory device of the first invention, part or all of the signal line for driving the sense amplifier is connected to the sense amplifier via a fuse. If there is a defective bit line, by cutting the fuse and separating the sense amplifier connected to the defective bit line from the signal line, an increase in current consumption can be achieved without generating a DC path in the sense amplifier during sensing operation. It can be suppressed.

Further, in the semiconductor memory device of the second invention, since the bit line connected to the sense amplifier has a cuttable portion, if there is a defective bit line, the cuttable portion of the defective bit line can be removed. By cutting, the same effect as the first invention can be obtained.

Further, in the semiconductor memory device of the second invention, by arranging the cuttable portions close to each other for each sense amplifier, in addition to the above effects, the bit line cutting process can be facilitated. I can do it.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of the main part of a RAM according to an embodiment of the first invention, FIG. 2 is a diagram showing changes in the sense signal in the above embodiment, and FIG. 3 is a diagram of the first embodiment of the second invention. FIG. 4 is a circuit diagram of the main part of the RAM of the second embodiment of the second invention.
FIG. 2 is a circuit diagram of the main parts. 1.31...Sense amplifier, 2.33...Memory cell array, 11.12...NMO5) transistor, 13.14...
...PMOS transistor, 15.32...fuse, 34...cuttable part, φp, φn...signal line, B
L, BL#...Bit line.

Claims (2)

[Claims] (1) In a semiconductor memory device having a sense amplifier,
A semiconductor memory device characterized in that part or all of the signal line for driving the sense amplifier is connected to the sense amplifier via a fuse. (2) In a semiconductor memory device having a sense amplifier,
A semiconductor memory device characterized in that the bit line connected to the sense amplifier has a cuttable portion.