JPH03208477A - Solid-state image pickup device and its driving method - Google Patents

Abstract

PURPOSE:To decrease 8 clocks applied to vertical charge transfer electrodes into 5 clocks by using electrodes for a transfer device for both a picture element section and a storage section in common and providing an electrode for a charge sweepout layer independently. CONSTITUTION:A solid-state image pickup device is a frame inter-line transfer, charge transmission electrodes V1-4 for a picture element section vertical transfer device 2 and a storage section vertical transfer device 3 are used in common and an electrode D is provided on a charge sweepout layer 6 independently. After the end of image pickup scanning period D, before a charge pulse B from the start of a vertical blacking period A, a charge sweepout high speed transfer pulse G is applied to transfer undesired charges such as noise left in the picture element section vertical transfer device 2 are transferred to the storage section vertical transfer device 3. Thus, eight clocks applied to the charge transmission electrodes V1-4 and the electrode D for the charge sweepout layer 6 are decreased into 5 clocks.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a solid-state imaging device I1 and a method for driving the same.

Prior Art A conventional solid-state imaging device will be explained based on the configuration diagram in Fig. 3. A conventional solid-state imaging device includes a photoelectric conversion section l in which a plurality of photoelectric conversion elements are two-dimensionally arranged, and a pixel section vertical transfer device 2 that vertically transfers signal charges accumulated in the optical column conversion section l.
, an accumulation section vertical transfer device 3 that accumulates signal charges for a plurality of horizontal lines transferred from the pixel section vertical transfer device 2, and a charge sweep layer 6 provided in the accumulation section vertical transfer device 3 that sweeps out unnecessary charges. , a horizontal transfer section 4 that horizontally transfers signal charges for one horizontal line transferred from the storage section vertical transfer device 3; and a horizontal transfer section 4 that converts the signal charges from the horizontal transfer section 4 into a signal voltage or signal current and outputs the signal charges. It consists of a signal charge detection section 5. The arrows in FIGS. 3 and 3 indicate the direction of normal signal charge transfer.

FIG. 4 is a typical drive bus waveform diagram of the conventional solid-state imaging device mentioned above. In Figure 4, (a) complex return #l
Erasing signals, (b) to (el are the four-phase clocks (hereinafter referred to as IIVAI to 4) applied to the electrodes VAI to 4 on the pixel vertical transfer device 2, respectively, and (f) to 01 are the accumulation signals, respectively. 4-phase clocks (hereinafter referred to as IIVB1-4) applied to the electrodes VB1-4 on the vertical transfer device 3. The operation will be explained below with reference to FIGS. 3 and 4. First, During the vertical blanking period A, the charges accumulated from the photoelectric conversion unit l to the pixel unit vertical transfer device 2 are transferred to the charge pulse B.
Transfer by . Next, by moving the pixel section vertical transfer device 2 and the storage section vertical transfer device 3t by the number of stages equivalent to one screen at the same time using the vertical high speed transfer bus C, the multiplied charge in the pixel section vertical transfer device 2 is accumulated. Partari ti transfer device 3
Transfer to. Next, during the video scanning period D, a vertical transfer pulse Ft- is applied to the storage vertical transfer device 3 every horizontal scanning period E, and the charges are transferred to the horizontal transfer section 4 every t-1 horizontal scanning period E. At the same time, a horizontal transfer pulse having a frequency that can transfer the signal charges on the horizontal transfer section 4 t-1 times is applied to the horizontal transfer section 4k between the vertical transfer pulses F, and the signal charges are output from the signal charge detection section 5 to 9.

The pixel vertical transfer device 2 also includes a vertical blanking period A.
From the beginning of the charge pulse Bitlt, a high-speed transfer pulse Gt is applied to the pixel section, and unnecessary charges such as noise are transferred to the storage section vertical 11 [transfer device 3 side]. At the same time, is the electrode K#I on the storage vertical transfer device 3 brought out? A pulse is applied during the interval H to sweep unnecessary charges into the semiconductor substrate through the charge sweep layer 6.

With the above operation, smear can be suppressed by transferring the signal charge at high speed during the vertical blanking period A, and the charge pulse B
Compared to LTF's high-speed transfer unnecessary charge sweep (2), noise such as dark current can be reduced by 4. Since the direction in which charges are swept out in the horizontal transfer section 4 is transferred in the four directions of the horizontal transfer section, unnecessary charges can be transferred efficiently and noise x11 can be reduced. Also unnecessary t#
The sweep time can be shortened because it is not necessary to transfer the false charges to the horizontal transfer section 4.

Problem to be Solved by the Invention However, in the conventional structure as described above, the pixel area vertical i
Each electrode vA of the f transfer device 2 and the storage vertical transfer device 3
1-4. VB1 to VB4 require clocks for 4-phase vertical K transfer, and 98-tree clocks, and are required to generate timing [binary values generated from the aI path (for example, 2 of 0.1)].
There was a problem in that eight conversion circuits were required to convert the pulses (values) into three-value paths (for example, three values of O.I.-1) for driving the solid-state imaging device. The present invention solves the above-mentioned problems, and aims to provide a solid-state imaging device and a driving method thereof, in which a conversion circuit for converting from binary pulses to ternary pulses can be made smaller. It is something to do. Means for Solving the Problems In order to solve the above problems, the solid-state imaging device of the present invention includes a photoelectric conversion section, a pixel section vertical transfer device, and a storage device that shares charge transfer power with the pixel section vertical transfer device. A vertical transfer device, a charge sweep layer provided in the storage vertical transfer device, which has a charge independent of the load transfer electrode, a horizontal transmission section, and a signal charge detection section. The driving method is that when unnecessary signal charges in the pixel section vertical transfer device are transferred to the storage section vertical transfer device side, the unnecessary charges are transferred to the semiconductor substrate by applying a voltage to the electrode provided on the charge sweep layer. It is designed to sweep inward. Operation With the above configuration and driving method, the same pulse is applied to the charge transfer electrodes of the normal pixel vertical transfer device and the storage vertical transfer device to vertically transfer signal charges, and unnecessary charges are transferred from the pixel vertical transfer device. A pulse is applied to the charge sweeping electrode only when sweeping unnecessary charges to the sweeping layer, thereby sweeping unnecessary charges into the semiconductor substrate.

Therefore, the number of clocks applied to the charge vertical transfer electrodes is 5, and the number of circuits for converting from binary to 3[bus] is also 5.
reduced to a system. EXAMPLE Hereinafter, an example of the present invention will be explained based on the drawings. Among them, the configurations that are the same as the configuration of the conventional example shown in FIG. Figure 1 is a diagram of the structure of a solid-state imaging device showing one embodiment of the present invention. The solid-state imaging device according to the present invention has an interline current 7a, in which the charge transfer electrodes Vl to 4 of the pixel vertical transfer device 2 and the storage vertical transfer device fW3 are shared, and the charge sweeping layer 6 is connected to the charge transfer layer 6. An independent electrode D is provided. Figure 2 shows the driving of the solid-state imaging device of the present invention! <This is a waveform diagram of Lus. In Fig. 2, (a) is a composite blanking signal;
(bl let (di te) is the clock (hereinafter referred to as IIv1 to v4) applied to the charge transfer electrodes Vl to 4 of the vertical transfer device 2.3 in both the pixel section and the storage section, (f) is the clock for charge sweeping out M6 The pulse applied to the electric current 8iD (hereinafter referred to as
(referred to as a sweep-out sidorein pulse).

The operation of the solid-state imaging device of the present invention will be explained below. Partari i]! Transfer to transfer device 2. Next, the signal charges are transferred from the pixel vertical transfer device 2 to the storage vertical transfer device fIt3 by the vertical high-speed transfer bus νC by 30 stages of the storage vertical transfer device.

Next, during the video scanning period D, the vertical transfer bus Ft- is applied to the storage section vertical transfer device 3 every horizontal scanning period E, and the signal charge is transferred to the horizontal transfer section 4 every horizontal scanning period E.
At the same time, a horizontal transfer pulse having a frequency that can transfer one signal charge on the horizontal transfer section 4 during the vertical transfer pulse F is applied to the horizontal transfer section 4, and the signal charge is output from the signal charge detection section 5. Also, after the end of the screen scanning period D, the vertical blanking period A (M
A charge sweeping high-speed transfer bus G'ii- is applied from the lt end to before the charge pulse B, and unnecessary charges such as noise accumulated in the pixel section vertical transfer device 2 are transferred to the storage section vertical transfer device 3 side. At the same time, a sweep drain pulse I is applied to the electrode D for charge sweeping out [6] on the storage vertical transfer device 3, and unnecessary charges are swept out from the charge sweeping layer 6 into the semiconductor substrate. In addition, the sweep drain pulse l has a shorter time than the high-speed transfer bus G for charge sweep, and the unnecessary charges that overflow onto the storage vertical transfer device 3 and are dumped onto the storage vertical transfer device 3 are By postponing the signal charge, all unnecessary charges are swept out during the application period of the vertical high-speed transfer bus C, so that they do not affect the signal charge. Although frame interline transfer is used in this embodiment, the number of stages in the vertical direction of the storage section vertical transfer device 3 may be arbitrary if the solid-state camera has a storage section. Further, the frequency of the clock applied to the horizontal transfer section 4 during the unnecessary charge sweep period in the vertical blanking period A is also arbitrary.

Depending on the above structure and driving method, the charge transfer electrode v1~
The number of clocks applied to the electrodes D of the four clocks and the charge sweeping layer can be reduced from eight clocks to five clocks, and the binary bus generated from the integrated timing generation circuit can be converted into a three-level pulse for driving the solid-state imaging device. The conversion circuit can be reduced from 8 systems to 5 systems,
Its value for dormitory use is great.

According to this method, by sharing the electrodes of the transfer devices in both the pixel section and the storage section, and providing an independent t-pole for the charge sweep layer, eight clocks can be applied to these vertical charge transfer electrodes. The circuit for converting to the ternary bus for driving the solid-state image sensor can be reduced from 8 systems to 5 systems.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram of a solid-state imaging device showing an embodiment of the present invention, Fig. 2 is a bus waveform diagram for explaining the driving method of the solid-state imaging device, and Fig. 3 is a diagram of a conventional solid-state imaging device. Configuration diagram of solid-state imaging device,
FIG. 4 is a pulse waveform diagram for explaining the K motion of a conventional solid-state imaging device. 1... Photoelectric conversion section, 2...
Pixel section vertical transfer device, 3...Storage section vertical transfer device, 4
...Horizontal transfer section, 5...Signal charge detection section, 6...
Charge sweep layer, A... Vertical blanking period, B...
Charge bus ν bus, C... Vertical high speed transfer pulse, D...
・Eiga scanning period, E...1 horizontal scanning period, F...vertical transfer pulse, G...high speed transfer pulse for charge sweep, ■
...extracted V inverse sweep period.

Claims (1)

[Scope of Claims] 1. a photoelectric conversion section in which a plurality of photoelectric conversion elements are two-dimensionally arranged; a pixel section vertical transfer device that vertically transfers signal charges accumulated in the photoelectric conversion section; an accumulation section vertical transfer device that shares a charge transfer electrode with the pixel section vertical transfer device and stores signal charges for a plurality of horizontal lines transferred from the pixel section vertical transfer device; , a charge sweep layer that has an electrode independent of the charge transfer electrode and sweeps out unnecessary charges, and a horizontal transfer section that horizontally transfers one horizontal line's worth of signal charges transferred from the storage section vertical transfer device. and a signal charge detection section that converts the signal charge from the horizontal transfer section into a signal voltage or a signal current and outputs the signal charge detection section. 2. The number of vertical stages of the charge sweep layer and the charge sweep layer electrode is set to 1/N stage (N:
2. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is a positive integer. 3. The solid-state imaging device according to claim 1 or 2, wherein the charge sweeping layer is provided on the pixel vertical transfer device side of the storage vertical transfer device. 4. A photoelectric conversion section in which a plurality of photoelectric conversion elements are two-dimensionally arranged, a pixel section vertical transfer device that vertically transfers signal charges accumulated in the photoelectric conversion section, and the pixel section vertical transfer device. an accumulation section vertical transfer device that shares charge transfer electrodes and stores signal charges for a plurality of horizontal lines transferred from a pixel section vertical transfer device; and the charge transfer electrode provided in the accumulation section vertical transfer device. a charge sweeping layer which has an electrode independent from the storage section and which sweeps out unnecessary charges; a horizontal transfer section which horizontally transfers signal charges for one horizontal line transferred from the storage section vertical transfer device; When driving a solid-state imaging device equipped with a signal charge detection section that converts a signal charge into a signal voltage or a signal current and outputs the signal charge, unnecessary signal charges in the pixel section vertical transfer device are transferred to the storage section vertical transfer device side. A method for driving a solid-state imaging device in which the unnecessary charge is swept into a semiconductor substrate by applying a pulse to the charge sweep layer electrode during high-speed transfer. 5. When sweeping out unnecessary signal charges in the pixel section vertical transfer device from the charge sweep layer of the storage section vertical transfer device, the pulse width applied to the charge sweep layer electrode is adjusted to the width of the pulse applied to the charge sweep layer electrode in both the pixel section and the storage section vertical transfer device. 5. The method for driving a solid-state imaging device according to claim 4, wherein the pulse width is shorter than the unnecessary charge high-speed transfer pulse width applied to the charge transfer electrode.