JPH03201667A - Picture recorder - Google Patents

Abstract

PURPOSE:To effectively prevent half tone picture quality from being degraded by a texture by adopting a ground tint screen + error dispersion method and contriving a threshold pattern when a picture density code is generated. CONSTITUTION:A density code generating means 5 is equipped with a threshold value switching means 7 to switch and set various threshold values for each adjacent picture element, and a data correcting means 8 to add differential data between the picture element data of a preceding line corresponding to an attention picture element and picture elements positioning before and behind the attention picture element at least and the corresponding threshold value to the current data of the attention picture element with prescribed weighting. Further, a code setting means 9 is provided to partition the density gradation number of the corrected attention picture element by the corresponding threshold value and to define it as the picture density code. Thus, the reproduciveness of the half tone picture is more improved and the half tone picture quality is kept satisfactory.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to an image recording device for recording halftone images, and particularly relates to an image recording device for recording halftone images, and particularly for recording multi-l! ! Is it possible to scan the photoconductor with the beam and develop the latent image formed on the photoconductor by turning on or off the beam of the beam scanning unit based on the image density signal corresponding to the i-tone input image data? J.I.
This invention relates to an improvement in an image recording device for imaging.

[Prior art 1] In general, methods for reproducing halftone images with laser printers include the dither matrix method (so-called area N-tone method), which expresses gradations by a combination of multiple pixels, and the method that expresses gradations in units of one pixel. Density gradation methods for expression, and furthermore, a combination of an area gradation method and a density gradation method are already known.

In the area gradation method described above, the number of gradations can be increased by lowering the number of screen lines, but the problem arises in that the resolution is reduced. On the other hand, although the above-mentioned density gradation method can satisfy the demand for increasing the resolution, it conversely poses the problem that it is difficult to increase the number of gradations.

Therefore, in the past, in order to increase both the number of gradations and the resolution, a method that combines an area gradation method using a screen with a high number of lines and a density gradation method is usually adopted.

Next, an example of a method that combines the surface $1[11 tone method and the density gradation method will be described.

For example, as a method for realizing the density 1151 method, a pulse width modulation method may be used in which the lighting time of a laser is varied within one pixel.

This pulse width modulation method converts the input image data into density code data with a low number of gradations by appropriately dividing the number of density gradations of multi-gradation input image data using open chains, and then converts the input image data into density code data with a low number of gradations. In this system, a laser beam is turned on or off using a laser beam, and a latent image is formed on a photoreceptor according to density information of input image data (Japanese Patent Laid-Open No. 63
(Refer to Publication No.-74386).

In this case, when dividing the density gradation level of the input image data using a plurality of predetermined thresholds when generating the density code data, it is necessary to A differential error occurs between the two, but if this differential error is not taken into account, the number of gradations will be equal to the number of set thresholds, resulting in a problem that the quality of the final halftone recorded image will be significantly impaired.

Therefore, in the past, the so-called error diffusion method, which corrects the density 11m1 number of the target image data in consideration of the above-mentioned differential error and performs threshold processing on the corrected image data, has been used for area gradation. Usually adopted as a legal amendment.

[Problems to be Solved by the Invention] By the way, in such conventional laser printers, an error diffusion method is adopted as an area gradation method correction when generating the above-mentioned density code data, and the halftone image quality is improved. However, the first technical problem arises: the unique pattern (texture) created by the error diffusion method appears conspicuously, giving an unsightly feeling.

Furthermore, since area gradation method correction is added to reproduce one gradation using a plurality of pixels, a second technical problem arises in that character images are likely to deteriorate.

Furthermore, in the above-mentioned halftone image reproduction method, a line screen with a high number of lines is used to increase the resolution, but even halftone images such as photographs have a high density area that is crushed. A third technical problem arises in that it is still insufficient in terms of faithfully reproducing images.

That is, the present invention was made to solve each of the above technical problems, and provides an image recording device that further improves the reproducibility of halftone images and maintains good halftone image quality. This is what we provide.

[Means for solving the WR problem] In other words, the invention for solving the first technical problem is:
As shown in FIG. 1(a), multi-tone input image data DT
The beam of the beam scanning unit 1 is turned on or off based on the image density signal SD which is pulse width modulated in accordance with the density level of A density wi scale conversion means 4 for converting the number of density gradations of input image data DT according to a desired reproduction density characteristic, assuming an image recording apparatus for visualizing images.
and a density code generating means 5 for generating an image density code SC corresponding to the segmented area by dividing the number of density gradations of the image data DT from the density gradation converting means 4 using a predetermined threshold value. Multi-value modulation means 6 modulates the pulse width of the image density signal SD based on the image density code SC, and the density code generation means 5 includes threshold value switching means 7 for switching and setting different threshold values for each adjacent pixel. and data correction means 8 for adding difference data between the pixel data of the previous line corresponding to at least the pixel of interest and the pixels located before and after the pixel of interest and the corresponding threshold value to the current data of the pixel of interest with predetermined weighting. A code setting means 9 is provided which divides the density gradation number of the pixel of interest corrected by the data correction means 8 by a corresponding threshold value and sets it as an image density code SC.

Furthermore, the device invention for solving the first and second technical problems has the same basic configuration as the invention of FIG. 1(a) (beam scanning unit 1), as shown in FIG. 1(b). .!Ji
Light body 2. Developing means 3. Density gradation conversion means 4. Density code generation means 5. The density code generating means 5 includes an initial density code SCO corresponding to the segmented area when image data for each pixel is segmented using a predetermined threshold value.
an initial density code setting means 11 for setting the initial density code SCO; a coding error extraction means 12 for extracting coding error data CED consisting of the difference between the threshold value corresponding to the initial density code SCO and the image data; Matrix error determining means 13 that adds the coded error data CED extracted from the above within a predetermined pixel matrix range and determines matrix error data MED based on the addition result.
and code correction means 14 for selectively correcting the initial density code SCO of each pixel in a predetermined pixel matrix range based on this matrix error data MED.

Furthermore, the first device invention for solving the third technical problem, as shown in FIG. 1(C), has the same basic configuration (beam scanning unit 1, Photoreceptor 2.
Developing means 3, 81 degree gradation converting means '4' Density code generating means 5. The density code generating means 5 is provided with a multi-level modulation means 6〉, and the density code generating means 5 is configured to generate the difference data between the pixel data of the previous line and the threshold value corresponding to at least the pixel of interest and the pixels located before and after the pixel of interest with predetermined weighting. It is provided with a data correction means 8 for adding data to the current data of a pixel, and a code setting means 9 for dividing the number of density gradations of the pixel of interest corrected by the data correction means 8 by a threshold value to obtain an image density code. The multi-value modulation means 6 includes a modulation pattern switching means for switching the modulation pattern of the image density signal SD to either one pixel unit or two pixel unit in response to a mode selection signal MS indicating either text mode or photo mode. 15.

Furthermore, a second bag r to solve the third technical problem
l! 1'R light is as shown in FIG. 1(d).
Basic configuration similar to invention a) (beam scanning unit 1
．． Photoreceptor 2. Developing means 3.11 Tone conversion means 4. Density code generation means 5. The density gradation conversion means 4 is equipped with a multi-value modulation means 6), and the density gradation conversion means 4 includes a range variable device in which the density conversion range of image data is variably set in accordance with a mode selection signal @MS indicating either text mode or photo mode. A means 16 is provided, and the range variable means 16 sets the density conversion range for the photo mode narrower than that for the text mode.

Further, the third device invention for solving the third technical problem has the same basic configuration as the invention of FIG. 1(a) (beam scanning unit 1 .photoreceptor 2.developing means 3.1 degree gradation conversion means 4.density code generation means 5.multi-value modulation means 6). Pulse width variable means 17 is provided for variably setting the pulse width of the image density signal SD in accordance with the mode selection signal MS shown. The width is set narrow.

In each of these technical means, the beam scanning unit 1 can be appropriately selected from any unit, including a laser scanning unit, as long as it can scan the photoreceptor 2 with a beam. The beam scanning unit 1 is operated based on the image density signal SD, but whether the beam is turned on or off with a pulse width corresponding to the image density signal SD is determined based on the relationship with the development method. It is necessary to form m images such that the portions obtain an image recording density corresponding to the image density signal SD.

Further, the photoreceptor 2 can be appropriately selected regardless of whether it is drum-shaped or belt-shaped, and the developing means 3 can also be
As long as the latent image on the photoreceptor 2 can be visualized, the developer, development method, etc. can be selected as appropriate.

Furthermore, the density gradation conversion means 4 may be a table in which conversion data is stored in advance, as long as it can convert data according to reproduced density characteristics, or it may be a table in which conversion data is stored in advance, or an arithmetic operation that is performed according to a predetermined calculation formula. The design can be changed as appropriate, such as by configuring it with a circuit.

In particular, the range variable means 16 in the invention of FIG. 1(d)
In this case, it is necessary to experimentally determine the density conversion range corresponding to the text mode and photo mode, taking into consideration the development characteristics and the characteristics of the multi-value modulation means 6.

Further, the density code generating means 5 may be any device having at least a code setting means for dividing the number of density gradations of the multi-gradation image data DT by a predetermined threshold value to generate an image density code. The design of the threshold setting, the number of image density codes to be generated, and the generation method can be changed as appropriate.

For example, if the density code generation means 5 is of a type that employs a line screen + error diffusion method, the data correction means 8 that implements the algorithm of the error diffusion method described above.
However, the data correction means 8 calculates the difference data between the pixel data of the previous line corresponding to the pixel of interest and the pixels located before and after the pixel of interest and the corresponding threshold value of the pixel of interest with predetermined weighting. It can be added to the current data, but from the perspective of further suppressing the occurrence of texture, in addition to the above correction algorithm, the difference data between the image data of the pixel immediately before the pixel of interest and the W value is given relatively large weight. Preferably, it is added to the current data of the pixel.

In particular, regarding the threshold value switching means 7 of the density code generation means 5 in the invention shown in FIG. , it is preferable to select a threshold value to which a predetermined increment is added to the standard threshold value, and a threshold value to which a decrement amount equal to the increase amount is subtracted from the standard threshold value.

Furthermore, in the density code generating means 5 in the invention shown in FIG. 1(b), the size of the matrix and the correction algorithm by the code correcting means 15 may be changed as appropriate, but it is possible to reproduce the original image more faithfully. From the viewpoint of obtaining an image, it is preferable to prioritize pixels with larger coding error data CED as the order of correction target pixels in a predetermined pixel matrix.

Further, the design of the multi-value modulation means 6 may be changed as appropriate as long as the pulse width of the image density signal SD based on the image density code SC can be variably set within a desired range.

In this case, the pulse width of the image density signal SD may be changed approximately equally in accordance with the image density code SC, but considering the quality of the reproduced image, the reproduced image characteristics may be corrected to a linear shape. Therefore, it is preferable to change the pulse width of the image density signal SD non-uniformly.

Regarding the method of generating the image density signal SD, for example, a minimum unit of reference pulse necessary for setting the pulse width of the image density signal SD is generated, and this reference pulse is multiplied by an integer, or the reference pulse is The pulse width of the image density signal SD can be appropriately selected by using the phase shift of the pulse signal based on the clock and setting the pulse width of the image density signal SD corresponding to the phase shift of the pulse width.

In this case, in the former type, the reference pulse is selected based on the variation of the image density signal SD, but if the frequency of the reference pulse is not set extremely high, the multilevel modulation means E is expensive as the circuit configuration of 6.
This is preferable because it can be handled by inexpensive TTL without using CL. On the other hand, in the latter type, for example, delay means can be used as means for extracting the phase shift of the pulse width, and it is possible to design the delay amount of the delay means to be extracted by a desired calculation means. be. By appropriately selecting the delay amount of the delay means, it is possible to set the pulse width of the image density signal SD to a desired value, without being subject to the limitations of the former type, easily and at relatively low cost. The circuit can be configured as follows.

In particular, regarding the modulation butter switching means 15 of the multi-level modulation means 6 according to the invention shown in FIG. While the pulse width is expanded sequentially from one direction, in the case of two pixels, the pulse width can be appropriately selected such as expanding sequentially from both left and right directions.

Furthermore, the multilevel modulation means 6 according to the invention shown in FIG. 1(e)
Regarding the pulse width variable means 17, it is possible to have separate pulse width variable sections for variably setting the pulse width for character mode and photo mode, or it is possible to use one pulse width variable section in common. It may be configured as follows.

Further, the present invention is applicable to image forming apparatuses in general such as laser printers and copying machines, and for example, has a plurality of developing means 3 using at least different developers, and has a common or individual beam scanning unit 1. In a type in which a plurality of latent images are formed and each latent image is developed individually by a corresponding developing means 3, basically, the density gradation converting means 4, the density code generating means 5, and the multi-value modulating means 6 are used, respectively. It is necessary to design a plurality of systems corresponding to the developing means 3.

In this case, multiple systems of concentration i11 conversion means 4.
Once code generation means 5. From the viewpoint of simplifying the configuration of the multilevel modulation means 6, the density gradation conversion means 4. II
degree code generation means 5. It is preferable to design the multi-level modulation means 6 so that it can be shared.The shared means distinguishes the image data DT of a plurality of systems by, for example, color information, and performs functions according to the image data DT in each color. What is necessary is to provide the following.

[Operation] In the above-mentioned technical means, according to the invention shown in FIG. 1(a), when the density code generation means 5 generates the image density code SC, many ii The image data DT is divided into sections at predetermined threshold values using a line screen + error diffusion method, and converted into an image density code SC corresponding to the sectioned area.

At this time, a unique pattern (texture) is generated by the error diffusion method in the halftone image recorded using the above method, but
In this invention, since the threshold value is a different value for each adjacent pixel, a line screen pattern with a number of lines that is 1/2 of the sampling frequency is superimposed on the unique pattern. This suppresses the exposure state of the unique pattern.

Further, according to the invention according to FIG. 1(b), when the density code generation means 5 generates the image density code SC, first, the multi-tone image data DT is set to a predetermined threshold value for each pixel. The initial concentration code S corresponding to the divided area is
Set as CO.

Next, when the coding error data CED consisting of the difference between the image data DT at the time of generating the initial density code and the threshold value is calculated, the coding error data CED of each pixel is added within a predetermined pixel matrix range. , matrix error data MED are determined. Then, the initial density code of each pixel is selectively corrected within the range of the pixel matrix based on the matrix error data MED.

At this time, the image density code SC for each pixel is generated after performing overall correction based on the overall error in the pixel matrix range, so when performing individual correction for each pixel using line screen + error diffusion method. Compared to , the mesh of the line screen is not directly exposed, and furthermore, no unique pattern is generated by the error diffusion method.

Furthermore, according to the invention according to FIG. 1(C), when the density code generation means 5 employs the line screen method, the multivalue modulation means 6 changes the number of lines of the line screen in the photo mode. Since the processing is performed with the signal set to 172, it is possible to form an image that matches the spatial frequency characteristics of the electrophotographic process, and the gradation reproducibility in high-density image areas is improved.

Furthermore, according to the invention shown in FIG. 1(d), since the density gradation conversion means 4 sets the density conversion range narrower in the photo mode than in the text mode, the reproduced image is faithful to the original image or compressed. It will be reproduced in 1181 Lunge.

Furthermore, according to the invention shown in FIG. 1(e), since the multilevel modulation means 6 sets the pulse width of the image density signal SD narrower in the photo mode than in the text mode, the reproduced image is the same as the original image. Reproduced in faithful or compressed M tone.

[Embodiments] Hereinafter, the present invention will be described in detail based on embodiments shown in the accompanying drawings.

Embodiment 1 Table of contents ■, Overall configuration ■6 Image processing unit (1) Basic configuration (2) Image reading section (2-A) Full color sensor (2-8) Sensor interface circuit (3) Color image information generation circuit Image ratio crab unit 1 Basic configuration 2 Data distribution is a circuit TRC 4 screen generator 4-A) Basic configuration 4-B) Threshold pattern setting circuit 4-8-
1) Algorithm 4-8-2) Example of realized circuit 4-C) Error diffusion circuit 4-C-1) Algorithm 4-c-2) Basic configuration of realized circuit 4-C-3) Difference value generation circuit 4-C -4) Digital filter, lookup table (4-C-5) Error diffusion circuit operation (5)
) ROS controller (5-A) basic configuration (5-8) multilevel modulation circuit 5-8-1 basic configuration 5-8-2 decoder 5-8-3) left and right gray generator 5-8-4 left and right selection block, Left/right switching signal generator 5-8-5 Selector 5-8-6 Operation of multilevel modulation circuit 5-8-7 Modification ■, Operation of the device ■, Overall configuration Figure 2 shows a 1g 1 path 2 color one-way type. 1 is a block diagram showing the overall configuration of a two-color copying machine to which the present invention is applied; for example, a two-color image of red (subcolor) and black (main color) is reproduced.

As shown in FIG. 2, this two-color copying machine reads a red and black two-color original image and generates two systems of image data as a pair of density data D and color flag CF. An image processing unit 20 outputs after appropriately processing and color flag CF, and reproduces two systems of image data from the pair of density data D and color flag CF from this image processing unit 20, and reproduces these two systems of image data. Possible? ! It is composed of a laser printer 110 as an image unit that converts into four images.

■8 Image processing unit (1) basic configuration In FIG. 3, reference numeral 30 is a full-color sensor that optically scans a document, and 40 is a predetermined reading signal that is sequentially output from the full-color sensor 30 in a time-sharing manner for each cell. This is a sensor interface circuit that converts the data into pixel-by-pixel color component data (green: G, blue: B, red: R) and outputs them in parallel.The full color sensor 30 and sensor interface circuit 40 read the image. The department is made up of: Reference numeral 70 denotes a color image information generation circuit that determines which color the original image is based on each color component data (G, B, R) from the sensor interface circuit 40. Gradation density data D, red (
A sub color flag SCF corresponding to the (sub color) image and a main color flag MCF corresponding to the black (main color) image are generated. , 90 is the color image information generation circuit 7
Density data D from 0 and color flags SCF, MCF
This is a collection of tools and tools that perform editing and processing such as enlargement, reduction, and color inversion. In this case, the density data D8
bits and color flags Since it is only necessary to edit and process 2 bits of SCF and MCF, the circuit of the editing/processing circuit 90 is simpler than the type that edits and processes two systems of image data (8 bits each). The configuration can be simplified.

The density data D and color flags SCF and MCF from the editing/processing circuit 90 are sent to the interface circuit 1.
00 to the laser printer 110.

In this embodiment, the color flags in the image processing unit 20 have a two-pit configuration of the sub color flag SCF and the main color 7-lag MCF, but the color flags CF provided to the laser printer 110 side are The interface circuit 100 changes the color to a 1-bit configuration that expresses subcolors and other colors.

(2) Image reading section (2-A) full color sensor The full color sensor 30 is, for example, as shown in FIG.
It has five CCD sensor chips 30 (1) to 30 (5) with a predetermined pixel density (for example, 16 dots/#), and each CCD sensor chip 30 (1) to 30
(5) are arranged and integrated in a so-called staggered pattern while being alternately moved back and forth with respect to the document scanning direction m.

Each CCD sensor chip 30 (1) to 30 (5)
As shown in FIG. 6, green (G) and blue (B
), red (R) filters (gelatin filters, etc.) are sequentially coated and arranged.

Then, the adjacent green filter cell 31G, blue filter cell 31B, and red filter cell 31R are combined into a set, and an output signal of a level corresponding to the amount of light received from each cell 31 (corresponding to the Haraaki copper ratio) is generated. The signal is processed as a signal for one pixel P.

(2-8) Sensor Interface Circuit The sensor interface circuit 40 basically consists of CCD sensor chips 30 (1) to 30 arranged in a staggered manner.
(5) Color component values @(G, 8.R
), each color component signal (G, B, R>
It has a function of converting the above-mentioned pixel P into a parallel signal for each pixel P, a function of correcting the deviation of the detection position of each color component value @ (G, B, R) in one pixel P, etc.

FIG. 6 shows a circuit that realizes the function of aligning the outputs from the staggered CCD sensor chips in one line.

In the figure, signals serially output in cell units from each CCD sensor chip 30 (1) to 30 (5) are sent to an AD conversion circuit 42 (1) via amplifier circuits 41 (1) to 41 (5). to 42 (5). In each of the AD conversion circuits 42(1) to 42(5), a sensor output signal for each cell corresponding to the amount of received light is output as, for example, 8-bit data. Furthermore, each of the above AD conversion circuits 4
2 (1) to 42 (5) are provided with latch circuits 43 (1) to 43 (5) for timing adjustment. Regarding the systems of CCD sensor chips 30 (2) and 30 (4) placed in front of the sensor chips, FIFOs 44 and 45 of a first-in, first-out type are provided after each corresponding latch circuit 43 (2) and 43 (4). There is. These FIFOs 44 and 45 are connected to the CCD sensor chip 30 (
2).

30(4) by delaying the output timing of the color component signal for the system 30(1),
This is to align the output timing of the same line signals for the 30(3) and 30(5) systems.

Therefore, while the write timing signal is determined at a predetermined timing, the read timing (illll
lI eup) are CCD sensor chips 30 (2) and 30
It is determined based on the distance between the scanning line (4) and the scanning line of the other CCD sensor chip and the document scanning speed of the full color sensor 30. For example, if the scanning speed differs depending on the magnification of the image to be formed, the readout timing is controlled according to the magnification. In this way, when making the read timing variable depending on the magnification, etc., the "IF
The capacities of O44 and O45 are determined.

Furthermore, a latch circuit 46 is provided after each FIFO 44, 45.
(21, 46(4) are provided, while the above latch circuits 43(1), 43(3), 43 are provided for the systems of CCD sensor chips 30(1), 30(3), 30(5).
(5) is directly followed by the next latch circuit 46 (1).
, 46(3), 46(5) are connected, and FIFO44,
preceding CCD sensor chip 30(2) via 45;
The color component signals of system No. 30 (4) and the color component signals of systems of other CCD sensor chips are aligned as those of the same scanning line in each latch circuit 46 (1) to 46 (5), and are output at a predetermined timing. It is transferred to the subsequent stage. Looking at each latch circuit 46(1) to 46(5), each color component signal corresponds to the cell arrangement of each CCD sensor chip.
The signals are transferred serially in the order of -+B→R→G-+B-+R→...

FIG. 7 shows a circuit that realizes a function of converting each color component signal serially transferred in each CCD sensor chip system into a parallel signal for each pixel.

In the figure, serial-to-parallel conversion circuits 50 (specifically, 50 (1) to 50 (5)) are provided corresponding to the CCD sensor chips 30 (1) to 30 (5). This serial parallel circuit 50 is connected to the color component signals (G, B,
R) are input in parallel to latch circuits 51G, 51B,
51R, the latch circuit 51G is synchronized with the clock signal (G clock) that becomes active when the color component signal G is transferred, and the latch circuit 518 is synchronized with the clock signal (B clock) that becomes active when the color component signal B is transferred. However, the latch circuit 51R latches each color component signal in synchronization with a clock signal (R clock) that becomes active when the color component signal R is transferred.

In addition, after each latch circuit 51G, 518.51H, tri-state latch circuits b2G, 52B are used to latch each pixel again in order to adjust the transfer timing.
, 52R are provided, and each of the tristate latch circuits 52G, 52B, and 52R simultaneously relatches the previous stage latch data (color component signal) at the falling edge of the R clock. . Furthermore, these tri-state latch circuits 52G, 528.52H
Driving/non-driving is determined by enable signal (i) (i=1...
5), it is set to υ3111.

The above serial-parallel conversion circuit 50 (1) to 50
(5) At the subsequent stage is a memory circuit 54 and this memory circuit 5.
A timing control circuit 56 is provided to control writing and reading of No. 4.

The memory circuit 54 has a dedicated memory for each color component (G, B, R), and when writing to the memory for each color component, the enable signal (i) is input from (1) → (2) → (3) →
Switch the active state in the order of (4) → (5),
By controlling the write address according to a predetermined rule, -line data is sequentially arranged in the memory for each color component (G, B, R).

Then, by sequentially reading out data for each color component from each dedicated memory in parallel, the color component data for each pixel is sequentially transferred to the subsequent stage from one end of one line to the other.

Note that the resolution is converted at the memory circuit 54 based on the difference between the write timing and the read timing in the timing control circuit 56. For example, memory circuit 54
The timing control circuit 56 controls the read timing so that the resolution in the subsequent system becomes 4003 PI.

Further, FIG. 8 shows each color component (G) in one pixel.

This is a circuit that realizes a correction function regarding the deviation of the detection positions of B and R).

As shown in FIG. 4, due to the structure of the full color sensor 30-
Since the reading position of each color component (G, B, R) within a pixel is spatially shifted, if the signal from each cell is processed as a color component signal, other color pixels may appear at the border of the black image. A phenomenon such as so-called ghost generation occurs. Therefore, the purpose of this correction circuit is to make the reading positions of each color component appear to match in order to prevent the occurrence of such ghosts.

Specifically, in the arrangement of each cell shown in FIG. 9, when focusing on pixel Pn, the reading position of each color component is corrected to virtually become the position of cell Gn. As the algorithm, an algorithm is adopted in which the reading position of each color component is weighted and averaged so that it becomes the position of the cell Qn, taking into consideration the adjacent pixel P n-1.

That is, Gn = Qn ... <1> Bn
= (Bn-1+28+1 ＞/3・ (2) Rn
= (2Rn-1+Rn>/3-(3)) Each color component data (Gn, Bn, Rn) is obtained.

To be more specific, the correction circuit shown in FIG.
Color component data output pixel by pixel is input in parallel to the circuit shown in the figure. A latch circuit 58G is provided for the G component system, and a latch circuit 58B is provided for the daily component system, and at the stage after this latch circuit 58B, the next latch circuit 61 and the data latched in the latch circuit 58B are provided. A shifter 62 is provided for shifting 1 bit by 1 bit, an adder 63 is provided for adding the latch data of the latch circuit 61 and the shift data of the shifter 62, and the addition result of the adder 63 is used as an address input and 1/3 thereof is outputted. A lookup table (ROM) 64 is provided. Further, for the R component system, a latch circuit 58R is provided, and a next latch circuit 65 and a shifter 66 for shifting the data latched in this latch circuit 65 by one bit are provided at the subsequent stage of this latch circuit 58R. An adder 67 adds the latch data of 58H and the shift data of the shifter 66, and a look-up table (R
OM) 6B is provided.

With this configuration, the above equation (1) is realized in the G component system, and since shifting by 1 bit means twice the calculation, the above equation (2) is realized in the B component system, and the above equation (2) is realized in the B component system. The system realizes each of the above equations (3).

Each color component signal that has been processed by the image reading unit described above is transferred to the color image information generation circuit 70, which will be described in the following, after being subjected to processing such as shading correction performed inside the box.

(3) Color image information generation circuit The specific configuration of the color image information generation circuit 70 is shown in FIG.

In the same figure, reference numeral 71 indicates G of the color component data transferred pixel by pixel from the sensor interface circuit 40.
Input the component data and R component data, and calculate the difference (R-G
), and 72 is a subtraction circuit that inputs B component data and R component data and calculates the difference (R-8>).The subtraction results in each subtraction circuit 71 and 72 are parallel is input to the address end of the lookup table 73, and this lookup table 73 calculates the product of the saturation C9 hue mouth of the pixel ((
The output is performed in 8-bit units; for example, the upper 5 bits are assigned to the result of (day x C) and the lower 3 bits are assigned to the color determination output.

The contents of the lookup table 73 are defined as follows, for example.

As shown in Figure 11, the vertical axis represents the difference (RG) between the red (R) color component and the green (G) color component, and the red (R) color component and the blue (B) color component. Assuming a color space in which the horizontal axis is the difference (R-B) from the component, an arbitrary color is specified by the distance from the origin O and the rotation angle θ.

In this case, the distance ``is a factor that mainly determines the saturation, and the closer it gets to the origin O in the color space, the closer it becomes to an achromatic color.The rotation angle θ is also a factor that mainly determines the hue.For example, ``red “Magenta” Pa-Blue “Cyan”
"Green" and "yellow" are distributed in the color space in the device surrounded by the broken line in FIG. 11, respectively.

From the above relationship, (R-G) data and (R-8
) Based on the data, r==' ((R-G) 2+ (R-8) 2)=-
(4) θ-tan-1 ((R-G) / (R-B)
)=・(5) is obtained, and color judgment is made at the position in the color space specified by these data r and θ.

Table 1 below shows an example of color determination data in this example.

Table 1 In addition, the above chroma C is determined by the relationship between the distance from the origin determined from the (R-G) data and the <R-8) data by the calculation formula (4>) of Example 1 and the chroma C. For example, it is determined according to the experimentally determined relationship shown in FIG. 12. In FIG. 12, when the distance 1r becomes smaller than the predetermined value RO, the color is considered achromatic and the saturation C is forcibly set to "0".

Furthermore, the hue H is determined by the relationship between the rotation angle θ and the hue, which is determined from the (R-G) data and (R-B) data by the above equation (5), for example, as shown in Fig. 13, which was determined experimentally. It is determined according to the relationship. In FIG. 13, when the rotation angle θ is smaller than the predetermined value θ0, the hue H is forcibly set to O''.

In addition, the above-mentioned Fig. 12 and 1 which determine the above-mentioned saturation C and hue aperture
The relationships shown in FIG. 3 are determined in various ways depending on the color separation capabilities required of the system.

Furthermore, in FIG. 10, among the color component data input in parallel in pixel units, G component data is input to a 0.6 times multiplication circuit 74, and B component data is input to a 0.1 times multiplication circuit 75. The R component data is input to a 0.3 times multiplier circuit 76. And each multiplication circuit 74.75
．． The multiplication results at 76 are respectively input to adder circuits 77, and the addition results V in this adder circuit 77 are input.

V=0.6G+0.3R〇, IB is transferred to the subsequent stage as the brightness data of the pixel.

The above-mentioned brightness data V is based on the fact that the spectral sensitivity curve of the G component signal in the image sensor (full color sensor 30) has characteristics close to the human specific luminous sensitivity curve. It is generated based on the G component data by adding the values of the B component data and the R component data to that value.

Each coefficient (multiplying value in each multiplier circuit) in the formula for determining the brightness (2) is ultimately determined based on the spectral sensitivity characteristics of the image sensor, the spectral distribution of the exposure lamp, etc.

It is also possible to use only the G component data as the brightness data (2) depending on the capabilities required of the system.

The output regarding saturation and hue (mouth x C) from the lookup table 73, the color judgment data and the brightness data (■) from the addition circuit 77 become address inputs to the next lookup table 78, and this lookup table 78 uses the address It has a function of outputting color density data DC corresponding to input.

Specifically, for each input above, DC=KXCX day×v The color density data DC determined according to the following is output.

Here, K is a coefficient that differs depending on the color determination data,
Since chromatic colors feel brighter than chromatic colors, this purpose is to match the brightness level of chromatic colors and achromatic colors, and is determined experimentally in advance according to each judgment color, and its value is, for example, It is set to a value within a range of about 1.1 to 1.3.

The color judgment output (3 bits) from the lookup table 73 and the color selection data set in the latch circuit 80 are input to the matching circuit 79, and when the color judgment output and the color selection data match, the matching circuit The output of 79 rises to a high level. This color selection data is set in the latch circuit 80 based on the operator's operation input or the setting input from a dip switch or the like, so that the 3-bit data (the group of Embodiment 1) corresponding to the color to be reproduced as a subcolor is set in the latch circuit 80. (see 1).

The output of N79 several times is a sub color flag SC indicating whether or not it is the subcolor (for example, red) set in color selection.
Further, it functions as an output selection signal (SEL) of the selection circuits 81 and 82.

The selection circuit 81 selects brightness data V according to the state of the selection signal.
It has a function of switching between ``O'' data and ``0'' data, and outputs ``O'' data when the selection signal is at a high level, and outputs brightness data V when the selection signal is at a low level.

On the other hand, the selection circuit 82 has a function of switching between the color density data [)C from the lookup table 78 and the data from the selection circuit 81 according to the state of the selection signal.
When the selection signal is high level, the color density data ()C is
Data from the selection circuit 81 is output when the selection signal is at 0-level.

Further, the output bit of the selection circuit 81 is directly outputted to the OR circuit 8.
3, and functions as a main color flag MCF indicating whether the output of this OR circuit 83 is the main color (for example, black), while the output of the selection circuit 82 is transferred to the subsequent stage as density data D. It has become so.

In the color image information generation circuit 70 as described above, in the main color (black) area of the original image, the output of the - number circuit 79 is at a low level, and the brightness data V from the addition circuit 77 is
is directly transferred to the subsequent stage as density data D via selection circuits 81 and 82.

At this time, since the brightness data V is not "0", the main color flag MCF becomes high level, and the - number circuit 79
Since the output of is low level, the sub color flag S
CF becomes low level (see main color area El in FIG. 14).

Also, the sub-color area iIl of the original image! For <red>, the output of the minus number circuit 79 becomes high level, and the color density data Dc from the lookup table 78 is sent to the selection circuit 8.
2 and then transferred to the subsequent stage as density data D.

At this time, since the output of the selection circuit 81 is "0", the main color flag MCF becomes low level, and since the output of the - number circuit 79 is high level, the sub color flag SCF becomes high level (the See Zab color area Es in Figure 14>.

Furthermore, in the background area of the original image (density “O”),
Since the output of the selection circuit 81 is “O°” and the output of the matching circuit 79 is also low level, the density data D is “0°”.
'', and both the main color flag MCF and the sub color flag SCF become low level (see back FtfR area En in FIG. 14).

In this embodiment, the color flag of each image data of the original is expressed by 2-bit data of the main color flag MCF and the sub color flag SCF, as shown in Table 2 below.

Table 2 The above calculation circuits are synchronized and driven pixel by pixel under the control of a timing control circuit (not shown), and the density data D and color flags (MCF, 5C
F) is sequentially transferred to the subsequent editing/processing circuit 90 as data forming a pair of the same pixel.

(1) Basic configuration of 0-image image section Ninit (1) Fig. 15 shows a so-called 1-pass two-color (for example, red and black in this embodiment) laser printer 110 as an image section Ninit used in this embodiment.

In the figure, reference numeral 120 denotes, for example, a positively charged photoreceptor;
121 is a charging corotron that charges the photoreceptor 120 in advance;
122 is a dual beam scanning unit (hereinafter referred to as RO8 [Ra5ter Output
5cannerl), 123 is a bias type first developing device in which, for example, positive polarity red toner is used;
Reference numeral 4 denotes a bias-type second developer using, for example, black toner of negative polarity; 125, a transfer pre-processing corotron for aligning the polarity of the toner image on the photoreceptor 120; and 126, a recording sheet 127 with a toner image on the photoreceptor 120; 128 is a defrosting corotron for peeling off the recording sheet 127 electrostatically attached to the photoreceptor 120 side;
9 is a cleaner for removing residual toner on the photoreceptor 120;
130 is an eraser lamp that removes residual charges on the photoreceptor 120, and 131 is a fixing device that fixes the toner image on the recording sheet 127 after the transfer process.

The image reproduction characteristics of the recorded image density relative to the input image density of the first developing device 123 and the second developing device 124 are different as shown by Ys and Y- in FIG. 17, respectively.

Further, details of the RO8122 used in this embodiment will be explained based on FIGS. 15 and 16.

In the figure, 141 is a semiconductor laser for forming an image of the first color, 142 is a semiconductor laser for forming an image of a two-color mill, and 1
43 is the beam 3n+ from both lasers 141 and 142
144 is its polygon motor, 145 is an fθ lens, and 146 is a first exposure unit located in front of the first developing device 123 of the photoreceptor 120, which directs the beam Bm from the laser 141 of the first color. Mirror 147 guides the beam BIIl from the dichroic laser 142 to the second exposure section El located after the first developing unit 123 of the photoreceptor 120 148 and 149
are SOS sensors that detect the scanning threshold positions of the laser beams of the first and second color dies, respectively.

Further, the drive control system of the RO8122 is configured as follows.

In FIG. 15, reference numeral 20 denotes an image processing unit that outputs multi-gradation image data of the first color (red) and second color (black) in a state where it is separated into density data D and color 7 lag C. Two systems of image data Ds are generated based on the density data D sent from the image processing unit 20 and the color flag CF.

[) The data distribution to m is the circuit, 151 and 15
2 is a Tone Repr which converts the density levels of the image takes DS and DI 11 distributed by the circuit 15'0 according to the reproduced image density characteristics.

duction C0ntrO1er), second TR
C, 153 and 154 are the respective image data Qs, [
) Ill separately and generates image density codes scs and scn+ corresponding to each image data. 155 temporarily stores the image density ]-do SC3 from the first screen generator 153. The image density code 5CI11 from the second screen generator 154 is output from the FIFo, 156.
is the gap G between the first exposed portion E1 and the second exposed portion El.
a gap memory that stores and outputs data for a scanning time corresponding to p; 157 a ROS controller that drives and controls the first color laser 141 and polygon motor 144;
158 is a second RO that drives and controls the laser 142 of the two-color mill.
159 and 160 are respective laser drivers, and 161 is a motor driver for the polygon motor 144.

Note that the first ROS controller 157 controls the lasers 141 and 142 so that the exposed portion is used as an image portion, and the second ROS controller 158 controls the lasers 141 and 142 so that the non-exposed portion is used as an image portion.

Next, the basic operation of the laser printer 110 according to this embodiment will be explained.

First, the density data D and color flag C" from the image processing unit 20 are distributed by the circuit 150 into two systems of image data DS and D-, and each TRC 151
, 152, each screen generator 153, 154 generates two systems of image density codes SC.
s, is converted to SCn+, and then F I FOI
55 or gap memory 156 to the first and second ROS controllers 157 and 158.

At this time, first, the -th ROS controller 157 drives the laser 141 and the polygon motor 144, and
A latent image Z1 in which the exposed portion becomes an image portion as shown in FIG. 18(a) is formed in the first exposed portion El of 2.0. and,
When this latent image Z1 is developed by the first developing device 123 under a first developing bias VB1, a first toner image T1 is formed as shown in the figure.

After this, the second ROS controller 158
42, and the 18th
Latent image Z2 in which the non-exposed area becomes the image area as shown in Figure (b)
is formed. Then, this latent image Z2 is transferred to the second developing device 14.
4 under the second developing bias VB2,
As shown in the figure, a second toner image T2 is formed.

These toner images TI and T2 are then aligned in polarity in a pre-transfer processing corotron 125, transferred to a recording sheet 127 in a transfer corotron 126, and then,
The image is fixed by a fixing device 131.

(2) Data distribution circuit FIG. 19 shows a specific configuration of the data distribution circuit 150.

That is, the data distribution circuit 150 uses the color flag C
F (In this example, pixels in the background area are treated as included in the main color area, and pixels in the sub-color area are set to a high level, and pixels in other areas are set to a low level. ) Depending on the state of color flag C, its output is divided into two input signals (A
, B).

In this case, the density data D is
and the input terminal A of the selection circuit 172, respectively, and '0° data is inputted to the input @iA on the opposite side of the selection circuit 171 and the input terminal B on the opposite side of the selection circuit 172, respectively. ing.

These selection circuits 171 and 172 select the A side input signal with a low level control input, and select the B side input signal with a high level control input, and the color flag CF is the control signal. The output of one selection circuit 171 is transferred as sub color density data DS, and the output of the other selection circuit 172 is transferred to a subsequent stage in pixel units as main color density data DI.

(3) TRC The TRC 151 cooperates with the ROS controller 157 to adjust the recorded image reproduction characteristics of the first developing device 123 to a desired one, for example, a linear one like the first quadrant (I) in FIG. The first screen generator 1
The second TRC 152 is a sub-color conversion table (look-up table) for pre-converting the sub-color density data DS before encoding in the second TRC 153, and the second TRC 152 cooperates with the second ROS controller 158 to If the recorded image reproduction characteristics are desired, for example, the first quadrant (
This is a main color conversion table (lookup table) that converts the main color turbidity data Dm in advance before encoding it in the second screen generator 154.

More specifically, if it is assumed that the density data corresponding to the input image density, for example, the sub-color density data DS, is a curve like the fourth quadrant (IV) in FIG. This sub color density data [)
The density of S is converted as shown by the dotted line in the third quadrant (I[[) of FIG. 20. In this case, when the conversion data is pulse width modulated by the first ROS controller 157 via the first screen generator 153, the characteristics of the input density data to the screen generator and the output image (l11 density (hereinafter referred to as 5G-10T characteristics) ) is obtained as shown by the dotted line in the second quadrant (It) of FIG. 20, and as a result,
A linear characteristic as shown in the first quadrant (1) of FIG. 20 is obtained.

Further, if it is assumed that the density data corresponding to the input image density, for example, the main color density data DI11, is a curve like the fourth quadrant (1v) in FIG. The density is converted as shown by the solid line in the third quadrant (1) of FIG. In this case, when the conversion data is pulse width modulated by the second ROS controller 158 via the second screen generator 154, the 5G-JOT characteristics are obtained as shown by the solid line in the second quadrant (ff) of FIG. In particular,
A linear characteristic as shown in the first quadrant (I) of FIG. 20 is obtained.

The reason for data conversion in each of the TRCs 151 and 152 is as follows.

That is, as will be described later, regarding the pulse width modulation characteristics of each of the ROS controllers 157 and 158, there is usually a limit to the number of pulse width modulations.
In the third quadrant of the figure, it may become difficult to obtain the 5G-107 characteristics for linearly correcting the recorded image reproduction characteristics, but in this embodiment, each of the TRC1
Since data can be converted in advance using 51 and 152, the 5G-
It is possible to easily obtain 10T characteristics.

In this embodiment, since the sensor interface circuit 40 is not provided with a logarithmic amplifier, the TRC
151 and 152 also have the function of converting light amount data corresponding to the input image density into density data.

(4) Screen generator (4-A) Basic configuration Screen generator 153.1 in this embodiment
54 outputs the input image data of 2561 density levels m (including 1 degree zero level) as an image density code SC (corresponding to SOS and SCI in Fig. 15) of 5 gradations (including zero density level). It is something.

FIG. 21 is a block diagram showing the basic configuration of each screen generator 153, 154 according to this embodiment.

In the figure, reference numeral 180 is a buffer that outputs 8-bit input image data DT (corresponding to sub color density data Ds or main color density data D-) after first storing it.
T is input to the comparison circuit 240 via the error diffusion circuit 200. The threshold pattern THP set by the threshold pattern setting circuit 190 is input to the error diffusion circuit 200 and the comparison circuit 240, and the error diffusion process and the error diffusion process are performed in the error diffusion circuit 200 and the comparison circuit 240, respectively. After the comparison process is performed, the comparison circuit 240
The output from the subcolor image density code SC3 is input to the density code generator 250, and a predetermined conversion is performed to generate an image density code SO (corresponding to the sub color image density code SC3 or the main color image density code SCI). .

(4-8) Threshold pattern setting circuit (4-
8-1) Algorithm In this embodiment, the threshold 1 hold pattern setting circuit 190 sets a plurality of threshold values when encoding the multi-N tone image data DT, and sets a different A series pattern for each adjacent pixel, It has a B series pattern.

First, the threshold setting algorithm will be explained.

Now, taking as an example a case where n threshold values are set for 256 gradation data (including OII data), as shown in FIG. 22(a), each threshold value THR1, THR1,
THR2...T HRn is reduced by a predetermined change ΔTH to form the A series pattern, and on the other hand,
Each threshold value THR1, T mouth R2 of the standard pattern...
J) The B-series pattern may be obtained by increasing lRn by a predetermined change amount ΔTH.

To be more specific, each threshold value TH of the above standard pattern
R1, THR2...THRn are set, for example, as shown in equation (6) below.

THR1=255/ (nx2) THR2=THR1+255/n THBl-255/ (nx4) +255/ (nx2) THB2=TH81+255/n THB3=THB2+255/n THRn=THRn-1+255/n ++ (6)
On the other hand, each threshold value of the A-series pattern is set according to the following equation (7), for example, as 1° to T-out 2 . . . T-out to 0. However, the above change of 61 units is 255
/(nx4) (the same applies to the following 8-sequence patterns).

THA1=255/ (nX4) TI-IA2=T)-IAI+-255/nT HA3
= T mouth^2+255/n T HAn= T mouth^n-1+255/n -(7)
On the other hand, each threshold value TH81, Tl-182 of the daily pattern
. . . THBn is set, for example, according to the following equation (8).

THBn-THBn-1+255/n-(8) Furthermore,
In this example, in order to equally divide the area partitioned by each threshold value for both the A series pattern and the daily series pattern, hypothetical threshold values as shown in the following equation (9>) are set respectively. It has become.

TI-IAO=T) IAI-255/nT HAn+1
- T mouth ^n+255/nTHBO=THB1-255
/n THBn+1=T)lBn+255/n −(9)
In such a threshold setting method, the number of thresholds n=4 is shown in FIG. 22(b), and each threshold of the A series pattern and the daily series pattern is expressed as shown in Table 3 below.

Table 3 (4-8-2) Example of realized circuit Also, FIG. 23 shows a threshold pattern setting circuit 1 configured according to the algorithm described above.
90 specific examples are shown below.

In the same figure, threshold pattern setting circuit 1
90 has six threshold setting sections 191 (specifically, 191 (0) to 191 (5)), and each threshold setting section 191 includes an A-series threshold setting switch 192 for the A-series pattern, and an A-series threshold setting switch 192 for the A-series pattern. Threshold IT'-') THAi, THBi (i = O
-------5) and a selector 194 that selects the video clock signal (hereinafter referred to as the V clock signal) VCK.
It consists of a flip 70 and a knob 195 which divides the frequency and creates a selection signal for the selector 194, and each threshold setting section 191 (0) to 1.
91 The threshold values NT ports 0 to TH5 from (5) are A
The series pattern <TH^0 to T^5) and the eight series pattern (TH80 to THB5) are repeated alternately.

(4-C) Error diffusion circuit (4-C-1)
Algorithm The error diffusion circuit 200 used in this embodiment suppresses the influence of differential data (error data) between the image data DT and the threshold faT that occurs when the image data OT is divided below a predetermined threshold. This is to correct the image data DT.

FIG. 24 is an explanatory diagram showing the algorithm of the error diffusion circuit r8200 according to this embodiment.

In the figure, the i-th pixel Pm) on the j-line is the pixel of interest, and its image data is X, while the +-1, i, and i+1-th pixels Pj-1 (i-1 )
, Pj-1(i), Pj-1(i+1) difference de~
Assuming that the values are A, B, and C, respectively, and the difference data of the pixel Pj (i-1) of the pixel of interest Pj (i) is D, the corrected image data X° of the pixel of interest Pj (i) is as follows. (10)
It is calculated using equation (11). Note that ΔX is difference correction data, and kl to 4 are correction coefficients for weighting according to the degree of influence of the difference data of each pixel.

ΔX=kl 2 for A+ 3 for B+ 41 for C+) However,
Σki (i=l~4)-1...(10)x
' = x + ΔX (11) In particular, in this example, kl = 0.2° k2 = 0
．． 5. 3 = 0.2. 4 = 0.1.

Further, FIG. 24 shows the values and polarities of the difference data used in this example.

In the same figure, NO, O to No, 4 are image data D
Indicates the division number of the number of density gradations of T, and for the A series pattern, No, 0: THAO-THAl-1No, 1
:Tl-lAl~THA2-1NO, 2:T mouth^2~T
HA3-1 NO, 3: T ＾3～chome＾4-1 No, 4: THA4～ T 1 ＾5
-1, while in the B series pattern, NO
,0:THBO~THBI-1 No,1:THB1~THB2-1 NO,22TH82~T)-183-1No,3
: THB3~THB4-1No, 4: T)-IB
4 to THB5-1.

The difference data ΔDT in each division area is based on the intermediate position image data (for example, A series pattern No., 16+80)/2) located at the midpoint of each division area, and the image data DT and the intermediate The difference with the position image data is expressed by the polarity of the opposite.

Correction using differential data ΔDT having two polarities is preferable in that it can faithfully reproduce the gradation characteristics of the output relative to the input gradation, compared to, for example, correction using differential data having only decapolarity or unipolarity. .

(4-C-2) Basic configuration of realizing circuit Based on this principle, the above-mentioned error diffusion circuit P8200 is configured as shown in FIG. 26, for example.

In the figure, reference numeral 201 denotes an adder, and 8-bit image data DT from the buffer 180 is input to one input terminal of the adder 201. Further, reference numeral 202 is a latch circuit that once stores the output data from the adder 201 and then outputs it, and the output data of this latch circuit 202 is inputted to one input terminal of the adder 203. Further, reference numeral 204 is a latch circuit that once stores and outputs the output data of the adder 203, and the output data of this latch circuit 204 is sent to the comparator circuit 240.

Further, reference numeral 190 is a threshold pattern setting circuit that alternately sets each threshold value data 91 to an A series pattern and a B series pattern when classifying the number of density gradations of the image data DT, and 206 is a threshold pattern setting circuit that sets the threshold data 91 for dividing the number of density gradations of the image data DT alternately. Image data DT1 threshold 1 hold pattern setting circuit 19
Threshold data TH from 0 and address data A to be described later
This is a difference value generation circuit for generating difference data (corresponding to difference data A, B, and C shown in FIG. 24) at the pixel before the - line using DT as input data. The difference data is 960 pieces - line F
After being stored in the IFO 207, the difference data of the correction pixel for each pixel of interest is taken into the digital filter 208. Then, this digital filter 208 collects the difference data A, B, C of the correction pixels.
Perform a predetermined calculation using kl A+2, B+3
It outputs data C, and this correction data is input to the other input terminal of the adder 6201.

Further, reference numeral 209 indicates the image data DT from the latch circuit 204 and the threshold 1 hold pattern setting circuit 19.
This is a lookup table for generating 4[> in the correction data of the pixel immediately before the pixel of interest using threshold data TH from 0 as input data, and 4D is the adder for the correction data from this lookup table 209. The signal is input to one input terminal of 203.

(4-C-3) Difference value generation circuit Also, the specific configuration of the difference value generation circuit 206 is described in the 27th section.
As shown in the figure.

In the figure, reference numerals 211 to 215 refer to mutually adjacent threshold data (for example, THO and Tl-11) of each threshold setting section 191 (0) to 191 (5) in the threshold pattern setting circuit 190.
, TH3 and TH4), and 216 to 220 are dividers 221 to 225 that divide the added data from each of the adders 211 to 215 by 1/2.
is a latch circuit that latches the division data from each of the dividers 216 to 220 at the time when a select signal is input to the OC port.

Further, reference numeral 226 indicates an output port QO according to address data ADT (4-bit data in this embodiment), which will be described later.
A decoder selects one of QO to Q4 as a select signal, and outputs QO to Q4 from each output port.
The signals from the latch circuits 221 to 225 are input to the OC ports of each latch circuit 221 to 225. The contents of this decoder 226 are shown in Table 4 below.

Table 4 Further, reference numeral 227 is a subtracter that subtracts the data of one of the selected latch circuits 221 to 225 from the number of density gradations of the input image data DT. ΔDT and 1-bit polarity data m are output.

In such a difference value generation circuit 206, the threshold pattern setting circuit 1901 and the adder 211
to 215 and dividers 216 to 220 divide the number of density gradations of the image data DT into respective division areas N0.0 to No.
, 4, and one of the latch circuits 221 to 225 is selected corresponding to the address data ADT, and the selected latch circuit calculates the corresponding intermediate position image data VDT. After latching, the subtracter 227 outputs the difference data ΔDT between the input image data DT and the intermediate position image data VDT together with the polarity data m.

(4-C-4) Digital filter, lookup table, and digital filter 20 used in this embodiment
8 is shown in detail in FIG.

In the figure, numerals 231 to 233 are three-stage latch circuits that sequentially latch the difference data ΔDT sequentially read out pixel by pixel from the FIFO 207 shown in FIG. 26, and numeral 234 is the output data of the first stage latch circuit 231. 235 is a coefficient multiplier that multiplies the correction coefficient by 1 for the output data of the second-stage latch circuit 232; 236 is a coefficient multiplier that multiplies the correction coefficient by 2 for the output data of the second-stage latch circuit 232;
237 is a coefficient multiplier that performs an operation of multiplying the output data of the third stage latch circuit 233 by a correction coefficient by 3, and 237 is an adder that adds the output data of each of the coefficient multipliers 234 to 236.

Such a digital filter 208 causes three-stage latch circuits 231 to 233 to latch difference data A, B, and C (see FIG. 24) of two pixels one line before, and coefficient multipliers 234 to 236 Each difference data A,
After multiplying B and C by the respective correction coefficients kl, 2, and 3, they are added together by the tightener 237, and kI A
It outputs 2G to + and 3G to B+.

Furthermore, the contents of the lookup table 209 are as follows:
Using image data DT and threshold data TH as address signals, 4D is readably stored in differential correction data obtained by multiplying differential data ΔDT (corresponding to the middle part of Fig. 24) by a correction coefficient by 4, along with its polarity data. be.

(4-C-5) Operation of the error diffusion circuit Therefore, the error diffusion circuit 200 according to this practical example
According to FIG. 26, when the input image data X of the pixel of interest is input to one input terminal of the adder 201, the difference data of two pixels before the − line (A in FIG. 24,
B, C) is multiplied by the correction coefficient kl, 2, and 3 [kl 2 for A+, 3 for B+]
Cl is output from the digital filter 208 and input to the other input terminal of the adder 201. On the other hand, the LLIT 209 outputs second corrected difference data [k4D] obtained by multiplying the difference data (corresponding to the middle part of FIG. 24) of the pixel immediately before the pixel of interest by a correction coefficient by 4.

In this state, in the adder 201, X+ (k
An addition of 2 to IA+ and 3C to B+ is performed, and at the stage when this data is input to one input terminal of the adder 203 via the latch circuit 202, the second correction difference data [k4D] is added. The latch circuit 204 receives the corrected image data x' of the pixel of interest, that is, X+ΔX,
(However, ΔX: 1 A + 2 B + 3 C + 4 D
) is latched, and this corrected image data X' is sent to the comparison circuit 240 at the subsequent stage.

(4-D) Comparison circuit, concentration code generator Comparison circuit 2 above
40, as shown in FIG. 28, consists of four digital comparators 241 to 244, and one input terminal of each comparator 241 receives the corrected image data DT from the error diffusion circuit 200.
The other input terminal B of each comparator 241 to 244 is connected to four threshold setting sections 191 (1) to 19 of the threshold pattern setting circuit 190.
1 Threshold data from (4) Tl-11 to 1 mouth 4
(In this embodiment, the A series pattern and the B series pattern are alternately repeated and output in adjacent pixel units) is input, and the output of each comparator 241 to 244 becomes 1'' when A2B. ing.

Then, each of the comparators 241 to 244 outputs 4-bit address data ADT (specifically, [OO
O] [0001] [0011] [0111] [1
111]) is output, and this 4-bit address data ADT is outputted to a 3-bit image density code SO (specifically, 5C(0)=OOO,5
C(1)=001.5G(2)=011.5C(3)1
01°8C(4) = 111).

In addition, the partition area number and address data AD of the input image data
The relationship between T and image density code SC is as shown in Table 5 below.

(5) ROS controller (5-A) basic configuration Figure 30 shows the ROS controller 157 and second RO
An outline of the S controller 158 is shown.

The -th ROS controller 157 operates in synchronization with a synchronization signal generation circuit 261 that generates a predetermined V clock signal VCK, a polygon motor controller 264 that controls the polygon motor 144, and a V clock signal VCK from the synchronization signal generation circuit 261. It is comprised of a multi-value modulation circuit 265 which receives an image density code SC (corresponding to SC8) from the FIFO 155 and modulates the pulse width of the image density signal @SD in accordance with this image density code SC.

The synchronization signal generation circuit 261 generates a synchronization signal by matching the phase of the V clock signal VCK from the video clock generator 262 and the detection signal of the -th SOS sensor 148 amplified by the sensor amplifier 263. .

Further, the polygon motor controller 264 drives and controls the polygon motor 144 by sending a motor control clock signal SM to the motor driver 161. Furthermore, the multilevel modulation circuit 265
By sending the image density signal SD to the laser driver 159, the first laser 141 is driven and controlled.

Furthermore, the second ROS controller 158 is basically the second ROS controller 158, except that there is no polygon motor controller 0-RA 264.
It has substantially the same configuration as the OS controller 157,
V clock signal VC from video clock generator 272
K and the detection signal of the second SOS sensor 149 amplified by the sensor amplifier 273 to generate a synchronization signal in phase with the detection signal of the second SOS sensor 149,
At this synchronization signal timing, the synchronization signal generation circuit 271 receives and outputs the image density code 5C (S (corresponding to +)) from the gap memory 156, and the synchronization signal generation circuit 2
a multi-level modulation circuit 27 that modulates the pulse width of the image density signal SD based on the image 1 density code SC output from 71;
It consists of 5.

(5-B) Multi-value modulation circuit (5-8-1) Basic configuration The multi-value modulation circuit 265 and 275 according to this embodiment performs optimal image reproduction according to the reproduction image mode (text mode or photo mode). Since the basic configuration is substantially the same, the multilevel modulation circuit 265 will be described below as an example.

FIG. 31 is a block diagram showing details of the multilevel modulation circuit 265 according to this embodiment.

In the same figure, reference numeral 281 is an interface for taking in a 3-bit image density code SC into the multilevel modulation circuit, and the image 1 density code SC taken in by this interface 281 is converted to a V-0 clock signal VCK. It is designed to be latched in the latch circuit 282 in synchronization. and,
The image density code SC from the latch circuit 282 is P-
selected by the decoder 283 consisting of ROM]-do b(
Specifically, b (to B), b (GY3), b (GY
2), b(GYl).

b(14)).

On the other hand, reference numeral 284 uses the phase shift of the pulse signal based on the V clock signal VCK to generate a modulation signal of a pulse width corresponding to the halftone image density code in two patterns (specifically, a pattern that spreads from the left side and The left modulation signals LGY1 to LGY3 of the pattern spreading from the left side and the right modulation signals RGY1 to RGY3 of the pattern spreading from the right side from the left and right gray generator 284 are sent to the left and right selection block 285. has been entered. Reference numeral 286 is a left/right switching signal generator that appropriately generates a left/right switching signal LR8 of 1.0 in response to a mode select signal MS indicating either the text mode or the photo mode. It is sent to selection block 285. And the above left and right selection block 2
85 is the left modulation signal LG according to the left/right switching signal LR8.
YI to LGY3 or right modulation signals RGY1 to RGY3 are selected and output, and either the left modulation signal or the right modulation signal is sent out as modulation signals GY1 to GY3. Furthermore, the modulation signals GYI to GY3 of the left and right selection blocks 285 and 285 are
, the modulation signal BK corresponding to the maximum image density code and the modulation signal W corresponding to the zero image density code are sent to the selector 287.
This selector 287 is input to the decoder 283
One of the modulation signals is selected by the selection code b, and the selected modulation signal is generated as the image Fa density signal @SO.

(5-8-2) Decoder The contents of the decoder 283 used in this embodiment are shown in Table 6 below.

Table 6 (5-8-3) Left and Right Gray Generators FIG. 32 shows details of the left and right gray generators 284 used in this embodiment.

In the figure, reference numeral 301 indicates that the V clock signal VCK is 1
/2 frequency divider, 302 and 303 are frequency dividers 30
304 is a temperature-stable chip consisting of a delay line having the same configuration as each of the above-mentioned delay lines 302 and 303; 3
11 is a CVOS gate for waveform shaping, 312 to 31
4 is an EOR gate, and 315 to 317 are AND gates.

In this embodiment, the first and second delay lines 30
2.303, as shown in FIG. ) and each delay element 321 to 326
Inverter output tap 327 pulled out from the terminal part of
It consists of 332 to 332. In addition, the input tap position is IN,
The output tap positions are each TP (specifically, TPl to T
P6).

Then, the input tap I of the first delay line 302 is
The output from the frequency divider 301 is input to N, and the output from the output taps TP2 to TP4 of the first delay line 302 is input to EO via CMOS gates 306 to 308.
It is input to one terminal of R gates 312 to 314. On the other hand, the output tap TP6 of the first delay line 302
The output from the input tap I of the second delay line 303
This second delay line 303
The output from output taps TP3 to TP5 is CMOS
AND gate 315 via gates 309 to 311
to 317 are input to one input terminal. Then, the output from the output tap TPI of the temperature stable chip 304 is output via the CMOS gate 305 to the E OR gates 312 to 314 and the AND gates 315 to 3.
17 are respectively input to the other input terminals.

In such a circuit configuration, the EOR gate 312
The output of 314 is the left modulation signal LGY1 to LGY.
3, and the above AND gates 315 to 31
The output of 7 is the right modulation signal RGY3, RGY2, RGY
It is now given as I.

(5-8-4) Left/Right Selection Block, Left/Right Switching Signal Generator FIG. 134 shows details of the left/right selection block 285 and the left/right switching signal generator 286 used in this embodiment.

In the figure, the left and right selection block 285 selects left modulation signals LGY3 and LG from the left and right gray generators 284.
Y2, LGYI and right modulation signals RGY3, RGY
2, AND gates 341 to 346 to which RGYI is input to one input terminal, three OR gates 347 to 349, and an inverter 350 to which the output from the left/right switching signal generator 286 is input. and,
The output from the left/right switching signal generator 286 is input to the other input terminal of the AND gates 341 to 343, and the output of the inverter 350 is input to the other input terminal of the AND gates 344 to 346. The outputs of 341 and 344 are taken out as the modulation signal GY3 via the A gate 347, and the outputs of the AND gate 34
The outputs of 2 and 345 are taken out as a modulation signal GY2 via an OR gate 348, and the outputs of AND gates 343 and 34
6 is taken out via an OR gate 349 as a modulation signal GY1.

The left/right switching signal generator 286 also has a flip-flop (hereinafter referred to as F) that divides the clock signal VCK into 172.
Abbreviated as F〉351, and this “F351 output and -
[- Nantes gate 35 to which the deherect signal MS is input
2.

(5-8-53 selector Furthermore, FIG. 35 shows the selector 28 used in this embodiment.
7 details are shown.

In the figure, symbols 361 to 365 represent modulated signals GYI to GY3 from the left and right selection block 285.
, a modulation signal BK corresponding to the maximum image density code and a modulation signal W corresponding to the zero image density code are each input to one input terminal, and a selection code b (specifically, b (to e), b (GY3)
, b(GY21, b(GYI), b(W)
) is input to the other input terminal of each AND gate, 366 is an OR gate that inputs the output from each AND gate, and only the AND gate corresponding to a high-level selection code opens and passes through the AND gate. The modulated signal is outputted from the OR gate 366 as an image density signal SO (corresponding to the image density signal SO8 for sub-color).

Note that the multilevel modulation circuit 27 of the second ROS controller 158
5, unlike the -RO8I controller 157, the non-exposed area is used as an image area. Therefore, as the image density signal SD, the output of the OR gate 366 is converted to the inverter 367 as shown by the imaginary line in FIG. 35, for example. I'm trying to invert it.

(5-8-6) Operation of multi-value modulation circuit The multi-value modulation circuit 265 of the -th ROS controller 157 is centered around the timing charts shown in FIGS. 36 and 37.
The operation will be explained using an example.

In FIG. 32, when the V clock signal VCK as the reference clock passes through the frequency divider 301, the V clock signal whose frequency is divided by 1/2 is converted into a pulse signal (corresponding to VCK/2) based on the reference clock. ), and is output from TP1 of the temperature stable chip 304 with a delay of a predetermined delay amount (DELAYO in this embodiment).

On the other hand, when the pulse signal VCK/2 is input to the first delay line 302, the output taps TP2, TP3, and TP4 of the first delay line 302 are supplied with a predetermined amount of delay (in this embodiment, DELAY1, DELAYO is
LAY2. Pulse signals 8 delayed by DELAY 3) are output. Furthermore, from the output taps TP3, TP4, and TP5 of the second delay line 303, the delay amount to each output tap of the second delay line 303 is added to the delay amount between the input tap IN and output tap TP5 of the first delay line 302. (in this example, DELAY4.DELA
Y5. Pulse signals delayed by the sum of DELAY6 and DELAY6 are respectively output.

In this case, the EOR gates 312 to 31
4 outputs left modulated signals LGY1 to LGY3 having pulse widths corresponding to the above-mentioned DELAYI to DELAY3. On the other hand, the AND gates 315 to 317 output a pulse width (DELAY3) obtained by subtracting DELAY4 to DELAY6, respectively, from the pulse width of VCK/2.
or DELAYl) right modulation signal RGY3,
RGY2 and RGYI are output.

Here, it is assumed that the mode select signal MS indicates the text mode (in this embodiment, text mode: mode select signal MS=0°; photo mode: mode select signal MS=1).

At this time, as shown in FIG. 37(a), the left/right switching signal LR8 from the left/right switching signal generator 286 is always "1", and the left modulation signals LGY1 to LGY3 are output as they are as the modulation signals GY1 to GY3. selector 2
87. Then, the selector 287 generates an image density signal SD for each pixel according to the selection code from the decoder 283, sends it to the laser driver 159, and drives the first laser 141.

In such a driving operation process, the first laser 14
As shown in FIG. 38(a), the lighting operation of No. 1 is a pattern in which each pixel is always lit sequentially from the left side (so-called sawtooth wave pattern), so one pixel forms a line. The resolution is increased accordingly, and fine lines such as characters can be reproduced satisfactorily.

On the other hand, assuming that the mode select signal MS indicates the photo mode, the left/right switching signal LR8 from the left/right switching signal generator 286 is 1 as shown in FIG. 37(b).
1 II II OII will be output alternately every cycle of each voltage check signal VCK (for each pixel P unit), and the left modulation signals LGY1 to LGY3 and the right modulation signal RG
YI to RGY3 are alternately selected as modulation signals GY1 to GY3 for each pixel P and input to the selector 287. Then, this selector 287 selects the decoder 2
An image density signal SD is generated for each pixel according to the selection code from 83 and sent to the laser driver 159 to drive the first laser 141. Note that in the multilevel modulation circuit 265 according to this embodiment, the right modulation signals RGYI to R
Although GY2 is generated only every two pixels, in the photo mode, no particular inconvenience occurs because the left modulation signal is used alternately with GYl to LGY3.

In such a driving operation process, the first laser 14
As shown in FIG. 38(b), the lighting operation of No. 1 is a pattern in which one of the two adjacent pixels P is lit sequentially from the left side, and the other is lit sequentially from the right side (so-called triangular wave pattern). Therefore, a line is formed by two pixels P, and the resolution is lower than that of a sawtooth wave pattern, but on the other hand, gradation expression is improved, and halftone images such as photographs are reproduced well. be done.

Note that the multilevel modulation circuit 27 of the second ROS controller 158
5 operates in substantially the same manner as the -th ROS controller 157 described above.

In such multilevel modulation circuits 265 and 275, each of DELAY1 to DELAY3 of the left and right gray generators 284 described above is set as follows.

Generally, the relationship between the number N of density gradations of the input image data DT and the recorded image density aperture is obtained as a nonlinear development characteristic curve Y as shown by the solid line in FIG.

Under such circumstances, if the relationship between the image density code SC and the recorded image density is corrected to a linear development characteristic curve Y' as shown by the imaginary line in FIG. It becomes possible to set the density difference of the recorded image density - from C(0) to SC(4) at approximately equal intervals, and the gradation reproducibility of the recorded image can be improved accordingly. Conceivable.

From this point of view, image density codes 5C(1), 5G(2),
When examining the recorded image m1 degree corresponding to 5C(3), Yl and Y2 on the actual development characteristic curve Y.

It is understood that this corresponds to Y3. Therefore, the above mu concentrations:]-t'5c(1), 5C(2).

Yl and Y2 of the development characteristic curve Y when modulating the pulse width of the image density signal SD corresponding to SC(3).

What is necessary is to obtain a recorded image density corresponding to Y3.

Therefore, it is necessary to modulate the pulse width of the image density signal SD at the ratio α of the maximum density gradation number of the density 111;i number of the input image data corresponding to Yl to Y3 of the development characteristic direction IY. The above DELAY1 to DEL
AY3 is set according to the ratio α.

Further, in this embodiment, the frequency divider 301 has a third
As shown in FIG. 2, (1) The clock signal vCK is divided into 1/2 to create a pulse signal VCK/2 covering the entire range of one pixel P. Therefore, as in the above embodiment, when extracting a predetermined amount of delay from each delay line 302, 303, E
This results in a simple circuit configuration using OR gates 312 to 314 and AND gates 315 to 317.

To be more specific, for example, as shown in Figure 40, ■
If the clock signal VCK itself is used as a modulation reference pulse signal, for example, a predetermined D
Pulse signal delayed by ELAY and change I! When the I reference pulse signal is input to the FOR gate, the EOR output is
In addition to the pulse signal shown by the solid line within the range of one pixel P, a pulse signal shown by the two-dot chain line is also generated, making it impossible to extract only the pulse signal according to the above DELAY. It is necessary to extract a pulse signal according to the DE LAV using a logic circuit other than the FOR gate. Note that this also applies to the case where a predetermined DELAY is extracted from the second delay line 303.

Furthermore, in this embodiment, the first delay line 302
The reason for using the temperature stable chip 304 having the same configuration is as follows.

For example, as shown in FIG.
For example, when the modulated reference pulse signal VCK/2 based on Since a temperature change similar to that of the first delay line 302 occurs, the modulation reference pulse signal VCK/2 itself changes position from the state shown by the solid line to the state shown by the imaginary line when passing through the temperature stable chip 304. It will change with δ.

Therefore, even if the output pulse signal fluctuates due to a change in the temperature of the delay line 302, the modulation reference pulse signal VCK/2 and the output pulse signal of the delay line 302 fluctuate while maintaining the relative position gi relationship. Therefore, the output pulse width of the EOR gate to which both are input is kept constant without being affected by temperature changes. Incidentally, since the modulation reference pulse signal VCK/2 and the output pulse signal of the second delay line 303 also fluctuate while maintaining a relative relationship, the output pulse width of the AND gate to which both are inputted also changes. It remains constant without being affected by temperature changes.

Furthermore, in this embodiment, since the CMOS gates 305 to 311 are used as waveform shaping means, there is little variation in the threshold position due to temperature changes. For this reason, as shown in FIG. 42, for example, when shaping the rounded state of the rising and falling portions of the output pulse signal of the delay line, the threshold position @ (indicated by the dotted chain line in the figure) changes. Since there is little to do, the pulse width of the output signal of the CMOS gate is kept stable.

(5-8-7) Modification In this embodiment, the delay amounts of the delay elements 321 and 322 of the delay lines 302 and 303 are set appropriately in advance. For example, the delay lines 371 to 373 have a uniform delay amount of 10 n5ec for each output tap 01 to O5, and the delay lines 372, 373 have a uniform delay amount of 15 n5ec for each output tap 01 to 03. By combining and wiring appropriately, the delay amount of the drawer taps L1 to L8 can be reduced to 10.15.20
It becomes possible to make fine adjustments to .degree.25...45 (n5ec, ), and to obtain a desired amount of delay by appropriately selecting the drawer taps L1 to L8.

In this embodiment, the left and right gray generators 28 described above are used to divide the pulse width of the image density signal SD unequally.
4 is used, but it can also be applied to equally dividing the pulse width of the image density signal SD by setting the delay amounts of the delay lines 302 and 303 to be equal.

(2) Operation of the device Next, the operation of the laser printer according to this embodiment will be explained.

In FIG. 15, the density data D of the input image data is distributed by a circuit 150 into two systems of image density data [)s and Qn+ for the sub color and the main color, according to the color flag CF. Strain TRC15
After being converted by one density at 1 and 152, the signals are input to two screen generators 153 and 154.

Then, each screen generator 153, 154
Image density codes scs, s corresponding to input image density data Ds, Q+e are generated using different threshold patterns (A series pattern, day series pattern) for each adjacent pixel.
Generate cs. These image density codes SCs, SCm
are set corresponding to the number of sub-pixels PS when the -pixel P is divided into four, as shown in FIGS. 44(a) and 44(b).

After this, the image density for the subcolors is set to F[
The main color image density code SC1 is input to the multi-level modulation circuit 275 of the second ROS controller 158 via the gap memory 156, while the main color image density code SC1 is input to the multi-level modulation circuit 275 of the second ROS controller 158 via the FO 155. be taken in.

Now, if you select text mode, the image density codes for subcolors 5O8(0) to 5C8(4) are
As shown in FIG. 44(a), the image density signal 5Ds(0
) (equivalent to O), 5Ds(1) (equivalent to DELAYl)
, 5Ds(2) (equivalent to DELAY2).

5Ds(3) (equivalent to DE LAY3), 5O3(
4) Output as (maximum pulse width). At this time,
As shown in FIG. 45(a), pixels Pi to pi+4
If the image density signals SDS for the first laser 14 are respectively S D 5 (0) to S D 5 (4),
1 irradiates the photoreceptor 120 with a beam having a pulse width corresponding to each of the image density signals SDs, and forms latent images Z i+1 to Z1+4 whose beam irradiation portions serve as image portions. Each latent image Z is reversely developed with red toner in the first developing device 123, and a first toner image T (specifically, Ti to Ti+4) is formed on the photoreceptor 120.

On the other hand, the image density signal S(,e(0) to SCa+(4) for the main color is as shown in FIG. 44(b).
Image density signal 5DI(0) (corresponds to maximum pulse width).

SDm (1) (corresponds to the pulse width obtained by subtracting DELAYI from the maximum pulse width), S Da (2) (corresponds to the pulse width obtained by subtracting DELAY2 from the maximum pulse width).

S D 1 (3) (equivalent to the pulse width obtained by subtracting DELAY3 from the maximum pulse width), SDm (4) (equivalent to O)
is output as At this time, as shown in FIG. 45(b), the ibma degree signals SDI for pixels Pi to pi+4 are S D m (0) to S D m (4), respectively.
Assuming that, the second laser 142 irradiates the photoreceptor 120 with a beam having a pulse width corresponding to each of the image density signals SD-, and forms a latent image Z1+1 in which the non-exposed area becomes an image area.
to form Zi+4. Each latent image Z is regularly developed with black toner in the second developing device 124, and a second toner image T (specifically, Ti to Ti+4) is formed on the photoreceptor 120.

In addition, if you select photo mode, as mentioned above,
The image forming operation is basically the same as in the character mode, except that the growth direction of the image density signal SD in the pixel P is alternately left and right for each adjacent pixel.

In such an image recording operation process, the image density signals S D (0) to S
When the relationship between D(4) and recorded image density was investigated, it was confirmed that the image reproduction characteristics were extremely linear, as shown by the imaginary line in FIG. 46.

In addition, the threshold pattern setting circuit 1 described above
When the threshold of 90 was fixed as a comparative example and images were recorded in the same way in the example and comparative example in the photo mode, the screen generator It was confirmed that the unique pattern (texture) obtained by the error diffusion method was less noticeable in the example than in the comparative example.

47(a) shows an example of the image recording output for an input pixel whose input density level changes continuously from 0 to 128 in the embodiment, and FIG. 47(b) shows the image recording output of FIG. 47(a). In the example, the area where the input density level is about 5 to 70 is enlarged, and white pixels are output as white and gray pixels are output as black. Figure (C) shows the comparative example where the input density level is O.
An example of image recording output for input pixels that continuously changes from 128 to 128 is shown, and (d) in the same figure is an enlarged image of the area where the input density level is about 5 to 70 from the image recording output example in (C) of the same figure. shows the output of white pixels as white and gray pixels as black.

Embodiment 2 In this embodiment, the present invention is applied to a 1-bus, 2-power, 1-color two-color copying machine similar to Embodiment 1, and its basic configuration is the same as that of Embodiment 1. 11 processing unit 20
However, the laser printer 110 as an image printer is different from that of the first embodiment.

In this embodiment, the laser printer 110 uses the density data D and color flag CF from the image processing unit 20 as address signals, as shown in FIG.
The TRC381 consists of a lookup table and arithmetic circuit that converts and outputs the number of density gradations of the density data D, and the converted density data D from this TR0381 is used as an input signal, and an error diffusion method is adopted to generate a 60,000-line screen. A screen generator 38 that generates an image density code SC at
2, and the data distribution circuit 383 divides the image density hood SC from the screen generator 382 into two systems, the sub color image density code SC3 and the main color density code SCs, according to the color flag C. , data distribution is performed by a buffer 384 for adjusting the transfer timing of the color flag CF to the circuit 383, and the data distribution is performed by one of the image density codes SC from the circuit 383.
s via the FIFO 155 and the first laser 141
-R which generates the image density signal SDs which becomes the drive signal of
OS controller 157 and the above data distribution circuit 38
A second ROS controller 158 receives the other image density code SCm from No. 3 through a gap memory 156 and generates an image density signal SDm which becomes a drive signal for the second laser 142.

In this embodiment, the TRC 381 is realized by implementing the -TRC 151 and the second TRC 152 in the first embodiment using one lookup table, and also,
The data distribution circuit 383 has the same configuration as the data distribution circuit 150 in the first embodiment.

Note that other components similar to those in the first embodiment are given the same reference numerals as those in the first embodiment, and detailed explanation thereof will be omitted here.

Next, the operation of the 1-bus, 2-power, 1-color two-color copying machine according to this embodiment will be explained.

First, when the density data D and color flag CF output from the image processing unit 20 are input to the TRC 381, the TR 0381 converts the density data D into an appropriate gradation level according to the color flag CF and outputs the converted data.

Next, the converted density data D is converted into an image density code SC by a screen generator 382, and this image density code SC is distributed to a sub-image density code SCs and a main image by a circuit 383 according to the color flag C. After being assigned to concentration code SC-, each
S controller 157, second ROS controller 158
transferred to the side.

After that, the recording sheet 127 is processed through the same process as in Example 1.
A two-color image is formed on top.

In such an operation process, in the first embodiment, the image density data D distributed into two systems according to the color flag CF are respectively coded. Sub-color pixels may appear in the color area, or conversely, main color pixels may appear in the sub-color area, but in this embodiment, the image (II density data D is coded) After coloring, the images are divided into main color and sub color areas, so there is no possibility that the main color area and sub color area will overlap.

In addition, in this embodiment, only one TRC 381 and one screen generator 382 are installed, and the first embodiment
Since almost the same function can be realized as in Example 1,
The device configuration can be simplified compared to the above.

Embodiment 3 ■ Basic configuration In this embodiment, the present invention is applied to a two-color copying machine with one bus, two outputs, and one type, similar to the first embodiment, and its basic configuration is the same as in the first embodiment. It has an image processing unit 20, but the laser printer 1 as an image output unit is
10 is different from the first embodiment.

In this embodiment, the laser printer 110 uses the density data D and color flag CF from the image processing unit 20 as address signals, as shown in FIG.
Density III of density data D! A TRC401 (corresponding to the TRC381 of the second embodiment) consisting of a look-up table and arithmetic circuit that converts and outputs the i-training and outputs the corresponding color flag CF as is;
Using the converted density data D and color flag CF from the TRC 401 as input signals, an image density code SC is generated on a line screen using the error diffusion method, and
A screen generator 402 that outputs the corresponding color flag CF as it is, and an image from this screen generator 402! The III degree code SC is changed to the sub color image density code SC according to the color flag CF.
A circuit 403 (corresponding to the circuit 383 in the data distribution in the second embodiment) distributes data to two systems, s and main color density code SCI, and a circuit 40
One image density code SCs from 3 is stored in FIFO155.
A first ROS controller 1 captures the image density signal SO3 through the ROS controller 1 and generates an image density signal SO3 that becomes a drive signal for the first laser 141.
57, and the above data distribution takes in the other image density code SCI from the circuit 403 via the gap memory 156, and generates the image density signal S which becomes the drive signal for the second laser 142.
and a second ROS controller 158 that generates D+e.

Note that other components similar to those in the first embodiment are given the same reference numerals as those in the first embodiment, and detailed explanation thereof will be omitted here.

(2) Basic configuration of screen generator (1) FIG. 50 is a block diagram showing the basic #1Ili of the screen generator according to this embodiment.

In the figure, reference numeral 411 is a buffer 411 that temporarily stores density data D, and the density data D from this buffer 411 is input to a comparison circuit 413 via an error diffusion circuit 412. On the other hand, the reference numeral 414 is a buffer for temporarily storing the color flag C.
The color flag CF from this buffer 414 is input to a reference color flag extraction circuit 415, and in this reference color flag extraction circuit 415, all the color flags C that need to be referred to in the error diffusion circuit 412 are extracted. On the other hand, the color flag of the pixel of interest (hereinafter referred to as the "color flag of interest") is sent to the latch circuit 416 at the subsequent stage.
The threshold pattern THP set by the threshold pattern setting circuit 417 having the same configuration as in the first embodiment is inputted to the comparison circuit 413, and the error diffusion circuit 412 and the comparison circuit 413 perform predetermined error diffusion, respectively. After the processing and comparison processing has been performed, the output from the comparison circuit 413 is input to a density code generator 418, where a predetermined conversion is performed to generate an image density code SC. The image density code SC from the density code generator 418 and the color flag CF from the latch circuit 416 are synchronized and output in pairs for each pixel of interest.

(2) Error Diffusion Circuit (2-A) Algorithm FIG. 51(a) shows the algorithm of the error diffusion circuit 412 used in this embodiment.

In the figure, the i′IIIth pixel Pj(i
) is the pixel of interest and its density data is X, while j
-1 line i-i, i, i+1 each pixel Pj-1
(i-1), Pj-1(i), Pj-1(i+1)
The difference data of the pixel of interest P j (
If the difference data of the immediately preceding pixel P j (i-1) of i) is D, the corrected 1-degree data X' of the pixel of interest P j (i) is calculated using the following equations (12) and (13). It looks like this. Note that ΔX is difference correction data, Ql to g4 are correction coefficients for weighting according to the degree of influence of the difference data of each pixel, and a predetermined level of weighting is applied only to the difference data of the same system as the pixel of interest. Difference data of a different system from the pixel of interest is held at O level.

ΔX=QI A+023+g3 C+g4 DHowever, Σ
gi (i=1~4)=1 ((in case of Ji f=o) ・・・・・・〈12)x'
=x+ΔX (13) In this example, the above 01 =0.2.02=0.5.1
=0.2. q4 is set to 0.1.

Now, as shown in FIG. 51(a), the pixel of interest Pj(i)
is the main color data (black in this example), and the peripheral pixels of the same system as this pixel of interest Pj(i) are Pj-i (
i-1), Pj-1(i), Pj(i-1), the difference correction data ΔX is gI A+02
3+g4D, and the corrected density data X' is X+01
A+02 B1Q4 D.

That is, in this embodiment, only the difference data of the same system as the pixel of interest is subject to correction, and the difference data of the pixel of interest and a different system is ignored.In other words, the density data of the pixel of interest and pixels of a different system is ignored. It is treated as "0".

(2-8) Example of Implemented Circuit FIG. 51(b) is a circuit that implements the error diffusion circuit 412 according to the algorithm described above.

In the figure, reference numeral 421 denotes an adder, and 8-bit density data D from the buffer 411 is input to one input terminal of the adder 421. Also, code 42
2 is a latch circuit that once stores the output data from the adder 421 and then outputs it, and the output data of this latch circuit 422 is inputted to one input terminal of the adder 423. Further, reference numeral 424 is a latch circuit that once stores the output data of the adder 423 and then outputs it.
3.

Further, reference numeral 426 indicates the concentration data D1 from the latch circuit 424 and the threshold 1 hold pattern setting circuit 4.
Threshold data T port and address data ADT from 17
(Refer to I [4-D] of output example 1 of comparison circuit 413)
This is a difference value generation circuit for generating difference data (corresponding to A, B, and C in FIG. 50) at the pixel before the − line using input data, and the difference data ΔDT and Reference color flag extraction circuit 41
The reference color flags CF from 5 are both -line fl
After being stored in the FOs 4 and 27, the correction difference data and color flag C' for each pixel of interest are taken into the digital filter 428.

Then, the digital filter 428 receives difference data 8 of the correction pixels of the same system as the pixel of interest.

8. Perform a predetermined calculation using C, l A〇2B+c
[C] is output, and this correction data is input to the other input terminal of the adder 421.

In this embodiment, the digital filter 428 includes three-stage latch circuits 431 to 43 that sequentially latch the difference data ΔDT and the color flag CF for each pixel.
3, a coefficient multiplier 434 that performs an operation of multiplying the difference data ΔDT (corresponding to A in FIG. 50), which is the output data of the -th stage latch circuit 431, by a correction coefficient g1, and a second stage latch circuit. Difference data ΔD which is the output data of 432
A coefficient multiplier 435 that multiplies T (corresponding to 8 in FIG. 50) by a correction coefficient 92 and difference data ΔDT (FIG. 51(a)) which is the output data of the third stage latch circuit 433. for each coefficient multiplier 434 to 436 when the color flag CF of the input difference data and the color flag CF of interest do not match. EOR gate 437 that outputs flag information signal FS for inhibiting arithmetic operations
439 and an adder 440 that adds the output data of each coefficient multiplier 434 to 436.

Such a digital filter 428 causes the three-stage latch circuits 431 to 433 to latch the differential data A, B, C of two pixels one line before, and the seven lags C of each color, and Only for the difference data, coefficient multipliers 434 to 436 calculate the difference data A,
B, C and their respective correction coefficients q1. Q2. (After multiplying by J3, add them in adder 340,
B+g3G (However, the correction coefficient for difference data of a different system from the pixel of interest is substantially O).

Furthermore, reference numeral 441 is a lookup table;
Density data D, threshold data T, and color flag of interest C
A color flag C, which is a pair of F and input density data D, is a flag information signal indicating which relationship.
The difference correction data a4D obtained by multiplying the difference data ΔDT (corresponding to the middle part of FIG. 51(a)) by the correction coefficient 04 can be read out together with its polarity data. In this case, the flag information signal "S is the color flag of interest C".
It is generated by inputting the color flag CF that is a pair of the input density data D to the FOR gate 442, and when the two match, it becomes 41011, and a4D is output from the lookup table 441 described above together with the polarity. On the other hand, when the two do not match, it becomes "1 par" and the lookup table 441 always outputs 110 I+.

Therefore, according to this embodiment, taking as an example the error diffusion processing for the pixel pattern shown in FIG. ) are added, and this data passes through the latch circuit 422 and is sent to the adder 423.
The second difference correction data q4D is added to one input terminal of the pixel of interest, and the latch circuit 424 receives the corrected density data of the pixel of interest
04D will be latched, and this corrected data X° will be sent to the comparison circuit 413 at the subsequent stage.

■ Features of the Apparatus The 1-bath, 2-power, 1-color two-color copying machine according to this embodiment has substantially the same functions and effects as the second embodiment. Since the image density data D is coded without distinguishing between pixels and sub-color pixels, it is possible to code while taking image densities of other systems into consideration. If so, the image density data D can be coded with main color pixels and sub color pixels distinguished, so only the image density data of the corresponding system can be coded while ignoring the image densities of other systems. Can be accurately coded as a target.

Example 4 The basic configuration of a two-color copying machine according to this example is almost the same as that of Example 1, but the -TRC151 and the second TR
The configuration of C152 is different. Incidentally, for convenience of explanation of this embodiment, the same components as in the first embodiment are given the same reference numerals as in the first embodiment.

In this embodiment, the -TRC 151 includes a character conversion table 451 in which density gradation conversion is performed on the premise that the image data DT (corresponding to sub-color density data Qs) is a character image, and The photo conversion table 452 performs 1l density gradation conversion on the premise that the DT is a photo image, and the output terminal A or B is output according to the mode select signal (character mode or photo mode selection signal @>MS). Select, mode select message @MC
When is in the character mode, the input image data DT is transferred to the character conversion table 451 side through the output terminal A, and when the mode select signal MS is in the photo mode, the input image data DT is transmitted through the output terminal B.
A selection circuit 453 is provided for transferring the input image data DT to the photo conversion table 452 side through the photo conversion table 452 side.

In this embodiment, the data stored in the text conversion table 451 and the photo conversion table 452 are, for example, the fifth
The settings are as shown in Figure 3. In the figure, the density gradation conversion range of the photo conversion table 452 is the same as that of the text conversion table 452 for the density gradation of the same input image data DT.
It is set narrower than the density gradation conversion range of No. 51.

Next, how to set the density gradation conversion range will be explained using the photo conversion table 452 as an example.

Now, in the first quadrant (I) of FIG. 54, the image reproduction characteristics of the normal first developing device 123 are shown by a dotted line, and the image reproduction characteristics Yp to be reproduced in the photo mode are shown by a solid line in the first quadrant (I). Assuming that the density data corresponding to the input image density is given by a curve like the fourth quadrant (IV) in FIG.
-10T characteristics (characteristics between input density data to the screen generator and output image density) must be set like the curve S' in the second quadrant (II), but -ROS
Since the number of modulations of the pulse width of the image density signal SD of the multilevel modulation circuit 265 of the controller 157 is limited, a situation may arise in which the above curve S° cannot be obtained.

Under these circumstances, if the data conversion of the -TRC 152 is set as in the song 11M in the third quadrant (III), the data conversion in the above-mentioned 5
By setting the G-10T characteristic to one that can be easily obtained along the pulse width modulation pattern of the multilevel modulation circuit 265, it becomes possible to obtain the desired image reproduction characteristic Yp.

The density gradation conversion range of the text conversion table 451 may be set by replacing the target density reproduction curve Yp in the first quadrant of FIG. 54 with that for text.

On the other hand, the second TRC 152 basically has the same configuration as the -TRC 151, except that the specific stored data of each conversion table is different.

Therefore, according to the two-color copying machine according to this embodiment,
When photo mode is selected, each TRC151,1
At 52, the photo conversion table 452 is selected, and the input image data DT is transferred to the respective screen generators 153 and 154 via the photo conversion table 452. Thereafter, as in Embodiment 1, the sub-color image density code SC from each screen generator 153 and 154 is
s.

The main color image density code SCm is the ROS controller 157. respective desired image density signals SOS via the second ROS controller 158;

After being converted to SDm, this image fi density signal SDs.

The first laser 141. based on SDm. Second laser 142
The output of is pulse width modulated.

Now, when we looked at the reproduced image when the photo mode was selected using the example 1 as a comparative example, we found that the image of this example is better than that of the comparative example, as shown in Figure 55 (aHb). It can be seen that the high-density region of the photographic original has less distortion and smooth density gradation.

In addition, if the character mode is selected, the first and second TRC
Since the character conversion table 451 (corresponding to the first embodiment) is selected in 151 and 152, the same operation as in the first embodiment is performed, and a character image quality comparable to that in the first embodiment is obtained.

Embodiment 5 The basic configuration of a two-color copying machine according to this embodiment is approximately the same as that of Embodiment 1, except that the -th ROS controller 157
and the multilevel modulation circuit 26 of the second ROS controller 158
5.275 has a different configuration. Incidentally, for convenience of explanation of this embodiment, the same components as in the first embodiment are given the same reference numerals as in the first embodiment.

In this embodiment, the above-mentioned ROS controller 15
The multilevel modulation circuit 265 of No. 7 is configured as shown in FIG.

In the same figure, reference numeral 461 is an interface for taking in an image density code SC (corresponding to the sub-color image!111 code SC3) into the multilevel modulation circuit 265, and the image density code taken into this interface 461 S
C is a latch circuit 462 in synchronization with the V clock signal VCK.
It is designed to be latched to. Then, the image 11-]-do SC from the latch circuit 462 is converted into a selection code b (specifically, b (BK), b (GY3), b (GY2)) by a decoder 463 consisting of a P-ROM.
, b(GYl), b(H)). In this case, the contents of the decoder 463 are set to be the same as in the first embodiment.

On the other hand, reference numeral 464 is a character gray generator that utilizes the phase shift of the pulse signal based on the V clock signal VCK to generate a modulation signal with a pulse width corresponding to the halftone image density code in the character image. Utilizing the phase shift of the pulse signal based on the zero clock signal VCK,
a photographic gray generator that generates a modulation signal with a pulse width corresponding to a halftone image density code in a photographic image;
466 selects the V clock signal VCK to output terminal A or B in accordance with the mode select signal MS, and when the mode select signal MC is in the character mode, the clock signal VC is sent to the character gray generator 464 through the output terminal A.
K is transferred to the photographic gray generator 4 through the output terminal B when the mode select signal MS is the photographic mode.
This is a selection circuit that transfers the V clock signal VCK to the 65 side.

Then, the modulation signal GY1 from the text gray generator 464 or the photographic gray generator 465 is output.
to GY3, the modulation signal BK corresponding to the maximum image density code, and the modulation signal W corresponding to the zero image density code are input to a selector 467, and this selector 467 has a configuration similar to that of the first embodiment, Decoder 4 above
One of the selection signals is selectively activated by the selection code b of 63, and the selected modulation signal is generated as an image density signal SD (corresponding to the sub-color image density signal SDs).

Further, FIG. 57 shows the basic configuration of each gray generator 464, 465 used in this embodiment.

In the same figure, reference numeral 471 is a frequency divider that divides the frequency of the V clock signal into 1/2, and 472 is a delay line that delays the pulse signal from the frequency divider 471 by a plurality of preset delay times. is a temperature stable chip consisting of a delay line having the same configuration as the above-mentioned delay line 472;
474 to 477 are CMOS gates for waveform shaping;
78 to 480 are EOR gates.

In this embodiment, the delay fin 47
The basic configuration of the delay line 472 is the same as that adopted in the first embodiment, and the three output taps TP of this delay line 472
2 to Te4, halftone image density code S C
Modulation signals with three pulse widths corresponding to (1) to SC(3) are generated. Note that TPI is used as the output tap of the temperature stable chip 473.

In addition, in this embodiment, the delay line 472 of the character gray generator 464 is
The amount of delay between TPI of 4 is DELAYl or DEL.
AY3, and the delay amount between Te3 and Te4 of the delay line 472 of the photographic gray generator 465 is DELAY1' or DELAY3°, each delay amount is as follows: DELAYl > DELAYI ' DE LAY2 > DE LAY2° DE The values are set in advance to satisfy the relationship: LAY3>DE LAY3°, and to obtain the YC and Yp curves shown in FIG. 59 as character image reproduction characteristics and photographic image reproduction characteristics.

In this embodiment, each of the above delay amounts is set as follows, for example.

DELAY1=15 DELAYlo-10DELA
Y2=25 DELAY2'=20DELAY3=3
5 DELAY3'=30 However, the unit is n5ec, and the maximum pulse signal width is 55 n5ec.

Next, the operation of the two-color copying machine according to this embodiment, particularly on the image output side, will be explained.

Now, focusing on the image recording of the -th color, the image density code SC from the first screen generator 153 is transmitted to the -th ROS controller 157 via the FIFO 155.
Suppose that it is entered in

Here, if the photographic mode is selected, the photographic gray generator 465 is selected in the multi-value modulation circuit 265. Then, in the photographic gray generator 465, when the V clock signal VCK as a reference clock passes through the frequency divider 471, the V clock signal whose frequency has been divided into 1/2 is converted into a pulse signal (VCK/
2).

When the pulse signal is input to the delay line 472, the taps TP2 to TP4 of the delay line 472 output the pulse signal with a predetermined delay.

On the other hand, the pulse signal passing through the temperature stable chip 473 and each tap TP2 to TP4 of the delay line 473
After passing through CMOS gates 474 to 477, the pulse signals are input to EOR gates 478 to 480, respectively. Then, each EOR gate 478 to 48
The modulated signals GYI, GY2, and GY3 from 0 are output as signals having pulse widths corresponding to the above-mentioned DELAYIo to DELAY3', respectively, and are sent to the selector 46.
Transferred to 7.

On the other hand, as shown in FIG. Then, GYl, GY2, GY3 are added to the modulated signal 8 corresponding to the selection code b.
, W is selected, and the image density signal SD is output. Image density signal S D (1) to S at this time
The pulse width of D(3) corresponds to DELAY1' to DELAY3', as shown by the dashed line in FIG.

Note that when the text mode is selected, the text gray generator 464 is selected and the image density code S
The pulse width of the image density signal S D (1) to S D (3) corresponding to G (1) to S C (3) is DE
It is compatible with LAY1 to DELAY3.

When the output pulse width of the first laser 141 is modulated based on the image density signal SD generated in this way, the 59th
As shown in the figure, image reproduction characteristics Yp according to the photo mode
Alternatively, an image reproduction characteristic VC corresponding to the character mode can be obtained. That is, the image reproduction characteristic Yp corresponding to the photo mode has an output image density level lower than that of the image reproduction characteristic YC corresponding to the text mode.

Here, a type without a photographic gray generator 465, that is, a type in which a photographic original is reproduced using a text gray generator 464, is used as a comparative example, and the reproduction characteristics of a photographic original are investigated. As shown in FIG. 60(a). As shown in (b), it can be seen that, compared to the comparative example, the example exhibits less collapse in the high-density region of the photographic original and has a smooth density south tonality.

The basic configuration of the two-color copying machine according to the embodiment is almost the same as that of the fifth embodiment, but the configuration of the first and second screen generators 153 and 154 is similar to that of the fourth embodiment (corresponding to the first embodiment). 〉It is different from 〉.

First, the second and second screen generators 153.1
54 algorithms will be explained.

Now, taking as an example the case where 256 gradation image data is converted to a 2-bit image density code SC, as shown in FIG. 61(a).
As shown in , three threshold data TH1 to 1 mouth 3
(For example, in 43,128.213>, white area W (number of gradations less than 43), gray 1 area G1 (number of gradations 43 or more and less than 128), gray 2 area G2 (number of gradations 128 or more and less than 213) .

Divided into black area BK (gradation number 213 or more), image density code 5C (0) = “OO”, 5 corresponding to each area
C(1)=“'01”, 5C(2)=”10”5C(
3) Convert to = “11”.

On the other hand, in each pixel, the input image data and the reference data MD of the area including the input image data (in this example, W:O,G1: 255X (1/3) = 85
．． G2: 255x (2/3) = 170.8 = 2
55) as error data e. For example, when the number of density gradations of the input image data is "160'', the input image data is included in the gray 2 area G2, so the error data e=160-170=-10.

Next, as shown in FIG. 61(b), the error data el11 generated in each pixel is calculated Ia within the range of the 4×4 pixel matrix MX, and the total sum is calculated as shown in the following equation (14). and obtain matrix error data e□.

e ding = Σ e lI, (n+, n= 1
~4) --” (14) After this, the above (14
) The lighting condition, in other words, the image density code SC of each pixel is corrected under the following conditions based on the value of the matrix error data e1 calculated using the formula.

(1) Correction condition a knee 43<8. <43: No correction 2) Correction condition b; 43≦8. <128: 1 pixel 1 gradation up 128≦e,
<213: 2 pixels 1 gradation up 213≦e'r <29
8: 3 pixels 111101 up However, the pixels whose gradation is to be changed are selected in order of increasing + side error.

(3) Correction condition C; -43≧e, <-128: 1 pixel 1 gradation down -128
≧8. <-213: 1 pixel 2 gradations down -213≧e,
<-298: 1 pixel 3WA19 down However, the pixels whose gradation is to be changed are selected in order of decreasing one-sided error.

Now, assuming that each image density code in the 4×4 pixel matrix MX is as shown in FIG. 61(C), the matrix error data e□ in the pixel matrix MX is 200, and In Figure 61 (b), the ones with the largest error on the + side are the error data e and e.
. . 232 Then, as shown by diagonal lines in FIG. 61(d), the image density code 232 of the pixel corresponding to the error data e and e increases by one tone .

Next, a specific circuit for realizing the above algorithm is shown in FIG. 162.

In the figure, reference numeral 491 denotes an error/lighting condition calculation circuit that extracts the error data e and lighting conditions (image density code SC) of each pixel, and 492 denotes a 4-line (for example, i+1 to i+4.1+9 to i+12 lines) and the image density code SC are read, and the 4×4 pixel matrix MX (63rd line) is read.
493 is an A-series line memory that sequentially reads out w4 difference data e and image density code SC for the size (see figure), 493 is for 4 lines (i+5 to i+7 lines in Fig. 63) other than the lines stored in the A-series line memory 492. 494 is a daily line memory that reads the error data e and image density code SC of 4x4 pixel matrix MX size and sequentially reads out the error data e and image density code SC of 4x4 pixel matrix MX size. The data e/image quality code SC is stored in the A series line memory 492.
A selector 495 is used to allocate the data to one of the B-series line memories 493, 495 is a timing generation circuit that controls the writing and reading timing of the A-series line memory 492 and the B-series line memory 493, and 496 is a tie generation circuit that controls the timing of writing and reading the A-series line memory 492 and the B-series line memory 493. a correction condition determining circuit for correcting the image density code SC according to the correction conditions a to C;
7 inputs the data from the A-series line memory 492 or the B-series line memory 493 to the correction condition determining circuit 4.
96 or ROS interface.

In such screen generators 153 and 154, first, error data e of pixels on the A series line is generated.
/Error in image quality code SC/Lighting condition calculation circuit 491
and reads this into the A-series line memory 492.

Next, the error data e/image quality code SC of the pixel matrix MXII is transferred from this A-series line memory 492 to the correction condition determination circuit 496.
After the image density code SC is corrected in step 96, the processing result is returned to the A-series line memory 492 again.

During this time, the error data e/image density code SC of the pixels on the day series line are calculated by the error/lighting condition calculation circuit 491 and read into the day series line memory 492.

Then, the corrected processing result is read from the A-series line memory 492 and transferred to the ROS interface side.
Transfer line by line sequentially.

During this time, the error data e/image density code SC in units of pixel matrix MX is transferred from the B-series line memory 493 to the correction condition determining circuit 496, and while the image density code SC is corrected in the correction condition determining circuit 496, the processing result is is returned to the B-series line memory 492 again.

These operations are repeated thereafter to generate image density codes SC for the pixels of all lines and transfer them to the ROS interface side.

Therefore, in this embodiment, the conventional line screen +
When we compared the reproduced images using the error diffusion method as a comparative example, we found that in the comparative example, there was some deterioration in the character image, but in this example, this phenomenon was almost completely absent. I couldn't see it.

[Effects of the Invention] As described above, according to the image recording device according to claim 1, the line screen + error diffusion method is adopted when generating the image density code, but the threshold pattern is By devising unique patterns (
Since a line screen pattern with a line count of 1/2 of the sampling frequency is superimposed on the texture (texture) to suppress the exposure state of the unique pattern, it is possible to effectively avoid deterioration of halftone image quality due to the texture.

In particular, according to the image recording apparatus according to the second aspect, since the change in the threshold pattern of adjacent pixels is set symmetrically with respect to the standard pattern, extreme deviations in the image density code generation area can be effectively corrected. It is possible to avoid this problem, facilitate design that takes into account the reproducibility of halftone images, and suppress image quality deterioration due to the above-mentioned texture.

Further, according to the image recording device according to claim 3, the image density code of each pixel is generated with the overall correction based on the overall error in the pixel matrix range, so that the mesh of the line screen is directly Since it is not exposed and also avoids the occurrence of texture due to error diffusion method,
It is possible to effectively prevent the deterioration of character images that occurs with the line screen method.

In particular, according to the image recording apparatus according to the fourth aspect, priority is given to pixels with large coding error data as pixels to be corrected in the pixel matrix, so that correction can be performed in descending order of the need for correction. This makes it possible to obtain a reproduced image that is more faithful to the structure of the original image, and moreover, it is possible to suppress moiré compared to conventional methods such as the dither matrix method.

Furthermore, according to the image recording device according to any one of claims 5 to 7, in the case of the photo mode, a means for preventing image collapse is added for reproduction of high-density areas, so that it is possible to prevent halftone images from being distorted. It is possible to achieve smooth gradation reproduction without distortion.

Furthermore, according to the image recording apparatus according to claim 8, the pulse width of the image density signal from the multi-level modulation means is modulated non-uniformly to linearly correct the density reproduction characteristics, so that the density reproduction characteristics are linearly corrected. Poor reproducibility of halftone images can be effectively prevented.

Further, according to the image recording apparatus according to claim 9, since a plurality of systems of density gradation conversion means, density code generation means, and multi-value modulation means are provided for a plurality of halftone images, each Optimal image reproduction can be performed for halftone images of , and the quality of halftone images of multiple systems can be maintained at good quality.

According to the image recording apparatus according to claims 10 to 12, the density gradation conversion means or the density code generation means can be shared for multiple systems of image data, so that the apparatus configuration can be simplified. I can do it.

In particular, according to the image recording apparatus according to claim 11, density information of multiple systems of image data is encoded by one density code generation means, and then distributed to multiple systems and sent to the respective multilevel modulation means. Since the pixels are transferred, there is no risk that pixels of other systems will be mixed in the area of a specific color system, and the areas of each color system can be clearly distinguished.

[Brief explanation of drawings]

1(a) to e) are explanatory diagrams showing the outline of an image recording apparatus according to the present invention, FIG. 2 is a block diagram showing the overall configuration of the first embodiment, and FIG. 3 is an image processing of the first embodiment. A block diagram showing the outline of the unit, Fig. 4 is an explanatory diagram showing the overall configuration of the full color sensor, Fig. 5 is an explanatory diagram showing the arrangement of each cell of the full color sensor, and Figs. 6 to 8 are the configuration of the sensor interface circuit. A circuit diagram showing an example, FIG. 9 is an explanatory diagram showing an example of a cell configuration in pixel units, FIG. 10 is an explanatory diagram showing an example configuration of a color image information generation circuit, and FIG. 11 is an explanatory diagram showing an example of the configuration of a color image information generation circuit. FIG. 12 is an explanatory diagram showing the relationship between the distance from the origin in the color space and the saturation C.
Fig. 13 is an explanatory diagram showing the relationship between angle θ and hue aperture in color space, and Fig. 14 is? 1! FIG. 15 is an explanatory diagram showing the relationship between image ratio data and color flags. FIG. 15 is an explanatory diagram showing the outline of image ratio crabnit. FIG. An explanatory diagram showing the image reproduction characteristics of the developing device, FIGS. 18(a) and 18(b) are explanatory diagrams showing the image forming process of the image ratio Kannit, and FIG. 19 is an explanatory diagram showing an example of the configuration of the circuit for data distribution. Fig. 20 is a graph diagram showing the characteristics of the -TRC and the second TRC, Fig. 21 is a block diagram showing the basic configuration of the -th and second screen generators, and Fig. 22(a) is a diagram of the threshold pattern setting circuit. An explanatory diagram showing the algorithm, FIG. 22(b) is an explanatory diagram showing a specific example thereof, FIG. 23 is a block diagram showing a configuration example of a threshold pattern setting circuit, and FIG. 24 shows an algorithm of an error diffusion circuit. An explanatory diagram, FIG. 25 is an explanatory diagram showing how to determine the value of the difference data in FIG. 24 and its polarity, FIG. 26 is a block diagram showing details of the error diffusion circuit, and FIG. 27 is a diagram showing the difference in FIG. 26. 28 is a circuit diagram showing details of the digital filter, FIG. 29 is a circuit diagram showing details of the comparison circuit and density code generator, and FIG. Fig. 31 is a block diagram showing the basic configuration of the ROS controller, Fig. 31 is a block diagram showing details of the multilevel modulation circuit, Fig. 32 is a circuit diagram showing details of the left and right gray generators in Fig. 31, and Fig. 33 is a diagram showing details of the delay line. An explanatory diagram showing a configuration example, Fig. 34 is a circuit diagram showing details of the left/right selection block and left/right switching signal generator, Fig. 35 is a circuit diagram showing details of the selector, and Fig. 36 shows the operating state of the left/right gray generator. Timing chart shown in FIG. 37(a)
(b) is a timing chart showing the operating states of the left/right selection block and the left/right switching signal generator;
) is a schematic diagram showing examples of pulse width modulation patterns in text mode and photo mode, Figure 39 is an explanatory diagram showing how to set the delay amount in the delay line of the left and right gray generators, and Figure 40 is a diagram showing frequency division of the left and right gray generators. Figure 41 is an explanatory diagram showing the function of the vA stability chip of the left and right gray generators, Figure 42 is an explanatory diagram showing the function of the CMOS gate of the left and right gray generators, and Figure 43 is an explanatory diagram showing the function of the left and right gray generator vA degree stabilizing chips. An explanatory diagram showing a modified example of the delay line of the generator, FIG. 44 (aHb) is an explanatory diagram showing the operation from the RO of the image ratio crab unit to the controller according to Example 1, and FIGS. 45 (a) and (b) are the photosensitive An explanatory diagram showing the image formation process on the body, FIG. 46 is a graph diagram showing the relationship between the image density signal and the recorded image density, and FIG. 47 (
a) and (b) are diagrams (photographs substituted for drawings) showing the state of texture in the example and a partially enlarged view thereof, and FIG. 47 (C)
(d) is a diagram (photograph substituted for a drawing) and a partially enlarged view showing the state of texture in a comparative example; FIG. 48 is an explanatory diagram showing Example 2 of the image recording device according to the present invention; FIG. FIG. 50 is a block diagram showing the basic configuration of the screen generator; FIG. 51(a) is an explanatory diagram showing the algorithm of the error diffusion circuit; FIG. b) is a block diagram showing a configuration example of an error diffusion circuit;
FIG. 52 shows T of Embodiment 4 of the image recording device according to the present invention.
An explanatory diagram showing RC, FIG. 53 is an explanatory diagram showing a specific example of the conversion table, FIG. 54 is an explanatory diagram showing how to set the contents of the conversion table, and FIGS. A diagram showing image reproducibility with a comparative example, FIG. 56 is a block diagram showing a multi-level modulation circuit of Example 5 of the image recording device according to the present invention, and FIG. 57 is a circuit diagram showing details of each gray generator. , FIG. 58 is an explanatory diagram showing the operation of the multilevel modulation circuit,
Fig. 59 is a graph showing IiI image reproduction characteristics, Fig. 60 (a) and (b) are graphs showing image reproducibility between the example and the comparative example, and Fig. 61 (a) to d) are graphs showing the image reproduction characteristics of the invention. FIG. 62 is a block diagram showing an example of the configuration of the screen generator, and FIG.
FIG. 2 is an explanatory diagram showing the concepts of a series line, a B series line, and a pixel matrix. [Explanation of symbols] DT...Multi-gradation input image data SC...Image density code SD...Image density signal MS...Mode selection @No. 1...Beam scanning unit 2...Photoconductor 3...Developing means 4...Density M'full conversion means 5...Density code generation means 6...Multi-value modulation means 7...Threshold value switching means 8...Data correction means 9... Code setting means 11... First m1 degree code setting means 12... Encoding error extraction means 13... Matrix error determining means 14... Code correction means 15... Modulation pattern switching means 16... Range Variable means 17...Pulse width variable means

Claims (1)

[Claims] 1) Turning on or off the beam of the beam scanning unit (1) based on an image density signal (SD) that is pulse width modulated in accordance with the density level of multi-gradation input image data (DT). In an image recording apparatus that uses a developing means (3) to visualize a latent image formed on a photoreceptor (2) by beam scanning, the number of density gradations of input image data (DT) is set to a desired number. a density gradation conversion means (4) that converts according to the reproduced density characteristics of the density gradation conversion means (4); and a density gradation conversion means (4) that converts the density gradation according to the reproduction density characteristics of the image data, and corresponds to the segmented area by dividing the number of density gradations of the image data from the density gradation conversion means (4) using a predetermined threshold value. density code generation means (5) for generating an image density code (SC), and multi-level modulation means (6) for modulating the pulse width of the image density signal (SD) based on the generated image density code (SC).
The density code generating means (5) comprises: a threshold switching means (7) for switching and setting a different threshold value for each adjacent pixel; and a previous line corresponding to at least the pixel of interest and the pixels located before and after the pixel of interest. data correction means (8) for adding difference data between the pixel data of and the corresponding threshold value to the current data of the pixel of interest with predetermined weighting; and a density gradation of the pixel of interest corrected by the data correction means (8). The image density code (S
C) Code setting means (9). 2) In the device according to claim 1, the threshold value switching means (1) has a threshold value to which a predetermined increment is added to the standard threshold value, and a decrement value equal to the increase amount is subtracted from the standard threshold value. What is claimed is: 1. An image recording device that switches between and sets a threshold value. 3) The beam of the beam scanning unit (1) is turned on or off based on the image density signal (SD) which is pulse width modulated in accordance with the density level of the multi-gradation input image data (DT), and the image is formed by beam scanning. In an image recording device that visualizes a latent image on a photoreceptor (2) using a developing means (3), the number of density gradations of input image data (DT) is converted according to desired reproduction density characteristics. and a density gradation converting means (4) that divides the number of density gradations of the image data from the density gradation converting means (4) using a predetermined threshold value to generate an image density code (SC) corresponding to the segmented area. A density code generating means (5) for generating a density code, and a multi-value modulating means (6) for modulating the pulse width of an image density signal (SD) based on the generated image density code (SC).
The density code generation means (5) includes an initial density code setting means (11) for setting an initial density code (SCO) corresponding to a segmented area when image data for each pixel is segmented using a predetermined threshold value. ) and the initial concentration code (S
a coding error extraction means (12) for extracting coding error data (CED) consisting of a difference between a threshold value corresponding to the image data and the image data;
a matrix error determining means (13) for adding coded error data (CED) extracted from a predetermined pixel matrix within a predetermined pixel matrix range and determining matrix error data (MED) based on the addition result; The initial density code (SCO) of each pixel in a predetermined pixel matrix range based on the
1. An image recording apparatus comprising: code correction means (14) for selectively correcting code correction means (14). 4) In the device according to claim 3, the code correction means (14) uses coded error data (CED) as the correction target pixel ranking of the predetermined pixel matrix.
An image recording device characterized in that priority is given to an image with a large value. 5) The beam of the beam scanning unit (1) is turned on or off based on the image density signal (SD) which is pulse width modulated in accordance with the density level of the multi-gradation input image data (DT), and the image is formed by beam scanning. In an image recording device that visualizes a latent image on a photoreceptor (2) using a developing means (3), the number of density gradations of input image data (DT) is converted according to desired reproduction density characteristics. and generating an image density code (SC) corresponding to the segmented area by dividing the number of density gradations of the image data of the density gradation converting means (4) using a predetermined threshold value. and a multi-value modulation means (6) that modulates the pulse width of the image density signal (SD) based on the generated image density code (SC), the density code generating means (5) is a data correction means (8) that adds difference data between the pixel data of the previous line and the threshold value corresponding to at least the pixel of interest and the pixels located before and after the pixel of interest to the current data of the pixel of interest with predetermined weighting; and code setting means (9) for dividing the number of density gradations of the pixel of interest corrected by the data correction means (8) into an image density code; The modulation pattern switching means (15) switches the modulation pattern of the image density signal (SD) in units of one pixel or in units of two pixels in accordance with a mode selection signal (MS) indicating either text mode or photo mode. ). 6) The beam of the beam scanning unit (1) is turned on or off based on the image density signal (SD) which is pulse width modulated in accordance with the density level of the multi-gradation input image data (DT), and the image is formed by beam scanning. In an image recording device that visualizes a latent image on a photoreceptor (2) using a developing means (3), the number of density gradations of input image data (DT) is converted according to desired reproduction density characteristics. and a density gradation converting means (4) that divides the number of density gradations of the image data from the density gradation converting means (4) using a predetermined threshold value to generate an image density code (SC) corresponding to the segmented area. A density code generating means (5) for generating a density code, and a multi-value modulating means (6) for modulating the pulse width of an image density signal (SD) based on the generated image density code (SC).
The density gradation conversion means (4) includes a range variable means (4) for variably setting the density conversion range of image data in accordance with a mode selection signal (MS) indicating either text mode or photo mode. 16), and this range variable means (16)
An image recording device characterized in that a density conversion range in a photo mode is set narrower than that in a character mode. 7) The beam of the beam scanning unit (1) is turned on or off based on the image density signal (SD) which is pulse width modulated in accordance with the density level of the multi-gradation input image data (DT), and the beam is scanned by the beam. In an image recording device that visualizes a latent image formed on a photoreceptor (2) using a developing means (3), the number of density gradations of input image data (DT) is adjusted according to desired reproduction density characteristics. and a density gradation converting means (4) for converting the image data by dividing the number of density gradations of the image data from the density gradation converting means (4) by a predetermined threshold value to generate an image density code (SC) corresponding to the divided area. ) and a multilevel modulation means (6) that modulates the pulse width of the image density signal (SD) based on the generated image density code (SC).
The multi-value modulation means (6) includes a pulse width in which the pulse width of the image density signal (SD) is variably set in accordance with a mode selection signal (MS) indicating either text mode or photo mode. A variable means (17) is provided, and this pulse width variable means (1
7) An image recording apparatus characterized in that the pulse width of the image density signal (SD) in the photo mode is set narrower than that in the character mode. 8) In the device according to any one of claims 1 to 7, the multi-value modulation means (6) generates an image density signal (SD) based on an image density code (SC) in order to correct the density reproduction characteristic to a linear one. An image recording device characterized by modulating the pulse width of ). 9) having a plurality of developing means (3) in which at least different developers are used, forming a plurality of latent images by means of a common or separate beam scanning unit (1), and applying each latent image to a corresponding developing means (3); ), wherein the density gradation conversion means (4), the density code generation means (5) and the multi-value modulation means (6) are provided in each of the developing means (3). An image recording device characterized in that a plurality of corresponding systems are provided. 10) The device according to claim 9, wherein one density gradation conversion means (
4) is shared, and this common density gradation conversion means (4) determines a density conversion range based on the color information of the image data (DT), and converts the image data (DT) in the determined density conversion range.
1. An image recording device that converts density information of ). 11) In the device according to claim 9 or 10, one density code generation means (5) is shared for density information of plural systems of image data, and the density code generated by this density code generation means (5) is (SC) is separated into multiple systems according to the color information of the image data (DT), and the multiple systems of density codes (SC) are divided into multiple systems of multi-value modulation means (6
). 12) In the device according to claim 9 or 10, one density code generation means (5) is shared for multiple systems of image data, and this shared density code generation means (5)
The system includes a same-system data extraction unit that extracts image data of the same system from multiple systems of image data, and an image density code of a pixel of interest by referring to the same-system image data extracted by the same-system data extraction unit. An image recording apparatus comprising: a density code determining section that determines a density code.