JPH03192840A - Synchronization/asynchronization conversion integrated circuit - Google Patents
Synchronization/asynchronization conversion integrated circuitInfo
- Publication number
- JPH03192840A JPH03192840A JP1334417A JP33441789A JPH03192840A JP H03192840 A JPH03192840 A JP H03192840A JP 1334417 A JP1334417 A JP 1334417A JP 33441789 A JP33441789 A JP 33441789A JP H03192840 A JPH03192840 A JP H03192840A
- Authority
- JP
- Japan
- Prior art keywords
- selector
- signal
- synchronous
- asynchronous
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 33
- 230000001360 synchronised effect Effects 0.000 claims abstract description 38
- 230000005540 biological transmission Effects 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、データ伝送システムにおける変復調装置(以
下モデムと称する)の同期非同期変換集積回路に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a synchronous-to-asynchronous conversion integrated circuit for a modem (hereinafter referred to as a modem) in a data transmission system.
従来の技術
近年、電話回線を利用したデータ伝送が発達しつつある
。特にパーソナルコンピュータ(以下パソコンと称する
)のデータをやりとりするパソコン通信は米国および日
本で盛んである。パソコンのディジタル信号を電話回線
上のアナログ信号に変換するのがモデムである。モデム
は国際的に定められている規格(これをCCI TT規
格と言う)に従わなければならない。従来からモデムと
パソコンとの間は非同期型データ伝送が主流である。と
ころが、データ伝送の高速化が進められ、モデムの変復
調方式は従来が周波数変調(FSKという)が主であっ
たが、最近は位相変調(PSKという)や振幅位相変調
(QAMという)が採用されつつある。PSKやQAM
方式は変調タイミングを必要とする同期方式のデータ伝
送である。BACKGROUND OF THE INVENTION In recent years, data transmission using telephone lines has been developing. In particular, PC communications for exchanging data between personal computers (hereinafter referred to as personal computers) are popular in the United States and Japan. A modem converts a digital signal from a computer into an analog signal on a telephone line. Modems must comply with internationally established standards (this is called the CCI TT standard). Conventionally, asynchronous data transmission between modems and personal computers has been the mainstream. However, as data transmission speeds continue to increase, the modem modulation and demodulation method used to be frequency modulation (FSK), but recently phase modulation (PSK) and amplitude phase modulation (QAM) have been adopted. It's coming. PSK and QAM
The method is a synchronous data transmission method that requires modulation timing.
従って、モデムはパソコンからの非同期型データを同期
型データに変換して電話回線上に送出しなければならな
い。また、電話回線上の同期型データを非同期型データ
に変換してパソコンへ伝送しなければならない。この同
期型データと非同期型データを変換するのが、同期非同
期変換回路である。この変換方式は、12008PS全
二重モデムの規格であるCCITT V、22あるい
は、2400BPS全二重モデムの規格であるCCIT
T v、22biSの中で定められている。この回路は
現在集積回路で提供されている。Therefore, the modem must convert asynchronous data from the personal computer into synchronous data and send it over the telephone line. Furthermore, synchronous data on the telephone line must be converted into asynchronous data and transmitted to the personal computer. A synchronous-asynchronous conversion circuit converts this synchronous data and asynchronous data. This conversion method is based on CCITT V, 22, which is the standard for 12008PS full-duplex modem, or CCITTV, which is the standard for 2400BPS full-duplex modem.
It is defined in Tv, 22biS. This circuit is currently available as an integrated circuit.
以下の従来の同期非同期変換集積回路を用いたモデムに
ついて説明する。A modem using a conventional synchronous-asynchronous conversion integrated circuit will be described below.
第2図は従来の同期非同期変換集積回路を用いたモデム
のブロック図であり、モデム2は、パソコン1からのデ
ィジタル信号を電話回線3を通しテ相手に伝送するため
のアナログ信号に変換(変調という)したり、相手から
電話回線3を通して送られてきたアナログ信号をパソコ
ン1へのディジタル信号に変換(復調という)する機能
を有する。モデム2は、パソコン1と接続するためのR
3−232Cインタ一フエース回路4と、同期非同期変
換集積回路5と、変復調集積回路6と、電話回線接続回
路7より構成されている。FIG. 2 is a block diagram of a modem using a conventional synchronous-asynchronous conversion integrated circuit. It has a function of converting (referred to as demodulating) an analog signal sent from the other party through the telephone line 3 into a digital signal to the personal computer 1 (referred to as demodulation). Modem 2 is R for connecting to PC 1.
It is composed of a 3-232C interface circuit 4, a synchronous/asynchronous conversion integrated circuit 5, a modulation/demodulation integrated circuit 6, and a telephone line connection circuit 7.
このように構成されたモデムを使ったデータ伝送につい
て説明する。Data transmission using the modem configured in this way will be explained.
パソコン1からの信号は、R3−232Cインタ一フエ
ース回路4を通して同期非同期変換集積回路5へ入力さ
れ、非同期型データを同期型データへ変換し変復調集積
回路6でアナログ信号に変調される。さらに、電話回線
接続回路7を通して電話回線3へ送出される。一方、相
手から電話回線3を通して送られてきた信号は電話回線
接続回路7から変復調集積回路6へ入力され同期型のデ
ィジタル信号に復調される。この信号は、同期非同期変
換集積回路5で、非同期型データに変換され、R3−2
32Cインタ一フエース回路4を通してパソコン1へ伝
送される。Signals from the personal computer 1 are input to the synchronous/asynchronous conversion integrated circuit 5 through the R3-232C interface circuit 4, convert the asynchronous data to synchronous data, and are modulated into analog signals by the modulation/demodulation integrated circuit 6. Furthermore, it is sent to the telephone line 3 through the telephone line connection circuit 7. On the other hand, a signal sent from the other party through the telephone line 3 is inputted from the telephone line connection circuit 7 to the modulation/demodulation integrated circuit 6 and demodulated into a synchronous digital signal. This signal is converted into asynchronous data by the synchronous-asynchronous conversion integrated circuit 5, and R3-2
The data is transmitted to the personal computer 1 through the 32C interface circuit 4.
発明が解決しようとする課題
従来は、パソコン1とモデム2との間のデータ伝送は非
同期型が主流であったが、最近、同期型データ伝送もよ
く使われるようになってきた。この場合には、同期非同
期変換集積回路を通さず、R3−232Cインタ一フエ
ース回路と変復調集積回路を直接接続する必要がある。Problems to be Solved by the Invention Conventionally, asynchronous data transmission between the personal computer 1 and the modem 2 has been the mainstream, but recently synchronous data transmission has also come into widespread use. In this case, it is necessary to directly connect the R3-232C interface circuit and the modulation/demodulation integrated circuit without passing through the synchronous/asynchronous conversion integrated circuit.
従って、従来の同期非同期変換集積回路は入出力部に同
期型信号と非同期型信号との切換回路を付加しなければ
ならないという問題点を有していた。Therefore, the conventional synchronous-asynchronous conversion integrated circuit has the problem that a circuit for switching between synchronous signals and asynchronous signals must be added to the input/output section.
本発明は、上記従来の問題点を解決するもので、制御信
号で同期型信号と非同期型信号を選択することができる
同期非同期変換集積回路を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and aims to provide a synchronous-asynchronous conversion integrated circuit that can select between a synchronous signal and an asynchronous signal using a control signal.
課題を解決するための手段
この目的を達成するために本発明の同期非同期変換集積
回路は、同期型信号と非同期型信号とを制御信号で選択
する選択回路(以下セレクタと称する)を内蔵する構成
を有している。Means for Solving the Problems To achieve this object, the synchronous-asynchronous conversion integrated circuit of the present invention has a configuration that includes a selection circuit (hereinafter referred to as a selector) that selects between a synchronous signal and an asynchronous signal using a control signal. have.
作用
この構成によって同期型信号と非同期型信号との選択回
路が外付の付加回路として不要になり、同期非同期変換
集積回路を搭載するプリント基板の省スペース化が実現
できる。Effect: This configuration eliminates the need for a circuit for selecting between synchronous and asynchronous signals as an external additional circuit, making it possible to save space on the printed circuit board on which the synchronous-asynchronous conversion integrated circuit is mounted.
実施例
以下本発明の一実施例について、図面を参照しながら説
明する。EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.
第1図は本発明の一実施例における同期非同期変換集積
回路のブロック図を示すものである。FIG. 1 shows a block diagram of a synchronous-asynchronous conversion integrated circuit according to an embodiment of the present invention.
同期非同期変換集積回路10は、同期非同期変換回路2
0.セレクタ30,40,50..60で構成され、セ
レクタ30〜60は制御信号70によりコントロールさ
れる。また同期非同期変換回路20は、送信部21と受
信部22とから構成されている。The synchronous asynchronous conversion integrated circuit 10 is a synchronous asynchronous conversion circuit 2.
0. Selectors 30, 40, 50. .. The selectors 30 to 60 are controlled by a control signal 70. Further, the synchronous/asynchronous conversion circuit 20 includes a transmitting section 21 and a receiving section 22.
以上のように構成された同期非同期変換集積回路につい
て以下その動作を説明する。まず、パソコンとモデム間
が非同期型データ伝送の場合、制御信号70は、セレク
タ30の信号出力を送信部21側にし、セレクタ40の
信号入力を同じく送信部21側にする。さらに、セレク
タ50の信号出力を受信部22側にし、セレクタ60の
信号入力を同じく受信部22側にする。パソコンから入
力された非同期型送信信号はセレクタ30により同期非
同期変換回路20の送信部21へ入力され、CCI T
T規格(V、 22、V、22bis)で定められてい
る方法によって非同期型信号を同期型信号に変換される
。これは次にセレクタ40を通って変復調集積回路へ送
出される。一方、変復調集積回路部で復調された相手か
らの同期型データは、セレクタ50により、同期非同期
変換回路20の受信部22へ入力され、CCITT規格
(V、22、V、22bis)で定メラレテイル方法に
よって同期型信号を非同期型信号に変換される。これは
次にセレクタ60を通ってノくソコン側へ送出される。The operation of the synchronous-asynchronous conversion integrated circuit configured as described above will be explained below. First, in the case of asynchronous data transmission between the personal computer and the modem, the control signal 70 causes the signal output of the selector 30 to be placed on the transmitting section 21 side, and the signal input of the selector 40 is similarly placed on the transmitting section 21 side. Further, the signal output of the selector 50 is made to the receiving section 22 side, and the signal input of the selector 60 is also made to the receiving section 22 side. The asynchronous type transmission signal inputted from the personal computer is inputted by the selector 30 to the transmission section 21 of the synchronous/asynchronous conversion circuit 20, and the CCI T
The asynchronous signal is converted into a synchronous signal by the method defined in the T standard (V, 22, V, 22bis). This is then sent through selector 40 to the modulation/demodulation integrated circuit. On the other hand, the synchronous data from the other party demodulated by the modulation/demodulation integrated circuit section is inputted to the reception section 22 of the synchronous/asynchronous conversion circuit 20 by the selector 50, and is sent using a constant molar delay method according to the CCITT standard (V, 22, V, 22bis). Converts a synchronous signal to an asynchronous signal. This is then sent through the selector 60 to the computer.
次にパソコンとモデム間が同期型データ伝送の場合、制
御信号70はセレクタ30の信号出力をセレクタ40側
にし、セレクタ40の信号入力をセレクタ30側にする
。さらにセレクタ50の信号出力をセレクタ60側にし
、セレクタ60の信号入力をセレクタ50側にする。変
復調集積回路からの受信信号は同期型信号であり、セレ
クタ50よりセレクタ60を通り、そのままノくソコン
側へ送出される。Next, in the case of synchronous data transmission between the personal computer and the modem, the control signal 70 sets the signal output of the selector 30 on the selector 40 side, and sets the signal input of the selector 40 on the selector 30 side. Further, the signal output of the selector 50 is set to the selector 60 side, and the signal input of the selector 60 is set to the selector 50 side. The received signal from the modulation/demodulation integrated circuit is a synchronous type signal, and is sent from the selector 50 to the selector 60 as it is to the computer.
発明の効果
以上のように、本実施例によれば、同期型信号と非同期
型信号のセレクタを内蔵したことにより、制御信号の切
り換えで、ノくソコンとモデム間のデータ伝送が同期型
であれ、非同期型であれ、双方の信号を取り扱う同期非
同期変換集積回路を提供できる。さらに、モデムの変復
調集積回路と同期非同期変換集積回路を搭載するプリン
ト基板のスペースを削減できる。Effects of the Invention As described above, according to this embodiment, since the selector for synchronous and asynchronous signals is built-in, data transmission between the computer and the modem can be performed regardless of whether the data transmission is synchronous or not by switching the control signal. It is possible to provide a synchronous-to-asynchronous conversion integrated circuit that handles both types of signals, even if they are of the asynchronous type. Furthermore, the space required for the printed circuit board on which the modem's modulation/demodulation integrated circuit and synchronous/asynchronous conversion integrated circuit are mounted can be reduced.
第1図は本発明の同期非同期変換集積回路の実施例を示
すブロック図、第2図は従来の同期非同期変換集積回路
を含むモデムのブロック図である。
1・・・・・・パソコン、2・・・・・・モデム、3・
・・・・・電話回線、4・・・・・・R8−232Gイ
ンタ一フエース回路、5・・・・・・同期非同期変換集
積回路、6・・・・・・変復調集積回路、7・・・・・
・電話回線接続回路、10・・・・・・同期非同期変換
集積回路、20・・・・・・同期非同期変換回路、30
,40,50.60・・・・・・セレクタ、70・・・
・・・制御信号。FIG. 1 is a block diagram showing an embodiment of a synchronous asynchronous conversion integrated circuit according to the present invention, and FIG. 2 is a block diagram of a modem including a conventional synchronous asynchronous conversion integrated circuit. 1...PC, 2...Modem, 3.
... Telephone line, 4 ... R8-232G interface circuit, 5 ... Synchronous asynchronous conversion integrated circuit, 6 ... Modulation and demodulation integrated circuit, 7 ... ...
・Telephone line connection circuit, 10...Synchronous asynchronous conversion integrated circuit, 20...Synchronous asynchronous conversion circuit, 30
,40,50.60...Selector,70...
···Control signal.
Claims (1)
、送受信入力信号を前記同期非同期変換回路部へ入力す
るか、しないかを選択する第1の選択回路と、送受信出
力信号を前記同期非同期変換回路の信号と前記第1の選
択回路の信号とを選択する第2の選択回路とを備えた同
期非同期変換集積回路。a synchronous-asynchronous conversion circuit; a first selection circuit that selects whether or not to input a transmission/reception input signal to the synchronous-asynchronous conversion circuit section according to a synchronous-asynchronous selection control signal; A synchronous/asynchronous conversion integrated circuit comprising: a second selection circuit that selects a signal and a signal of the first selection circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1334417A JPH03192840A (en) | 1989-12-21 | 1989-12-21 | Synchronization/asynchronization conversion integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1334417A JPH03192840A (en) | 1989-12-21 | 1989-12-21 | Synchronization/asynchronization conversion integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03192840A true JPH03192840A (en) | 1991-08-22 |
Family
ID=18277142
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1334417A Pending JPH03192840A (en) | 1989-12-21 | 1989-12-21 | Synchronization/asynchronization conversion integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03192840A (en) |
-
1989
- 1989-12-21 JP JP1334417A patent/JPH03192840A/en active Pending
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