JPH03192766A - Solid-state image sensing device - Google Patents

Abstract

PURPOSE:To enable a solid-state image sensing device to be remarkably reduced in parasitic capacitance and made large enough in S/N external noises and the like by a method wherein a conductive film is provided between a signal detection capacitor and the surface of a semiconductor substrate, and the output of an output amplifier is inputted into one end of the conductive film concerned. CONSTITUTION:A conductive film 31 is provided between a gate 27 of a driver transistor 5 located at the first stage of an output amplifier which functions as a signal detection capacitor and the surface of a semiconductor through the intermediary of a LOCOS, and one end of the conductive film 31 is connected to a source 29 of the first stage driver transistor 5 through the intermediary of an aluminum wiring 30, so that the output signal of a first stage source follower amplifier is inputted into the conductive film 31. As mentioned above, the conductive film 31 is provided between the gate 27 of the driver transistor 5 located at the first stage of an output amplifier of a signal detection capacitor and the surface of the semiconductor through the intermediary of a LOCOS, so that a parasitic capacitance C2 between the signal detection capacitor and the surface of the semiconductor is left only as a PN junction capacitance around a signal detection region 25, and the capacitance C2 can be made one-third or below as small as the capacitance C1 of a feedback capacitor 10 between the signal detection capacitor and the conductive film 31.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a CCD (Charge-Coupled
The present invention relates to a solid-state imaging device that outputs a generated signal charge as a voltage change, such as a device) type solid-state imaging device.

[Conventional technology]

FIG. 5 shows a circuit configuration diagram of a solid-state imaging device according to the prior art. One end of the two-dimensionally arranged photodiode 1 is
Each column is connected to vertical CCD 2, and
The end of the CD2 is input to an output amplifier via a horizontal CCD3. The output amplifier includes a driver transistor 5, a load transistor 6, and a driver transistor 8. It is constituted by a two-stage source follower circuit including a load transistor 7. The signal charge generated by photoelectric conversion in the photodiode 1 is transferred to the driver transistor 5 of the output amplifier via the vertical CCD 2 and horizontal CCD 3.
The data are sequentially read out to the gate section.

The gate portion of the driver transistor 5 functions as a signal detection capacitor, and a signal voltage corresponding to this voltage change is output from the output terminal 9 of the two-stage source follower circuit. Note that 4 in the figure is a reset transistor for resetting the signal detection capacitor.

FIG. 6 shows the layout button of area C in FIG. In the figure, the area surrounded by the solid line is polysilicon, the area surrounded by the broken line is aluminum, and the area outside the area surrounded by the thick solid line is an element isolation region (LOGO3) made of a thick oxide film.
5ilicon). Horizontal CCD21
A signal detection region 25 is provided beyond the last gate 22, and this signal detection region 25 and the gate 27 of the first stage driver transistor 5 of the output amplifier are connected by an aluminum wiring 26. Here, drain 28
゜Gate 27. The source 29 constitutes a driver transistor, and the drains 24 . The gate 23 constitutes a reset transistor 4 whose source is the signal detection region 25.

[Problem to be solved by the invention]

In order to sufficiently increase the S/N of the output amplifier with respect to incoming noise, etc., the signal detection capacitance, which is the input capacitance of the output amplifier, should be made as small as possible, and the amplitude of the input voltage to the output amplifier should be minimized. It is desirable to increase . However, in the conventional technology, the signal detection capacitance and L
It is unavoidable that a large parasitic capacitance is generated between the OGO 8 and the semiconductor surface such as an element isolation region, and this has hindered the reduction of the signal detection capacitance.

An object of the present invention is to obtain a solid-state imaging device in which the parasitic capacitance is significantly reduced and the S/N ratio of the output amplifier with respect to noise such as jump noise is sufficiently increased.

[Means to solve the problem]

In order to achieve the above object, the present invention includes a photoelectric conversion means provided on the surface of a semiconductor substrate, a signal charge transfer means for transferring signal charges generated by signal light incident on the photoelectric conversion means, and a signal charge transfer means as described above. In a solid-state imaging device having an output amplifier that detects the signal charge carried by the signal charge transfer means as a voltage change of a signal detection capacitor provided on the surface of the semiconductor substrate and outputs a signal voltage according to the voltage change, A conductive film is provided between the signal detection capacitor and the surface of the semiconductor substrate, and an output signal from an output amplifier is input to one end of the conductive film.

[Effect]

The capacitance value between the signal detection capacitor and the conductive film is 01, the parasitic capacitance value between the signal detection capacitor and the semiconductor substrate surface is C2,
The voltage gain of the output amplifier alone is G, the signal charge input to the signal detection capacitor is Q, and the output voltage of the output amplifier at that time is V.
shall be. At this time, the output voltage V is expressed by the following formula.

Therefore, in order to make the signal detection capacitance, which is the input capacitance of the output amplifier, as small as possible and increase the input voltage amplitude to the output amplifier, the denominator of the above equation must be 0.
In order to approach the voltage gain G of the output amplifier alone, (C2
/C1+1). Conversely, even if the voltage gain G of a single output amplifier is close to 1, by providing a conductive film between the signal detection capacitor and the semiconductor surface, C1 is newly generated while the value of C2 is reduced. As a result, the above objective is achieved.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the solid-state imaging device according to the present invention, FIG. 2 is a diagram showing the layout pattern of area A in the above configuration, and FIG. 3 is another embodiment of the solid-state imaging device according to the present invention. FIG. 4 is a diagram showing the layout pattern of area B in the above configuration. In FIG. 1 showing a circuit configuration of a solid-state imaging device of the present invention, one end of photodiodes 1 arranged in a two-dimensional manner is connected to a vertical CCD 2 for each column, and an end of the vertical CCD 2 is connected horizontally. It is input to the output amplifier via CCD3. The output amplifier includes a driver transistor 5, a load transistor 6, a driver transistor 8, and a load transistor 7. It is composed of a two-stage source follower circuit. Here, the output of the first stage source follower circuit consisting of the driver transistor 5 and the load transistor 6 is returned to the gate of the driver transistor 5 via the feedback capacitor 10.

Signal charges generated by photoelectric conversion in the photodiode 1 are sequentially read out to the gate portion of the driver transistor 5 of the output amplifier via the vertical C0D2 and the horizontal CCD3. The gate portion of the driver transistor 5 functions as a signal detection capacitor, and a signal voltage corresponding to this voltage change is outputted from the output terminal 9 of the two-stage source follower circuit.

Note that 4 in the figure is a reset transistor for resetting this signal detection capacitor.

Next, FIG. 2 is a diagram showing the layout pattern of area A in FIG.
It is OGOS. A signal detection region 25 is provided beyond the last gate 22 of the horizontal CCD 21, and the signal detection region 25 and the gate 27 of the driver transistor 5 in the first stage of the output amplifier are connected by an aluminum wiring 26. Here, the drain 28, gate 27, source 29
constitutes a driver transistor, and the drain 24 and gate 23 constitute a reset transistor 4 whose source is the signal detection region 25. Here, in the present invention, the gate 27 of the first stage driver transistor 5 of the output amplifier, which is a signal detection capacitor, and the LOGOS
A conductive film 31 is provided between the conductive film 31 and the semiconductor surface via the aluminum wiring 30, and one end of the conductive film 31 is connected to the source 29 of the first stage driver transistor 5 through the aluminum wiring 30. The output signal of the source follower amplifier in the second stage is input.

As a result of providing a conductive film 31 between the gate 27 of the first stage driver transistor 5 of the output amplifier, which is a signal detection capacitor, and the semiconductor surface via LOGOS, the parasitic capacitance between the signal detection capacitor and the semiconductor surface is reduced. C2 is the signal detection area 25
Only the surrounding pn junction capacitance remains, and this value can be reduced to one-third or less of the capacitance value C1 of the feedback capacitor 10 between the signal detection capacitor and the conductive film 31.・At this time, the voltage gain (C2/C1+l) required for the output amplifier alone is I:! ,
This can be regarded as the first example, and the present invention can be implemented using a source follower circuit as in this embodiment.

Next, another embodiment of the present invention will be described using FIGS. 3 and 4. In the embodiment of the solid-state imaging device shown in FIG. 3, instead of the output of the first stage source follower circuit returning to the gate of the driver transistor 5 via the feedback capacitor 10, the output of the second stage source follower circuit is Feedback capacitance 11
returning to the gate of the driver transistor 5 via
Driver transistor 8 of the second stage source follower circuit
The structure and operation are the same as in the embodiment described above, except that the well is biased to the output potential of the second stage source follower circuit.

FIG. 4 is a diagram showing the layout pattern of region B shown in FIG. 3. In FIG. 0, the solid line is polysilicon and the broken line is aluminum. In this embodiment, instead of LOGO8, an element isolation system using a MoS structure called a field plate is used. The field plate 32 forms a feedback capacitor 11 with the gate 27 of the first stage driver transistor 5 of the output amplifier, which is a signal detection capacitor.
Although not shown in the figure, the end thereof is connected to the output of the second stage source follower circuit. The structure and operation of FIG. 4 are the same as those of the embodiment described in FIG. 2, except that the conductive film 31 is replaced by this field plate structure. In this embodiment, since the capacitance of the field plate 32, which is the feedback capacitance 11, is relatively large, a second stage source follower circuit with higher driving capability is used, but at this time, the gain of the output amplifier alone is reduced. In order to prevent this, the well of the driver transistor 8 of the second stage source follower circuit is biased to the output potential of the second stage source follower circuit to prevent the gain of the second stage source follower circuit from decreasing due to the substrate bias effect. I'm here.

In each of the above embodiments, one of the output amplifiers is the signal detection capacitor.
The bottom of the gate 27 of the driver transistor 5 in the second stage was shielded with a conductive film 31 or field plate 32 to which the voltage of the output amplifier was applied, but this can now be shielded using an impurity diffusion layer to which the voltage of the output amplifier is applied. It is clear that the effects of the present invention can be obtained even if

Furthermore, in the above embodiment, the feedback capacitance value C1 between the signal detection capacitor and the conductive film and the parasitic capacitance value C2 between the signal detection capacitance and the semiconductor surface are constant, but the feedback capacitance value CI may be variable. By doing so, the charge-voltage conversion gain of the entire system can be changed freely.

〔Effect of the invention〕

As described above, the solid-state imaging device according to the present invention includes a photoelectric conversion means provided on the surface of a semiconductor substrate, and a signal charge transfer means for transferring signal charges generated by signal light incident on the photoelectric conversion means. and a solid state having an output amplifier that detects the signal charge carried by the signal charge transfer means as a voltage change of a signal detection capacitor provided on the surface of the semiconductor substrate and outputs a signal voltage corresponding to this voltage change. In the imaging device, a conductive film is provided between the signal detection capacitor and the surface of the semiconductor substrate, and by inputting the output signal of the output amplifier to one end of the conductive film, the signal is detected at the input capacitance of the output amplifier. It is possible to obtain a solid-state imaging device in which the parasitic capacitance is significantly reduced and the S/N ratio of the output amplifier with respect to jump noise and the like is sufficiently increased.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the solid-state imaging device according to the present invention, FIG. 2 is a diagram showing the layout pattern of area A in the above configuration, and FIG. 3 is another embodiment of the solid-state imaging device according to the present invention. FIG. 4 is a diagram showing the layout pattern of area B in the above configuration, FIG. 5 is a circuit configuration diagram of a solid-state imaging device according to the prior art, and FIG. 6 is a layout pattern of area C in the configuration of the prior art. FIG. 5.8... Driver transistor 6.7... Load transistor 10.11... Feedback capacitor 31... Conductive film

Claims (1)

[Claims] 1. A photoelectric conversion means provided on the surface of a semiconductor substrate, a signal charge transfer means for transferring signal charges generated by signal light incident on the photoelectric conversion means, and the signal charge transfer In the solid-state imaging device, the solid-state imaging device includes an output amplifier that detects the signal charge carried by the means as a voltage change of the signal detection capacitor provided on the surface of the semiconductor and outputs a signal voltage corresponding to the voltage change. A solid-state imaging device characterized in that a conductive film is provided between a capacitor and the surface of the semiconductor substrate, and an output signal of an output amplifier is input to one end of the conductive film. 2. When the capacitance value between the signal detection capacitor and the conductive film is C1, and the parasitic capacitance value between the signal detection capacitor and the surface of the semiconductor substrate is C2, the voltage gain of the output amplifier alone is The solid-state imaging device according to claim 1, characterized in that (C2/C1+1). 3. The signal detection capacitor has a capacitance value between it and the conductive film as C1, and a parasitic capacitance value between the signal detection capacitor and the surface of the semiconductor substrate as C2, and the value of C1 is variable. A solid-state imaging device according to claim 1 or 2, characterized in that: 4. The signal charge transfer means is a charge coupled device (Char
ge-CoupledDevice) according to claim 1. 5. The capacitance value C1 between the signal detection capacitor and the conductive film is:
Parasitic capacitance value C between the signal detection capacitor and the first semiconductor surface
Claim 2 characterized in that it is larger than 2.
The solid-state imaging device described in Section 1 or Section 3. 6. The solid-state imaging device as set forth in claim 1, wherein the output amplifier is constituted by a source follower circuit. 7. The solid-state imaging device according to claim 2, wherein the voltage gain of the output amplifier alone is approximately 1. 8. Photoelectric conversion means provided on the surface of a semiconductor substrate, signal charge transfer means for transferring signal charges generated by signal light obtained on the photoelectric conversion means, and signals carried by the signal charge transfer means. In a solid-state imaging device having an output amplifier that detects charge as a voltage change of a signal detection capacitor provided on the surface of the semiconductor and outputs a signal voltage according to the voltage change, the signal detection capacitor and the semiconductor substrate are connected to each other. A solid-state imaging device characterized in that an impurity diffusion layer electrically isolated from the semiconductor substrate is provided between the semiconductor substrate and an output signal of an output amplifier is input to one end of the impurity diffusion layer.