JPH03187613A - Offset elimination circuit - Google Patents

Abstract

PURPOSE:To attain the operation with a single power supply covering a small operation range by providing a switch switched synchronously with an intermittent signal and a circuit providing an offset, giving the offset at an ineffective signal and passing a signal at an effective signal so as to eliminate the DC offset. CONSTITUTION:A pushbutton signal generating circuit 11 outputs an intermittent signal with a DC offset (e.g. 2V) superimposed thereon. In this case, a switch 14 is controlled by an MPU 12 and thrown to the contact 15 at the output of an effective signal, and the effective signal passes through a capacitor 17, and the switch 14 is thrown to the contact 16 at an output of an ineffective signal and a 2V offset is given by bias resistors 20, 21. Thus, a mean voltage at a point D is 2V independently of the position of the switch 14. Since a DC offset is eliminated, the signal amplitude is decreased and the circuit operation is attained with a single power supply with a small operation range.

Description

[Detailed Description of the Invention] [Summary] This invention relates to an offset removal circuit that removes the DC offset of an intermittent signal generated by a push-button signal generation circuit of a telephone, etc. By removing the DC offset, it is possible to reduce the The purpose is to provide an offset removal circuit that can operate with a single power supply, and includes a switch that opens and closes in synchronization with an intermittent signal on which a DC offset is superimposed, a capacitor to which an effective signal is input when the switch is closed, and It is composed of a voltage dividing resistor connected to the capacitor and to the power supply, and a bias resistor connected in parallel to the voltage dividing resistor and applying a reverse offset to the invalid signal when the switch is open.

[Industrial Application Field] The present invention relates to an offset removal circuit that removes a DC offset of an intermittent signal generated by a button signal generation circuit of a telephone or the like.

In recent years, with the demand for handier equipment, batteries and
There has been an increasing demand for equipment that operates with a single V. As a result, the operating voltage range is narrowed, and if a direct current offset, which has not been a problem in the past, is superimposed, the peak waveform of the signal may be limited and the waveform may be distorted.

Therefore, even if the operating voltage range is narrow, for example about 5V, it is necessary to extract only the necessary signals.

[Prior Art] As a conventional general offset circuit, for example, as shown in FIG. 9, there is one that uses a capacitor to remove DC offset.

In FIG. 9, reference numeral 1 denotes a button signal generating circuit of the telephone, and this button signal generating circuit 1 generates an intermittent signal as shown in FIG. 10. For example, a DC offset indicated by the center level Vo of the effective signal is superimposed on this intermittent signal. Reference numeral 2 denotes a capacitor to which an intermittent signal is input, and the capacitor 2 is provided to remove a DC offset of the intermittent signal.

3.4 is a voltage dividing resistor connected to the power supply CC, and the voltage dividing resistor 3.4 and the capacitor 2 collectively constitute an integrating circuit. Reference numeral 5 denotes an operational amplifier that amplifies the signal from which the DC offset has been removed, and the operational amplifier 5 is connected to a station (not shown) via a transformer 6 and a telephone line 7. In addition, 8 is a terminal resistor of the button signal generation circuit 1, and 9
is a hook switch.

The button generating circuit 1 generates an intermittent signal as shown in a of FIG. This intermittent signal is
is input to an integrating circuit consisting of voltage dividing resistors 3 and 4, and is integrated by the integrating circuit, resulting in an output as shown in FIG. Here, the potential shown at b in FIG. 9 is at the center of the operating range C in FIG.

Therefore, as shown in FIG. 11, the effective signal at the beginning exceeds the operating range C, causing waveform distortion.
Desired valid signal cannot be obtained. For this reason, in the past, the effective operating range C was widened to, for example, +12V and -12V to prevent the effective signal from being saturated.

[Problems to be Solved by the Invention] However, in such conventional offset removal circuits, the effective operating range is widened to prevent the effective signal from being saturated, but there is a need to make the equipment more handy. As a result, when devices that operate on batteries or 5V are required, the signal at the beginning of the effective signal, which is superimposed with DC offset, exceeds the operating range, causing waveform distortion and making it difficult to obtain the necessary signal. The problem was that it could not be done.

The present invention has been made in view of such conventional problems, and provides an offset removal circuit that has a small operating range and can operate even with a low single power supply by removing DC offset. The purpose is to

[Means to solve the problem] FIG. 1 is a diagram explaining the principle of the present invention.

In FIG. 1, 14 is a switch that opens and closes in synchronization with an intermittent signal on which a DC offset is superimposed, and 17 is the switch 1.
Capacitor to which the valid signal is input in the closed state of 4, 18.1
Reference numeral 9 denotes a voltage dividing resistor connected to the capacitor 17 and the power supply, and 20.21 a bias connected in parallel to the voltage dividing resistor 18 and 19 to apply a reverse offset to the invalid signal when the switch 14 is open. It is resistance.

[Function] When a valid signal among the intermittent signals superimposed with a DC offset is present, the switch is closed, and the valid signal passes through the capacitor and voltage dividing resistor. When the signal is invalid, the switch is open, and a reverse offset is applied by the bias resistor. It will be done.

Therefore, the DC offset is removed and the signal amplitude is reduced, making it possible to operate with a single low power supply with a small operating range.

Even if the effective operating range becomes narrow in this way, the necessary signal can be obtained.

[Example] Embodiments of the present invention will be described below based on the drawings.

FIGS. 2 to 4 are diagrams showing an embodiment of the present invention.

In FIG. 2, 11 is a button signal generation circuit of the telephone, and the button signal generation circuit 11 is an MP
It is controlled by U12 and generates an intermittent signal as shown in FIG. The intermittent signal has a center level Vo of its effective signal.
(for example, 2V) is superimposed. 13 is a terminating resistor of the button signal generating circuit 11.

14 is a switch having contacts 15 and 16, and the switch 14 switches the MPU 1 in synchronization with an intermittent signal (see A in the figure).
Opening/closing is controlled by 2. A capacitor 17 is connected to the switch 14, and a voltage dividing resistor 18.1 is connected to the capacitor 17.
9 is connected.

The voltage dividing resistors 18 and 19 are connected to the power supply VCC and are connected to the power supply VCC.
The voltage of C is, for example, 5V, and the divided voltage 1 shown by B in the figure
t2.5V. A bias resistor 20.21 is connected in series like the voltage dividing resistor 18.19, and the voltage indicated by C in the figure is 2V, which is equal to the DC offset VO. When the button generating circuit 11 outputs a valid signal, the switch 14 is connected to the contact 15, and the valid signal is input to the capacitor 17. When the button generating circuit 11 outputs an invalid signal, the switch 14 is connected to the contact 15, and the valid signal is input to the capacitor 17. 14 is connected to contact 16, the valid signal is blocked and the invalid signal is given a reverse offset by bias resistor 20.21.

22 is an operational amplifier that amplifies the output signal, and the operational amplifier 22 is connected to a station (not shown) via a transformer 23. Note that 24 is a hook switch, and 25 is a telephone line.

Next, the operation will be explained.

As shown in FIG. 3, the button signal generating circuit 11 outputs an intermittent signal on which a DC offset (for example, 2V) is superimposed, as indicated by the center level Vo of the effective signal. At this time, the switch 14 is controlled by the MPU 12, and when a valid signal is output, it is connected to the contact 15, the valid signal passes through the capacitor 17 side, and when an invalid signal is output, the switch 14 is connected to the contact 15.
6 and a 2v offset is provided by the bias resistor 20.21. Therefore, as shown in FIG. 4, only the waveform representing the effective portion of the effective signal is obtained. Here, the potential shown in FIG. 2 is 2V, which is equal to the center level of the effective part in FIG.
The potential indicated by C in the figure is 2V. Therefore, the average voltage at point D is 2V regardless of the switch 14.

Since the DC offset can be removed in this way, the signal amplitude is reduced, and operation is possible with a low operating range and a single low power supply, for example, 5V.

Next, FIG. 5 shows another embodiment of the present invention.

In FIG. 5, the input side of the capacitor 17 is connected to the pushbutton signal generating circuit 11, and the output side of the capacitor 17 is provided with a switch 14, and the switch 14 is connected to a voltage dividing resistor 18, 19, a bias resistor 20, . It is connected to the midpoint of the signal line connecting 21.

The switch 14 is controlled by the MPU 12, and is connected to the contact 15 when the button signal generation circuit 11 generates a valid signal, and the valid signal passes through F in the figure. On the other hand, when the button signal generating circuit 11 is ineffective, the switch 14
is connected to the contact 16, and an offset of 0.5 V is given by the bias resistor 20°21. Therefore, as shown in FIG. When a signal is input, the relative levels of each part are as shown in FIG.

As shown in FIGS. 5 and 7, the potential between F and G is, for example, 2V, and therefore, as shown in FIG.
At F, a signal with a center level of 2.5v is obtained. In this embodiment as well, the signal amplitude is reduced, the operating range is small, and operation is possible with a single low power supply.

Although the present invention has been described with reference to the case where it is applied to a modem with a network control circuit (generally referred to as NCU), the present invention is not limited to this, and may be applied to other devices that operate on a low single power source. I can do it.

[Effects of the Invention] As explained above, a switch that opens and closes in synchronization with an intermittent signal and a circuit that provides an offset are provided, and the offset is applied when an invalid signal occurs, and the signal is passed when a valid signal is generated. Since the amplitude of the signal is reduced, operation is possible with a single power supply with a narrow operating range.

[Brief explanation of drawings]

Fig. 1 is a diagram explaining the principle of the present invention, Fig. 2 is a diagram showing one embodiment of the present invention, Fig. 3 is an input waveform diagram, Fig. 4 is an output waveform diagram, and Fig. 5 is a diagram showing another embodiment. Figure 6 is an input waveform diagram, Figure 7 is a diagram showing relative levels of each part, Figure 8 is an output waveform diagram, Figure 9 is a diagram showing a conventional example, Figure 10 is an input waveform diagram, FIG. 11 is an output waveform diagram. In the figure, 11...button button signal generation circuit, 12...M
P.U. 13... Resistor, 14... Switch, 15.16... Contact, 17... Capacitor, 18.19... Voltage dividing resistor, 20.21... Bias resistor, 22... Operational amplifier , 23...Transformer, 24...Hook switch, 25...Telephone line.

Claims (2)

[Claims] (1) A switch (14) that opens and closes in synchronization with an intermittent signal on which a DC offset is superimposed, a capacitor (17) to which an effective signal is input when the switch (14) is closed, and a capacitor (17) connected to the capacitor (17). voltage dividing resistors (18), (19) connected to the power supply and the voltage dividing resistors (18),
(19) is connected in parallel with the bias resistor (2) which applies a reverse offset to the invalid signal when the switch (14) is open.
0) and (21). (2) Connect the switch (14) to the capacitor (17)
The voltage dividing resistor (18) is connected to the output side of the
(19) and the bias resistors (20), (21), the switch (14) is connected to the voltage dividing resistor (18) when the signal is valid, and the bias resistor (20) when the signal is invalid to the (19) side. , (21) side.