JPH03184422A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To realize a programmable two-stage logic circuit with few number of product items by constituting a system to compute AND on a first arithmetic plane and to compute EXOR on a second arithmetic plane. CONSTITUTION:An AND plane which calculates the AND is formed on the first arithmetic plane for (l) input signals I1-Il. A result calculated on the AND plane 1 is outputted to the product item numbers P1-Pm. An EXOR plane which computes the EXOR is formed on the second arithmetic plane 2 by inputting the product item numbers P1-Pm. A computed result on the EXOR plane 2 is outputted to the output lines f1-fn. In such a manner, since the EXOR plane whose realization is considered as hard in a conventional system can be realized by setting a circuit to compute two-input EXOR as a fundamental circuit, it is possible to realize AND-EXOR type capable of realization of logic equation with few number of product items generally compared with an AND-OR type.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device that realizes a programmable two-stage logic circuit.

[Conventional technology]

FIG. 8 is a block diagram configuring a conventional two-stage logic circuit. In the figure, 1 is the first calculation plane, h to ■,
is its input line 2, P, -P are output lines (product term lines) from the first calculation plane l, 2 is the second calculation plane, f1 to f3 are output lines from the second calculation plane 2 It is.

Next, the operation will be explained. Traditional programmable 2
The stage logic circuit was configured to realize an AND-OR type logical expression. Therefore, as a first step, in order to generate product terms P+~P that can be included in the logical formula to be realized for one input signal h~■, Here, a configuration for calculating logical product, that is, an AND plane is formed.

As a second step, the product term P, ~
In order to calculate the logical sum of Pyo and obtain n outputs f to f7, the second calculation plane 2 in the figure has a configuration for calculating the logical sum, that is, an OR plane.

[Problem to be solved by the invention]

Since the conventional semiconductor integrated circuit device is configured as described above, it is possible to realize an AND-OR type logical expression, but if the logical expression is expressed as an AND-OR type, the number of product terms may become enormous. This has led to the problem of realizing a huge circuit of product term lines.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor integrated circuit device that can realize a programmable two-stage logic circuit with a small number of product terms.

[Means to solve the problem]

The semiconductor integrated circuit device according to the present invention is configured to calculate a logical product on a first calculation plane and to calculate an exclusive OR on a second calculation plane.

[Effect]

In the semiconductor integrated circuit device according to the present invention, the first calculation plane is an AND plane and the second calculation plane is an EXOR plane, so the number of product terms is generally smaller than that of an AND-OR type. A logical expression expressed by EXOR type two-stage logic can be realized.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram configuring a programmable two-stage logic circuit according to an embodiment of the present invention.
,,P, ~P-, fl S-r, I and 1.2 are the same as in the conventional example. Figure 2 shows the output line fL where Figure 1 is located.
Regarding the second calculation plane 2 in FIG. 1 and the product term line P, ~P
, FIG. 3 is a logic diagram showing the structure of the present invention to realize the logic in FIG. 2, and FIG.
The figure shows the basic unit for forming the structure of the present invention,
5 is a diagram showing a truth table representing the operation of the basic units in FIG. 4, and FIG. 6 is a block diagram configuring the second calculation plane 2 in FIG. 1 by arranging the basic units in FIG. 4. Figure 7 is the 4th
FIG. 3 is a diagram showing an example of a circuit diagram for realizing the basic unit shown in the figure.

The programmable two-stage logic circuit of the present invention includes an AND-E
It has a configuration that realizes an XOR type logical formula. In FIG. 1, an AND plane is formed on a first calculation plane l for one input signal h to I to calculate a logical product. The result calculated on AND plane 1 is its product term line P, ~
It is output to P. In the second calculation plane 2, the product term line P, ~
P.

An EXOR plane is formed which calculates an exclusive OR using the inputs as inputs. The calculation results on the EXOR plane 2 are output to its output lines f and -f.

EXOR plane 2, output line fl-f, and product term line P, ~P
, is a logical diagram when focusing only on a certain output line r5. fl is the result of exclusive OR of multiple inputs. Among the input product terms P+ to P, only the programmed ones (marked in the figure) are the E
Those that are not programmed (those marked with an x in the figure) will not become inputs for EXOR.

Although FIG. 2 shows the EXOR plane in -a terms for a certain output ft, in the present invention, this is expressed as the 3rd rf! J
This is achieved using the configuration shown in the figure below. The basic unit of the configuration is an EXOR circuit with two inputs and one output, and the two input terminals are named A and B, and the output terminal is named Y. m basic units are connected in series with input terminals B and output terminals Y, and each input terminal A of the m basic units is connected to m product term lines P, -
Assign to P. The output @Y of the EXOR circuit corresponding to P is connected to the output line f! of the EXOR plane. shall be.

Further, the input terminal B of the EXOR circuit corresponding to P is grounded.

Next is the method of programming the EXOR plane.
For the product term lines to be programmed, connect each product term line to the input terminal A of the EXOR circuit corresponding to each product term line (3rd
pt, Pt, P-) in the figure.

For product term lines that are not programmed, input terminal A of the EXOR circuit corresponding to each product term line is grounded (P in Figure 3).
s, P-+) - Figure 4 shows the block of the 2-input EXOR circuit which is the basic unit, and Figure 5 shows its truth table.The basic unit is the inputs A and B.
If an odd number of signals of “1” appear, the output Y will be “°
1" is output, and if an even number of occurrences occurs, "0" is output.

Since the basic units described above are connected to form the configuration described above (Figure 3), if the number of programmed product term lines with a "1" signal is an odd number, The output rt of the EXOR plane outputs "1", and in the case of an even number of lines, fi outputs "0".

In Fig. 3, the configuration was focused only on fi among n outputs f1 to f7, but all outputs f, ~r1
FIG. 6 shows the configuration of . This is a configuration in which (number of outputs x number of product terms) basic unit EXOR circuits are arranged in an array.

FIG. 7 is an example of a circuit for realizing the basic unit EXOR circuit (FIG. 4). When A-“O”, P-channel transistor Tri is ON, N-channel transistor T
Since r2 is in the OFF state, when B- is “0”, Y-
When “O” and B-“1”, Y="1" is output. Also, when A="1", Tri is OFF and Tr2 is ON, so when B="O", Y-"1" 13 m "1"
At this time, Y-"O" is output, and the operation shown in FIG. 5 is realized.

In this way, according to this embodiment, the EXOR plane, which was conventionally considered difficult to realize, is replaced by a circuit that calculates the exclusive OR of two inputs as a basic circuit, and the basic circuit is transformed into (the product term line of the AND plane) (number x number of output lines on the EXOR plane) are arranged in an array, and each basic circuit connects the first input terminal and output terminal of the basic circuit in series in the direction of the output line by the number of product terms. The configuration allows you to select whether or not to program depending on whether the second input terminal of the basic circuit is connected to the product term line or to the ground.
When simplifying the same logical expression, AND-E can generally express the logical expression with fewer product terms than the AND-OR type.
It is possible to realize an XOR type, and it is generally possible to realize an array with a smaller area than a conventional programmable logic array.

〔Effect of the invention〕

As described above, the semiconductor integrated circuit device according to the present invention includes:
AN programmable two-stage logic circuit with the first calculation plane
The D plane and the second operation plane are realized as EXOR planes.In this case, since AND-EXOR type logic generally requires fewer product terms than AND-OR type logic, the circuit of the present invention Depending on the configuration, it is possible to realize a logic circuit with a small number of product terms and a small area.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a semiconductor integrated circuit device according to an embodiment of the present invention, FIG. 2 is a logic diagram of an EXOR plane when focusing on a certain output fi, and FIG. A logic diagram showing the configuration of the present invention, FIG. 4 is a diagram showing basic unit blocks forming the configuration of the present invention, FIG. 5 is a diagram showing a truth table representing the operation of the basic unit in FIG. 4,
FIG. 6 is a block diagram showing the configuration of the present invention, FIG. 7 is an example circuit diagram for realizing the basic unit, and FIG. 8 is a block diagram showing a conventional example. In the figure, l is the first calculation plane (AND plane), 2 is the second calculation plane (EXOR plane), 1. -1° is the input line,
P and -P are product term lines, and f and -f are output lines. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) A plurality of inputs, a first calculation plane for calculating the plurality of inputs, a plurality of output lines for outputting the results calculated by the first calculation plane, and inputting the first calculation results. In a semiconductor integrated circuit device constituting a programmable two-stage logic circuit having a second operation plane for performing a second operation, and a plurality of output lines for outputting the results of the second operation, the first The calculation plane is an AND plane that outputs the logical product of multiple inputs to the product term line, and the second calculation plane is composed of an EXOR plane that outputs the exclusive OR of multiple inputs, and the EXOR plane has two inputs. A basic circuit is a circuit that calculates the exclusive OR of , and (number of product term lines in the AND plane x number of output lines in the EXOR plane) basic circuits are arranged in an array, and each basic circuit is the same as the basic circuit. The first input terminal and output terminal of the basic circuit are connected in series by the number of product terms in the direction of the output line, and the second input terminal of the basic circuit is programmed by connecting it to the product term line or to the ground. A semiconductor integrated circuit device characterized in that it has a configuration in which it is possible to select whether or not to do so.